1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $Id: ar2316.c,v 1.3 2013/09/12 11:44:08 martin Exp $
18 */
19 #include "opt_ah.h"
20
21 #include "ah.h"
22 #include "ah_internal.h"
23
24 #include "ar5212/ar5212.h"
25 #include "ar5212/ar5212reg.h"
26 #include "ar5212/ar5212phy.h"
27
28 #include "ah_eeprom_v3.h"
29
30 #define AH_5212_2316
31 #include "ar5212/ar5212.ini"
32
33 #define N(a) (sizeof(a)/sizeof(a[0]))
34
35 typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2316;
36 typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2316;
37 #define PWR_TABLE_SIZE_2316 PWR_TABLE_SIZE_2413
38
39 struct ar2316State {
40 RF_HAL_FUNCS base; /* public state, must be first */
41 uint16_t pcdacTable[PWR_TABLE_SIZE_2316];
42
43 uint32_t Bank1Data[N(ar5212Bank1_2316)];
44 uint32_t Bank2Data[N(ar5212Bank2_2316)];
45 uint32_t Bank3Data[N(ar5212Bank3_2316)];
46 uint32_t Bank6Data[N(ar5212Bank6_2316)];
47 uint32_t Bank7Data[N(ar5212Bank7_2316)];
48
49 /*
50 * Private state for reduced stack usage.
51 */
52 /* filled out Vpd table for all pdGains (chanL) */
53 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]
54 [MAX_PWR_RANGE_IN_HALF_DB];
55 /* filled out Vpd table for all pdGains (chanR) */
56 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]
57 [MAX_PWR_RANGE_IN_HALF_DB];
58 /* filled out Vpd table for all pdGains (interpolated) */
59 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]
60 [MAX_PWR_RANGE_IN_HALF_DB];
61 };
62 #define AR2316(ah) ((struct ar2316State *) AH5212(ah)->ah_rfHal)
63
64 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
65 uint32_t numBits, uint32_t firstBit, uint32_t column);
66
67 static void
ar2316WriteRegs(struct ath_hal * ah,u_int modesIndex,u_int freqIndex,int regWrites)68 ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
69 int regWrites)
70 {
71 struct ath_hal_5212 *ahp = AH5212(ah);
72
73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);
74 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites);
75 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites);
76
77 /* For AP51 */
78 if (!ahp->ah_cwCalRequire) {
79 OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2));
80 } else {
81 ahp->ah_cwCalRequire = AH_FALSE;
82 }
83 }
84
85 /*
86 * Take the MHz channel value and set the Channel value
87 *
88 * ASSUMES: Writes enabled to analog bus
89 */
90 static HAL_BOOL
ar2316SetChannel(struct ath_hal * ah,HAL_CHANNEL_INTERNAL * chan)91 ar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
92 {
93 uint32_t channelSel = 0;
94 uint32_t bModeSynth = 0;
95 uint32_t aModeRefSel = 0;
96 uint32_t reg32 = 0;
97
98 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel);
99
100 if (chan->channel < 4800) {
101 uint32_t txctl;
102
103 if (((chan->channel - 2192) % 5) == 0) {
104 channelSel = ((chan->channel - 672) * 2 - 3040)/10;
105 bModeSynth = 0;
106 } else if (((chan->channel - 2224) % 5) == 0) {
107 channelSel = ((chan->channel - 704) * 2 - 3040) / 10;
108 bModeSynth = 1;
109 } else {
110 HALDEBUG(ah, HAL_DEBUG_ANY,
111 "%s: invalid channel %u MHz\n",
112 __func__, chan->channel);
113 return AH_FALSE;
114 }
115
116 channelSel = (channelSel << 2) & 0xff;
117 channelSel = ath_hal_reverseBits(channelSel, 8);
118
119 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
120 if (chan->channel == 2484) {
121 /* Enable channel spreading for channel 14 */
122 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
123 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
124 } else {
125 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
126 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
127 }
128 } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) {
129 channelSel = ath_hal_reverseBits(
130 ((chan->channel - 4800) / 20 << 2), 8);
131 aModeRefSel = ath_hal_reverseBits(3, 2);
132 } else if ((chan->channel % 10) == 0) {
133 channelSel = ath_hal_reverseBits(
134 ((chan->channel - 4800) / 10 << 1), 8);
135 aModeRefSel = ath_hal_reverseBits(2, 2);
136 } else if ((chan->channel % 5) == 0) {
137 channelSel = ath_hal_reverseBits(
138 (chan->channel - 4800) / 5, 8);
139 aModeRefSel = ath_hal_reverseBits(1, 2);
140 } else {
141 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
142 __func__, chan->channel);
143 return AH_FALSE;
144 }
145
146 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
147 (1 << 12) | 0x1;
148 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
149
150 reg32 >>= 8;
151 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
152
153 AH_PRIVATE(ah)->ah_curchan = chan;
154 return AH_TRUE;
155 }
156
157 /*
158 * Reads EEPROM header info from device structure and programs
159 * all rf registers
160 *
161 * REQUIRES: Access to the analog rf device
162 */
163 static HAL_BOOL
ar2316SetRfRegs(struct ath_hal * ah,HAL_CHANNEL_INTERNAL * chan,uint16_t modesIndex,uint16_t * rfXpdGain)164 ar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain)
165 {
166 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
167 int i; \
168 for (i = 0; i < N(ar5212Bank##_ix##_2316); i++) \
169 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\
170 } while (0)
171 struct ath_hal_5212 *ahp = AH5212(ah);
172 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
173 uint16_t ob2GHz = 0, db2GHz = 0;
174 struct ar2316State *priv = AR2316(ah);
175 int regWrites = 0;
176
177 HALDEBUG(ah, HAL_DEBUG_RFPARAM,
178 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n",
179 __func__, chan->channel, chan->channelFlags, modesIndex);
180
181 HALASSERT(priv != AH_NULL);
182
183 /* Setup rf parameters */
184 switch (chan->channelFlags & CHANNEL_ALL) {
185 case CHANNEL_B:
186 ob2GHz = ee->ee_obFor24;
187 db2GHz = ee->ee_dbFor24;
188 break;
189 case CHANNEL_G:
190 case CHANNEL_108G:
191 ob2GHz = ee->ee_obFor24g;
192 db2GHz = ee->ee_dbFor24g;
193 break;
194 default:
195 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
196 __func__, chan->channelFlags);
197 return AH_FALSE;
198 }
199
200 /* Bank 1 Write */
201 RF_BANK_SETUP(priv, 1, 1);
202
203 /* Bank 2 Write */
204 RF_BANK_SETUP(priv, 2, modesIndex);
205
206 /* Bank 3 Write */
207 RF_BANK_SETUP(priv, 3, modesIndex);
208
209 /* Bank 6 Write */
210 RF_BANK_SETUP(priv, 6, modesIndex);
211
212 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 178, 0);
213 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 175, 0);
214
215 /* Bank 7 Setup */
216 RF_BANK_SETUP(priv, 7, modesIndex);
217
218 /* Write Analog registers */
219 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites);
220 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites);
221 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites);
222 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites);
223 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites);
224
225 /* Now that we have reprogrammed rfgain value, clear the flag. */
226 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
227
228 return AH_TRUE;
229 #undef RF_BANK_SETUP
230 }
231
232 /*
233 * Return a reference to the requested RF Bank.
234 */
235 static uint32_t *
ar2316GetRfBank(struct ath_hal * ah,int bank)236 ar2316GetRfBank(struct ath_hal *ah, int bank)
237 {
238 struct ar2316State *priv = AR2316(ah);
239
240 HALASSERT(priv != AH_NULL);
241 switch (bank) {
242 case 1: return priv->Bank1Data;
243 case 2: return priv->Bank2Data;
244 case 3: return priv->Bank3Data;
245 case 6: return priv->Bank6Data;
246 case 7: return priv->Bank7Data;
247 }
248 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
249 __func__, bank);
250 return AH_NULL;
251 }
252
253 /*
254 * Return indices surrounding the value in sorted integer lists.
255 *
256 * NB: the input list is assumed to be sorted in ascending order
257 */
258 static void
GetLowerUpperIndex(int16_t v,const uint16_t * lp,uint16_t listSize,uint32_t * vlo,uint32_t * vhi)259 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
260 uint32_t *vlo, uint32_t *vhi)
261 {
262 int16_t target = v;
263 const int16_t *ep = lp+listSize;
264 const int16_t *tp;
265
266 /*
267 * Check first and last elements for out-of-bounds conditions.
268 */
269 if (target < lp[0]) {
270 *vlo = *vhi = 0;
271 return;
272 }
273 if (target >= ep[-1]) {
274 *vlo = *vhi = listSize - 1;
275 return;
276 }
277
278 /* look for value being near or between 2 values in list */
279 for (tp = lp; tp < ep; tp++) {
280 /*
281 * If value is close to the current value of the list
282 * then target is not between values, it is one of the values
283 */
284 if (*tp == target) {
285 *vlo = *vhi = tp - (const int16_t *) lp;
286 return;
287 }
288 /*
289 * Look for value being between current value and next value
290 * if so return these 2 values
291 */
292 if (target < tp[1]) {
293 *vlo = tp - (const int16_t *) lp;
294 *vhi = *vlo + 1;
295 return;
296 }
297 }
298 }
299
300 /*
301 * Fill the Vpdlist for indices Pmax-Pmin
302 */
303 static HAL_BOOL
ar2316FillVpdTable(uint32_t pdGainIdx,int16_t Pmin,int16_t Pmax,const int16_t * pwrList,const int16_t * VpdList,uint16_t numIntercepts,uint16_t retVpdList[][64])304 ar2316FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
305 const int16_t *pwrList, const int16_t *VpdList,
306 uint16_t numIntercepts, uint16_t retVpdList[][64])
307 {
308 uint16_t ii, kk;
309 int16_t currPwr = (int16_t)(2*Pmin);
310 /* since Pmin is pwr*2 and pwrList is 4*pwr */
311 uint32_t idxL = 0, idxR = 0;
312
313 ii = 0;
314
315 if (numIntercepts < 2)
316 return AH_FALSE;
317
318 while (ii <= (uint16_t)(Pmax - Pmin)) {
319 GetLowerUpperIndex(currPwr, pwrList, numIntercepts,
320 &(idxL), &(idxR));
321 if (idxR < 1)
322 idxR = 1; /* extrapolate below */
323 if (idxL == (uint32_t)(numIntercepts - 1))
324 idxL = numIntercepts - 2; /* extrapolate above */
325 if (pwrList[idxL] == pwrList[idxR])
326 kk = VpdList[idxL];
327 else
328 kk = (uint16_t)
329 (((currPwr - pwrList[idxL])*VpdList[idxR]+
330 (pwrList[idxR] - currPwr)*VpdList[idxL])/
331 (pwrList[idxR] - pwrList[idxL]));
332 retVpdList[pdGainIdx][ii] = kk;
333 ii++;
334 currPwr += 2; /* half dB steps */
335 }
336
337 return AH_TRUE;
338 }
339
340 /*
341 * Returns interpolated or the scaled up interpolated value
342 */
343 static int16_t
interpolate_signed(uint16_t target,uint16_t srcLeft,uint16_t srcRight,int16_t targetLeft,int16_t targetRight)344 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
345 int16_t targetLeft, int16_t targetRight)
346 {
347 int16_t rv;
348
349 if (srcRight != srcLeft) {
350 rv = ((target - srcLeft)*targetRight +
351 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
352 } else {
353 rv = targetLeft;
354 }
355 return rv;
356 }
357
358 /*
359 * Uses the data points read from EEPROM to reconstruct the pdadc power table
360 * Called by ar2316SetPowerTable()
361 */
362 static int
ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal * ah,uint16_t channel,const RAW_DATA_STRUCT_2316 * pRawDataset,uint16_t pdGainOverlap_t2,int16_t * pMinCalPower,uint16_t pPdGainBoundaries[],uint16_t pPdGainValues[],uint16_t pPDADCValues[])363 ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
364 const RAW_DATA_STRUCT_2316 *pRawDataset,
365 uint16_t pdGainOverlap_t2,
366 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
367 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
368 {
369 struct ar2316State *priv = AR2316(ah);
370 #define VpdTable_L priv->vpdTable_L
371 #define VpdTable_R priv->vpdTable_R
372 #define VpdTable_I priv->vpdTable_I
373 uint32_t ii, jj, kk;
374 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
375 uint32_t idxL = 0, idxR = 0;
376 uint32_t numPdGainsUsed = 0;
377 /*
378 * If desired to support -ve power levels in future, just
379 * change pwr_I_0 to signed 5-bits.
380 */
381 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
382 /* to accomodate -ve power levels later on. */
383 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
384 /* to accomodate -ve power levels later on */
385 uint16_t numVpd = 0;
386 uint16_t Vpd_step;
387 int16_t tmpVal ;
388 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
389
390 /* Get upper lower index */
391 GetLowerUpperIndex(channel, pRawDataset->pChannels,
392 pRawDataset->numChannels, &(idxL), &(idxR));
393
394 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
395 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
396 /* work backwards 'cause highest pdGain for lowest power */
397 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
398 if (numVpd > 0) {
399 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
400 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
401 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
402 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
403 }
404 Pmin_t2[numPdGainsUsed] = (int16_t)
405 (Pmin_t2[numPdGainsUsed] / 2);
406 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
407 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
408 Pmax_t2[numPdGainsUsed] =
409 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
410 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
411 ar2316FillVpdTable(
412 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
413 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
414 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
415 );
416 ar2316FillVpdTable(
417 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
418 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
419 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
420 );
421 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
422 VpdTable_I[numPdGainsUsed][kk] =
423 interpolate_signed(
424 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
425 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
426 }
427 /* fill VpdTable_I for this pdGain */
428 numPdGainsUsed++;
429 }
430 /* if this pdGain is used */
431 }
432
433 *pMinCalPower = Pmin_t2[0];
434 kk = 0; /* index for the final table */
435 for (ii = 0; ii < numPdGainsUsed; ii++) {
436 if (ii == (numPdGainsUsed - 1))
437 pPdGainBoundaries[ii] = Pmax_t2[ii] +
438 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
439 else
440 pPdGainBoundaries[ii] = (uint16_t)
441 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
442 if (pPdGainBoundaries[ii] > 63) {
443 HALDEBUG(ah, HAL_DEBUG_ANY,
444 "%s: clamp pPdGainBoundaries[%d] %d\n",
445 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/
446 pPdGainBoundaries[ii] = 63;
447 }
448
449 /* Find starting index for this pdGain */
450 if (ii == 0)
451 ss = 0; /* for the first pdGain, start from index 0 */
452 else
453 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
454 pdGainOverlap_t2;
455 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
456 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
457 /*
458 *-ve ss indicates need to extrapolate data below for this pdGain
459 */
460 while (ss < 0) {
461 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
462 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
463 ss++;
464 }
465
466 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
467 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
468 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
469
470 while (ss < (int16_t)maxIndex)
471 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
472
473 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
474 VpdTable_I[ii][sizeCurrVpdTable-2]);
475 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
476 /*
477 * for last gain, pdGainBoundary == Pmax_t2, so will
478 * have to extrapolate
479 */
480 if (tgtIndex > maxIndex) { /* need to extrapolate above */
481 while(ss < (int16_t)tgtIndex) {
482 tmpVal = (uint16_t)
483 (VpdTable_I[ii][sizeCurrVpdTable-1] +
484 (ss-maxIndex)*Vpd_step);
485 pPDADCValues[kk++] = (tmpVal > 127) ?
486 127 : tmpVal;
487 ss++;
488 }
489 } /* extrapolated above */
490 } /* for all pdGainUsed */
491
492 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
493 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
494 ii++;
495 }
496 while (kk < 128) {
497 pPDADCValues[kk] = pPDADCValues[kk-1];
498 kk++;
499 }
500
501 return numPdGainsUsed;
502 #undef VpdTable_L
503 #undef VpdTable_R
504 #undef VpdTable_I
505 }
506
507 static HAL_BOOL
ar2316SetPowerTable(struct ath_hal * ah,int16_t * minPower,int16_t * maxPower,HAL_CHANNEL_INTERNAL * chan,uint16_t * rfXpdGain)508 ar2316SetPowerTable(struct ath_hal *ah,
509 int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan,
510 uint16_t *rfXpdGain)
511 {
512 struct ath_hal_5212 *ahp = AH5212(ah);
513 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
514 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;
515 uint16_t pdGainOverlap_t2;
516 int16_t minCalPower2316_t2;
517 uint16_t *pdadcValues = ahp->ah_pcdacTable;
518 uint16_t gainBoundaries[4];
519 uint32_t reg32, regoffset;
520 int i, numPdGainsUsed;
521 #ifndef AH_USE_INIPDGAIN
522 uint32_t tpcrg1;
523 #endif
524
525 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",
526 __func__, chan->channel,chan->channelFlags);
527
528 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
529 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
530 else if (IS_CHAN_B(chan))
531 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
532 else {
533 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);
534 return AH_FALSE;
535 }
536
537 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
538 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
539
540 numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah,
541 chan->channel, pRawDataset, pdGainOverlap_t2,
542 &minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues);
543 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);
544
545 #ifdef AH_USE_INIPDGAIN
546 /*
547 * Use pd_gains curve from eeprom; Atheros always uses
548 * the default curve from the ini file but some vendors
549 * (e.g. Zcomax) want to override this curve and not
550 * honoring their settings results in tx power 5dBm low.
551 */
552 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
553 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
554 #else
555 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);
556 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)
557 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);
558 switch (numPdGainsUsed) {
559 case 3:
560 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;
561 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);
562 /* fall thru... */
563 case 2:
564 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;
565 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);
566 /* fall thru... */
567 case 1:
568 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;
569 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);
570 break;
571 }
572 #ifdef AH_DEBUG
573 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))
574 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "
575 "pd_gains (default 0x%x, calculated 0x%x)\n",
576 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);
577 #endif
578 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);
579 #endif
580
581 /*
582 * Note the pdadc table may not start at 0 dBm power, could be
583 * negative or greater than 0. Need to offset the power
584 * values by the amount of minPower for griffin
585 */
586 if (minCalPower2316_t2 != 0)
587 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2);
588 else
589 ahp->ah_txPowerIndexOffset = 0;
590
591 /* Finally, write the power values into the baseband power table */
592 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
593 for (i = 0; i < 32; i++) {
594 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
595 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
596 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
597 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
598 OS_REG_WRITE(ah, regoffset, reg32);
599 regoffset += 4;
600 }
601
602 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
603 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
604 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
605 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
606 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
607 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
608
609 return AH_TRUE;
610 }
611
612 static int16_t
ar2316GetMinPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2316 * data)613 ar2316GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)
614 {
615 uint32_t ii,jj;
616 uint16_t Pmin=0,numVpd;
617
618 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
619 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
620 /* work backwards 'cause highest pdGain for lowest power */
621 numVpd = data->pDataPerPDGain[jj].numVpd;
622 if (numVpd > 0) {
623 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
624 return(Pmin);
625 }
626 }
627 return(Pmin);
628 }
629
630 static int16_t
ar2316GetMaxPower(struct ath_hal * ah,const RAW_DATA_PER_CHANNEL_2316 * data)631 ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)
632 {
633 uint32_t ii;
634 uint16_t Pmax=0,numVpd;
635
636 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
637 /* work forwards cuase lowest pdGain for highest power */
638 numVpd = data->pDataPerPDGain[ii].numVpd;
639 if (numVpd > 0) {
640 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
641 return(Pmax);
642 }
643 }
644 return(Pmax);
645 }
646
647 static HAL_BOOL
ar2316GetChannelMaxMinPower(struct ath_hal * ah,HAL_CHANNEL * chan,int16_t * maxPow,int16_t * minPow)648 ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan,
649 int16_t *maxPow, int16_t *minPow)
650 {
651 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
652 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;
653 const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL;
654 uint16_t numChannels;
655 int totalD,totalF, totalMin,last, i;
656
657 *maxPow = 0;
658
659 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan))
660 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
661 else if (IS_CHAN_B(chan))
662 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
663 else
664 return(AH_FALSE);
665
666 numChannels = pRawDataset->numChannels;
667 data = pRawDataset->pDataPerChannel;
668
669 /* Make sure the channel is in the range of the TP values
670 * (freq piers)
671 */
672 if (numChannels < 1)
673 return(AH_FALSE);
674
675 if ((chan->channel < data[0].channelValue) ||
676 (chan->channel > data[numChannels-1].channelValue)) {
677 if (chan->channel < data[0].channelValue) {
678 *maxPow = ar2316GetMaxPower(ah, &data[0]);
679 *minPow = ar2316GetMinPower(ah, &data[0]);
680 return(AH_TRUE);
681 } else {
682 *maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]);
683 *minPow = ar2316GetMinPower(ah, &data[numChannels - 1]);
684 return(AH_TRUE);
685 }
686 }
687
688 /* Linearly interpolate the power value now */
689 for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue);
690 last = i++);
691 totalD = data[i].channelValue - data[last].channelValue;
692 if (totalD > 0) {
693 totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]);
694 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) +
695 ar2316GetMaxPower(ah, &data[last])*totalD)/totalD);
696 totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]);
697 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) +
698 ar2316GetMinPower(ah, &data[last])*totalD)/totalD);
699 return(AH_TRUE);
700 } else {
701 if (chan->channel == data[i].channelValue) {
702 *maxPow = ar2316GetMaxPower(ah, &data[i]);
703 *minPow = ar2316GetMinPower(ah, &data[i]);
704 return(AH_TRUE);
705 } else
706 return(AH_FALSE);
707 }
708 }
709
710 /*
711 * Free memory for analog bank scratch buffers
712 */
713 static void
ar2316RfDetach(struct ath_hal * ah)714 ar2316RfDetach(struct ath_hal *ah)
715 {
716 struct ath_hal_5212 *ahp = AH5212(ah);
717
718 HALASSERT(ahp->ah_rfHal != AH_NULL);
719 ath_hal_free(ahp->ah_rfHal);
720 ahp->ah_rfHal = AH_NULL;
721 }
722
723 /*
724 * Allocate memory for private state.
725 * Scratch Buffer will be reinitialized every reset so no need to zero now
726 */
727 static HAL_BOOL
ar2316RfAttach(struct ath_hal * ah,HAL_STATUS * status)728 ar2316RfAttach(struct ath_hal *ah, HAL_STATUS *status)
729 {
730 struct ath_hal_5212 *ahp = AH5212(ah);
731 struct ar2316State *priv;
732
733 HALASSERT(ah->ah_magic == AR5212_MAGIC);
734
735 HALASSERT(ahp->ah_rfHal == AH_NULL);
736 priv = ath_hal_malloc(sizeof(struct ar2316State));
737 if (priv == AH_NULL) {
738 HALDEBUG(ah, HAL_DEBUG_ANY,
739 "%s: cannot allocate private state\n", __func__);
740 *status = HAL_ENOMEM; /* XXX */
741 return AH_FALSE;
742 }
743 priv->base.rfDetach = ar2316RfDetach;
744 priv->base.writeRegs = ar2316WriteRegs;
745 priv->base.getRfBank = ar2316GetRfBank;
746 priv->base.setChannel = ar2316SetChannel;
747 priv->base.setRfRegs = ar2316SetRfRegs;
748 priv->base.setPowerTable = ar2316SetPowerTable;
749 priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower;
750 priv->base.getNfAdjust = ar5212GetNfAdjust;
751
752 ahp->ah_pcdacTable = priv->pcdacTable;
753 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
754 ahp->ah_rfHal = &priv->base;
755
756 ahp->ah_cwCalRequire = AH_TRUE; /* force initial cal */
757
758 return AH_TRUE;
759 }
760
761 static HAL_BOOL
ar2316Probe(struct ath_hal * ah)762 ar2316Probe(struct ath_hal *ah)
763 {
764 return IS_2316(ah);
765 }
766 AH_RF(RF2316, ar2316Probe, ar2316RfAttach);
767