1 //===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Utility functions for Hexagon specific MCInst queries 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H 15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H 16 17 #include "llvm/MC/MCInst.h" 18 19 namespace llvm { 20 class MCContext; 21 class MCInstrDesc; 22 class MCInstrInfo; 23 class MCInst; 24 class MCOperand; 25 class MCSubtargetInfo; 26 namespace HexagonII { 27 enum class MemAccessSize; 28 } 29 class DuplexCandidate { 30 public: 31 unsigned packetIndexI, packetIndexJ, iClass; DuplexCandidate(unsigned i,unsigned j,unsigned iClass)32 DuplexCandidate(unsigned i, unsigned j, unsigned iClass) 33 : packetIndexI(i), packetIndexJ(j), iClass(iClass) {} 34 }; 35 namespace HexagonMCInstrInfo { 36 size_t const innerLoopOffset = 0; 37 int64_t const innerLoopMask = 1 << innerLoopOffset; 38 39 size_t const outerLoopOffset = 1; 40 int64_t const outerLoopMask = 1 << outerLoopOffset; 41 42 size_t const bundleInstructionsOffset = 1; 43 44 // Returns a iterator range of instructions in this bundle 45 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI); 46 47 // Returns the number of instructions in the bundle 48 size_t bundleSize(MCInst const &MCI); 49 50 // Clamp off upper 26 bits of extendable operand for emission 51 void clampExtended(MCInstrInfo const &MCII, MCInst &MCI); 52 53 // Create a duplex instruction given the two subinsts 54 MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, 55 MCInst const &inst1); 56 57 // Convert this instruction in to a duplex subinst 58 MCInst deriveSubInst(MCInst const &Inst); 59 60 // Return the extender for instruction at Index or nullptr if none 61 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index); 62 63 // Return memory access size 64 HexagonII::MemAccessSize getAccessSize(MCInstrInfo const &MCII, 65 MCInst const &MCI); 66 67 // Return number of bits in the constant extended operand. 68 unsigned getBitCount(MCInstrInfo const &MCII, MCInst const &MCI); 69 70 // Return constant extended operand number. 71 unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI); 72 73 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI); 74 75 // Return which duplex group this instruction belongs to 76 unsigned getDuplexCandidateGroup(MCInst const &MI); 77 78 // Return a list of all possible instruction duplex combinations 79 SmallVector<DuplexCandidate, 8> getDuplexPossibilties(MCInstrInfo const &MCII, 80 MCInst const &MCB); 81 82 // Return the index of the extendable operand 83 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI); 84 85 // Return a reference to the extendable operand 86 MCOperand const &getExtendableOperand(MCInstrInfo const &MCII, 87 MCInst const &MCI); 88 89 // Return the implicit alignment of the extendable operand 90 unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI); 91 92 // Return the number of logical bits of the extendable operand 93 unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI); 94 95 // Return the max value that a constant extendable operand can have 96 // without being extended. 97 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI); 98 99 // Return the min value that a constant extendable operand can have 100 // without being extended. 101 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI); 102 103 // Return instruction name 104 char const *getName(MCInstrInfo const &MCII, MCInst const &MCI); 105 106 // Return the operand index for the new value. 107 unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI); 108 109 // Return the operand that consumes or produces a new value. 110 MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI); 111 112 int getSubTarget(MCInstrInfo const &MCII, MCInst const &MCI); 113 114 // Return the Hexagon ISA class for the insn. 115 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI); 116 117 /// Return the slots used by the insn. 118 unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, 119 MCInst const &MCI); 120 121 // Does the packet have an extender for the instruction at Index 122 bool hasExtenderForIndex(MCInst const &MCB, size_t Index); 123 124 bool hasImmExt(MCInst const &MCI); 125 126 // Return whether the instruction is a legal new-value producer. 127 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI); 128 129 // Return the instruction at Index 130 MCInst const &instruction(MCInst const &MCB, size_t Index); 131 132 // Returns whether this MCInst is a wellformed bundle 133 bool isBundle(MCInst const &MCI); 134 135 // Return whether the insn is an actual insn. 136 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI); 137 138 // Return the duplex iclass given the two duplex classes 139 unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb); 140 141 // Return whether the instruction needs to be constant extended. 142 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI); 143 144 // Is this double register suitable for use in a duplex subinst 145 bool isDblRegForSubInst(unsigned Reg); 146 147 // Is this a duplex instruction 148 bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI); 149 150 // Can these instructions be duplexed 151 bool isDuplexPair(MCInst const &MIa, MCInst const &MIb); 152 153 // Can these duplex classes be combine in to a duplex instruction 154 bool isDuplexPairMatch(unsigned Ga, unsigned Gb); 155 156 // Return true if the insn may be extended based on the operand value. 157 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI); 158 159 // Return whether the instruction must be always extended. 160 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI); 161 162 /// Return whether it is a floating-point insn. 163 bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI); 164 165 // Returns whether this instruction is an immediate extender 166 bool isImmext(MCInst const &MCI); 167 168 // Returns whether this bundle is an endloop0 169 bool isInnerLoop(MCInst const &MCI); 170 171 // Is this an integer register 172 bool isIntReg(unsigned Reg); 173 174 // Is this register suitable for use in a duplex subinst 175 bool isIntRegForSubInst(unsigned Reg); 176 177 // Return whether the insn is a new-value consumer. 178 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI); 179 180 // Return true if the operand can be constant extended. 181 bool isOperandExtended(MCInstrInfo const &MCII, MCInst const &MCI, 182 unsigned short OperandNum); 183 184 // Can these two instructions be duplexed 185 bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa, 186 bool ExtendedA, MCInst const &MIb, bool ExtendedB, 187 bool bisReversable); 188 189 // Returns whether this bundle is an endloop1 190 bool isOuterLoop(MCInst const &MCI); 191 192 // Return whether this instruction is predicated 193 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI); 194 195 // Return whether the predicate sense is true 196 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI); 197 198 // Is this a predicate register 199 bool isPredReg(unsigned Reg); 200 201 // Return whether the insn is a prefix. 202 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI); 203 204 // Return whether the insn is solo, i.e., cannot be in a packet. 205 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI); 206 207 /// Return whether the insn can be packaged only with A and X-type insns. 208 bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI); 209 210 /// Return whether the insn can be packaged only with an A-type insn in slot #1. 211 bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI); 212 213 // Pad the bundle with nops to satisfy endloop requirements 214 void padEndloop(MCInst &MCI); 215 216 bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI); 217 218 // Replace the instructions inside MCB, represented by Candidate 219 void replaceDuplex(MCContext &Context, MCInst &MCB, DuplexCandidate Candidate); 220 221 // Marks a bundle as endloop0 222 void setInnerLoop(MCInst &MCI); 223 224 // Marks a bundle as endloop1 225 void setOuterLoop(MCInst &MCI); 226 227 // Would duplexing this instruction create a requirement to extend 228 bool subInstWouldBeExtended(MCInst const &potentialDuplex); 229 230 // Attempt to find and replace compound pairs 231 void tryCompound(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI); 232 } 233 } 234 235 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H 236