1 /*
2 * Copyright (c) 2017 Stormshield.
3 * Copyright (c) 2017 Semihalf.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 *
27 * $FreeBSD: stable/12/sys/dev/neta/if_mvnetavar.h 371893 2022-04-09 06:34:48Z gbe $
28 *
29 */
30
31 #ifndef _IF_MVNETAVAR_H_
32 #define _IF_MVNETAVAR_H_
33 #include <net/if.h>
34
35 #define MVNETA_HWHEADER_SIZE 2 /* Marvell Header */
36 #define MVNETA_ETHER_SIZE 22 /* Maximum ether size */
37 #define MVNETA_MAX_CSUM_MTU 1600 /* Port1,2 hw limit */
38
39 /*
40 * Limit support for frame up to hw csum limit
41 * until jumbo frame support is added.
42 */
43 #define MVNETA_MAX_FRAME (MVNETA_MAX_CSUM_MTU + MVNETA_ETHER_SIZE)
44
45 /*
46 * Default limit of queue length
47 *
48 * queue 0 is lowest priority and queue 7 is highest priority.
49 * IP packet is received on queue 7 by default.
50 */
51 #define MVNETA_TX_RING_CNT 512
52 #define MVNETA_RX_RING_CNT 256
53
54 #define MVNETA_BUFRING_SIZE 1024
55
56 #define MVNETA_PACKET_OFFSET 64
57 #define MVNETA_PACKET_SIZE MCLBYTES
58
59 #define MVNETA_RXTH_COUNT 128
60 #define MVNETA_RX_REFILL_COUNT 8
61 #define MVNETA_TX_RECLAIM_COUNT 32
62
63 /*
64 * Device Register access
65 */
66 #define MVNETA_READ(sc, reg) \
67 bus_read_4((sc)->res[0], (reg))
68 #define MVNETA_WRITE(sc, reg, val) \
69 bus_write_4((sc)->res[0], (reg), (val))
70
71 #define MVNETA_READ_REGION(sc, reg, val, c) \
72 bus_read_region_4((sc)->res[0], (reg), (val), (c))
73 #define MVNETA_WRITE_REGION(sc, reg, val, c) \
74 bus_write_region_4((sc)->res[0], (reg), (val), (c))
75
76 #define MVNETA_READ_MIB(sc, reg) \
77 bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
78
79 #define MVNETA_IS_LINKUP(sc) \
80 (MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP)
81
82 #define MVNETA_IS_QUEUE_SET(queues, q) \
83 ((((queues) >> (q)) & 0x1))
84
85 /*
86 * EEE: Lower Power Idle config
87 * Default timer is duration of MTU sized frame transmission.
88 * The timer can be negotiated by LLDP protocol, but we have no
89 * support.
90 */
91 #define MVNETA_LPI_TS (ETHERMTU * 8 / 1000) /* [us] */
92 #define MVNETA_LPI_TW (ETHERMTU * 8 / 1000) /* [us] */
93 #define MVNETA_LPI_LI (ETHERMTU * 8 / 1000) /* [us] */
94
95 /*
96 * DMA Descriptor
97 *
98 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
99 * decriptor list. descriptors are simply index by counter inside the device.
100 */
101 #define MVNETA_TX_SEGLIMIT 32
102
103 #define MVNETA_QUEUE_IDLE 1
104 #define MVNETA_QUEUE_WORKING 2
105 #define MVNETA_QUEUE_DISABLED 3
106
107 struct mvneta_buf {
108 struct mbuf * m; /* pointer to related mbuf */
109 bus_dmamap_t dmap;
110 };
111
112 struct mvneta_rx_ring {
113 int queue_status;
114 /* Real descriptors array. shared by RxDMA */
115 struct mvneta_rx_desc *desc;
116 bus_dmamap_t desc_map;
117 bus_addr_t desc_pa;
118
119 /* Virtual address of the RX buffer */
120 void *rxbuf_virt_addr[MVNETA_RX_RING_CNT];
121
122 /* Managment entries for each of descritors */
123 struct mvneta_buf rxbuf[MVNETA_RX_RING_CNT];
124
125 /* locks */
126 struct mtx ring_mtx;
127
128 /* Index */
129 int dma;
130 int cpu;
131
132 /* Limit */
133 int queue_th_received;
134 int queue_th_time; /* [Tclk] */
135
136 /* LRO */
137 struct lro_ctrl lro;
138 boolean_t lro_enabled;
139 /* Is this queue out of mbuf */
140 boolean_t needs_refill;
141 } __aligned(CACHE_LINE_SIZE);
142
143 struct mvneta_tx_ring {
144 /* Index of this queue */
145 int qidx;
146 /* IFNET pointer */
147 struct ifnet *ifp;
148 /* Ring buffer for IFNET */
149 struct buf_ring *br;
150 /* Real descriptors array. shared by TxDMA */
151 struct mvneta_tx_desc *desc;
152 bus_dmamap_t desc_map;
153 bus_addr_t desc_pa;
154
155 /* Managment entries for each of descritors */
156 struct mvneta_buf txbuf[MVNETA_TX_RING_CNT];
157
158 /* locks */
159 struct mtx ring_mtx;
160
161 /* Index */
162 int used;
163 int dma;
164 int cpu;
165
166 /* watchdog */
167 #define MVNETA_WATCHDOG_TXCOMP (hz / 10) /* 100ms */
168 #define MVNETA_WATCHDOG (10 * hz) /* 10s */
169 int watchdog_time;
170 int queue_status;
171 boolean_t queue_hung;
172
173 /* Task */
174 struct task task;
175 struct taskqueue *taskq;
176
177 /* Stats */
178 uint32_t drv_error;
179 } __aligned(CACHE_LINE_SIZE);
180
181 static __inline int
tx_counter_adv(int ctr,int n)182 tx_counter_adv(int ctr, int n)
183 {
184
185 ctr += n;
186 while (__predict_false(ctr >= MVNETA_TX_RING_CNT))
187 ctr -= MVNETA_TX_RING_CNT;
188
189 return (ctr);
190 }
191
192 static __inline int
rx_counter_adv(int ctr,int n)193 rx_counter_adv(int ctr, int n)
194 {
195
196 ctr += n;
197 while (__predict_false(ctr >= MVNETA_RX_RING_CNT))
198 ctr -= MVNETA_RX_RING_CNT;
199
200 return (ctr);
201 }
202
203 /*
204 * Timeout control
205 */
206 #define MVNETA_PHY_TIMEOUT 10000 /* msec */
207 #define RX_DISABLE_TIMEOUT 0x1000000 /* times */
208 #define TX_DISABLE_TIMEOUT 0x1000000 /* times */
209 #define TX_FIFO_EMPTY_TIMEOUT 0x1000000 /* times */
210
211 /*
212 * Debug
213 */
214 #define KASSERT_SC_MTX(sc) \
215 KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned"))
216 #define KASSERT_BM_MTX(sc) \
217 KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned"))
218 #define KASSERT_RX_MTX(sc, q) \
219 KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\
220 ("RX mutex not owned"))
221 #define KASSERT_TX_MTX(sc, q) \
222 KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\
223 ("TX mutex not owned"))
224
225 /*
226 * sysctl(9) parameters
227 */
228 struct mvneta_sysctl_queue {
229 struct mvneta_softc *sc;
230 int rxtx;
231 int queue;
232 };
233 #define MVNETA_SYSCTL_RX 0
234 #define MVNETA_SYSCTL_TX 1
235
236 struct mvneta_sysctl_mib {
237 struct mvneta_softc *sc;
238 int index;
239 uint64_t counter;
240 };
241
242 enum mvneta_phy_mode {
243 MVNETA_PHY_QSGMII,
244 MVNETA_PHY_SGMII,
245 MVNETA_PHY_RGMII,
246 MVNETA_PHY_RGMII_ID
247 };
248
249 /*
250 * Ethernet Device main context
251 */
252 DECLARE_CLASS(mvneta_driver);
253
254 struct mvneta_softc {
255 device_t dev;
256 uint32_t version;
257 /*
258 * mtx must be held by interface functions to/from
259 * other frameworks. interrupt handler, sysctl handler,
260 * ioctl handler, and so on.
261 */
262 struct mtx mtx;
263 struct resource *res[2];
264 void *ih_cookie[1];
265
266 struct ifnet *ifp;
267 uint32_t mvneta_if_flags;
268 uint32_t mvneta_media;
269
270 int phy_attached;
271 enum mvneta_phy_mode phy_mode;
272 int phy_addr;
273 int phy_speed; /* PHY speed */
274 boolean_t phy_fdx; /* Full duplex mode */
275 boolean_t autoneg; /* Autonegotiation status */
276 boolean_t use_inband_status; /* In-band link status */
277
278 /*
279 * Link State control
280 */
281 boolean_t linkup;
282 device_t miibus;
283 struct mii_data *mii;
284 uint8_t enaddr[ETHER_ADDR_LEN];
285 struct ifmedia mvneta_ifmedia;
286
287 bus_dma_tag_t rx_dtag;
288 bus_dma_tag_t rxbuf_dtag;
289 bus_dma_tag_t tx_dtag;
290 bus_dma_tag_t txmbuf_dtag;
291 struct mvneta_rx_ring rx_ring[MVNETA_RX_QNUM_MAX];
292 struct mvneta_tx_ring tx_ring[MVNETA_TX_QNUM_MAX];
293
294 /*
295 * Maintance clock
296 */
297 struct callout tick_ch;
298
299 int cf_lpi;
300 int cf_fc;
301 int debug;
302
303 /*
304 * Sysctl interfaces
305 */
306 struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX];
307 struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX];
308
309 /*
310 * MIB counter
311 */
312 struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER];
313 uint64_t counter_pdfc;
314 uint64_t counter_pofc;
315 uint32_t counter_watchdog; /* manual reset when clearing mib */
316 uint32_t counter_watchdog_mib; /* reset after each mib update */
317 };
318 #define MVNETA_RX_RING(sc, q) \
319 (&(sc)->rx_ring[(q)])
320 #define MVNETA_TX_RING(sc, q) \
321 (&(sc)->tx_ring[(q)])
322
323 int mvneta_attach(device_t);
324
325 #ifdef FDT
326 int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *);
327 #endif
328
329 #endif /* _IF_MVNETAVAR_H_ */
330