Home
last modified time | relevance | path

Searched full:intc (Results 1 – 25 of 425) sorted by relevance

12345678910>>...17

/freebsd-13-stable/sys/contrib/device-tree/Bindings/interrupt-controller/
Dmrvl,intc.txt5 "mrvl,mmp-intc" on Marvel MMP,
6 "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
7 "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
9 If the interrupt controller is intc, address and length means the range
10 of the whole interrupt controller. The "marvell,mmp3-intc" controller
12 controller is mux-intc, address and length means one register. Since
13 address of mux-intc is in the range of intc. mux-intc is secondary
16 only required in mux-intc interrupt controller.
18 only required in mux-intc interrupt controller.
22 - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
[all …]
Dmrvl,intc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
21 const: marvell,orion-intc
24 - mrvl,intc-nr-irqs
30 - mrvl,mmp-intc
31 - mrvl,mmp2-intc
41 - marvell,mmp3-intc
42 - mrvl,mmp2-mux-intc
51 const: mrvl,mmp2-mux-intc
72 - mrvl,mmp-intc
73 - mrvl,mmp2-intc
[all …]
Dingenic,intc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml#
19 - ingenic,jz4740-intc
20 - ingenic,jz4760-intc
21 - ingenic,jz4780-intc
24 - ingenic,jz4775-intc
25 - ingenic,jz4770-intc
26 - const: ingenic,jz4760-intc
28 - const: ingenic,x1000-intc
29 - const: ingenic,jz4780-intc
31 - const: ingenic,jz4725b-intc
[all …]
Dcsky,apb-intc.txt8 - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.
9 - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
10 - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.
13 intc node bindings definition
23 Definition: must be "csky,apb-intc"
24 "csky,dual-apb-intc"
25 "csky,gx6605s-intc"
43 intc: interrupt-controller@500000 {
44 compatible = "csky,apb-intc";
50 intc: interrupt-controller@500000 {
[all …]
Dti,omap-intc-irq.txt1 Omap2/3 intc controller
3 On TI omap2 and 3 the intc interrupt controller can provide
8 "ti,omap2-intc"
9 "ti,omap3-intc"
10 "ti,dm814-intc"
11 "ti,dm816-intc"
12 "ti,am33xx-intc"
16 source, should be 1 for intc
23 intc: interrupt-controller@48200000 {
24 compatible = "ti,omap3-intc";
Damlogic,meson-gpio-intc.txt12 - compatible : must have "amlogic,meson8-gpio-intc" and either
13 "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or
14 "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or
15 "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or
16 "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)
17 "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)
18 "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)
19 "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)
20 "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)
31 compatible = "amlogic,meson-gxbb-gpio-intc",
[all …]
Drenesas,intc-irqpin.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
7 title: Renesas Interrupt Controller (INTC) for external pins
16 - renesas,intc-irqpin-r8a7740 # R-Mobile A1
17 - renesas,intc-irqpin-r8a7778 # R-Car M1A
18 - renesas,intc-irqpin-r8a7779 # R-Car H1
19 - renesas,intc-irqpin-sh73a0 # SH-Mobile AG5
20 - const: renesas,intc-irqpin
73 - renesas,intc-irqpin-r8a7740
74 - renesas,intc-irqpin-sh73a0
89 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
Drenesas,irqc.yaml27 - renesas,intc-ex-r8a774a1 # RZ/G2M
28 - renesas,intc-ex-r8a774b1 # RZ/G2N
29 - renesas,intc-ex-r8a774c0 # RZ/G2E
30 - renesas,intc-ex-r8a7795 # R-Car H3
31 - renesas,intc-ex-r8a7796 # R-Car M3-W
32 - renesas,intc-ex-r8a77965 # R-Car M3-N
33 - renesas,intc-ex-r8a77970 # R-Car V3M
34 - renesas,intc-ex-r8a77980 # R-Car V3H
35 - renesas,intc-ex-r8a77990 # R-Car E3
36 - renesas,intc-ex-r8a77995 # R-Car D3
Dsifive,plic-1.0.0.txt39 to should be a riscv,cpu-intc node, which has a riscv node as parent.
51 &cpu0-intc 11
52 &cpu1-intc 11 &cpu1-intc 9
53 &cpu2-intc 11 &cpu2-intc 9
54 &cpu3-intc 11 &cpu3-intc 9
55 &cpu4-intc 11 &cpu4-intc 9>;
Dqca,ath79-misc-intc.txt7 - compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or
8 "qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc"
24 compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";
37 compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";
/freebsd-13-stable/sys/contrib/device-tree/src/arm/
HDarm-realview-pba8.dts45 interrupt-parent = <&intc>;
51 intc: interrupt-controller@1e000000 { label
62 interrupt-parent = <&intc>;
67 interrupt-parent = <&intc>;
80 interrupt-parent = <&intc>;
85 interrupt-parent = <&intc>;
90 interrupt-parent = <&intc>;
95 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
105 interrupt-parent = <&intc>;
[all …]
HDarm-realview-pbx-a9.dts89 interrupt-parent = <&intc>;
96 interrupt-parent = <&intc>;
102 interrupt-parent = <&intc>;
109 intc: interrupt-controller@1f000000 { label
120 interrupt-parent = <&intc>;
125 interrupt-parent = <&intc>;
130 interrupt-parent = <&intc>;
135 interrupt-parent = <&intc>;
140 interrupt-parent = <&intc>;
145 interrupt-parent = <&intc>;
[all …]
HDarm-realview-eb.dts51 intc: interrupt-controller@10040000 { label
68 interrupt-parent = <&intc>;
73 interrupt-parent = <&intc>;
78 interrupt-parent = <&intc>;
83 interrupt-parent = <&intc>;
89 interrupt-parent = <&intc>;
94 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;
104 interrupt-parent = <&intc>;
109 interrupt-parent = <&intc>;
[all …]
HDarm-realview-eb-mp.dtsi41 intc: interrupt-controller@1f000100 { label
58 interrupt-parent = <&intc>;
65 interrupt-parent = <&intc>;
94 interrupt-parent = <&intc>;
101 interrupt-parent = <&intc>;
108 interrupt-parent = <&intc>;
123 interrupt-parent = <&intc>;
128 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
138 interrupt-parent = <&intc>;
[all …]
HDmmp3.dtsi49 compatible = "marvell,mmp3-intc";
54 mrvl,intc-nr-irqs = <64>;
58 compatible = "mrvl,mmp2-mux-intc";
64 mrvl,intc-nr-irqs = <4>;
68 compatible = "mrvl,mmp2-mux-intc";
74 mrvl,intc-nr-irqs = <2>;
78 compatible = "mrvl,mmp2-mux-intc";
84 mrvl,intc-nr-irqs = <3>;
88 compatible = "mrvl,mmp2-mux-intc";
94 mrvl,intc-nr-irqs = <3>;
[all …]
HDzynq-7000.dtsi48 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;
106 interrupt-parent = <&intc>;
117 interrupt-parent = <&intc>;
129 interrupt-parent = <&intc>;
141 interrupt-parent = <&intc>;
150 interrupt-parent = <&intc>;
161 interrupt-parent = <&intc>;
168 intc: interrupt-controller@f8f01000 { label
213 interrupt-parent = <&intc>;
[all …]
/freebsd-13-stable/sys/contrib/device-tree/src/mips/ingenic/
HDjz4770.dtsi18 intc: interrupt-controller@10001000 { label
19 compatible = "ingenic,jz4770-intc";
79 interrupt-parent = <&intc>;
120 interrupt-parent = <&intc>;
142 interrupt-parent = <&intc>;
157 interrupt-parent = <&intc>;
172 interrupt-parent = <&intc>;
187 interrupt-parent = <&intc>;
202 interrupt-parent = <&intc>;
217 interrupt-parent = <&intc>;
[all …]
HDx1000.dtsi18 intc: interrupt-controller@10001000 { label
19 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
67 interrupt-parent = <&intc>;
83 interrupt-parent = <&intc>;
107 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
137 interrupt-parent = <&intc>;
152 interrupt-parent = <&intc>;
161 interrupt-parent = <&intc>;
174 interrupt-parent = <&intc>;
[all …]
HDx1830.dtsi18 intc: interrupt-controller@10001000 { label
19 compatible = "ingenic,x1830-intc", "ingenic,jz4780-intc";
67 interrupt-parent = <&intc>;
83 interrupt-parent = <&intc>;
107 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
137 interrupt-parent = <&intc>;
152 interrupt-parent = <&intc>;
161 interrupt-parent = <&intc>;
174 interrupt-parent = <&intc>;
[all …]
HDjz4780.dtsi18 intc: interrupt-controller@10001000 { label
19 compatible = "ingenic,jz4780-intc";
69 interrupt-parent = <&intc>;
109 interrupt-parent = <&intc>;
134 interrupt-parent = <&intc>;
149 interrupt-parent = <&intc>;
164 interrupt-parent = <&intc>;
179 interrupt-parent = <&intc>;
194 interrupt-parent = <&intc>;
209 interrupt-parent = <&intc>;
[all …]
HDjz4740.dtsi17 intc: interrupt-controller@10001000 { label
18 compatible = "ingenic,jz4740-intc";
67 interrupt-parent = <&intc>;
97 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
137 interrupt-parent = <&intc>;
152 interrupt-parent = <&intc>;
167 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
208 interrupt-parent = <&intc>;
[all …]
HDjz4725b.dtsi17 intc: interrupt-controller@10001000 { label
18 compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc";
67 interrupt-parent = <&intc>;
106 interrupt-parent = <&intc>;
131 interrupt-parent = <&intc>;
146 interrupt-parent = <&intc>;
161 interrupt-parent = <&intc>;
176 interrupt-parent = <&intc>;
193 interrupt-parent = <&intc>;
217 interrupt-parent = <&intc>;
[all …]
/freebsd-13-stable/sys/contrib/device-tree/src/arc/
HDaxc003_idu.dtsi7 * Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
45 core_intc: archs-intc@cpu {
46 compatible = "snps,archs-intc";
52 compatible = "snps,archs-idu-intc";
60 * to uplink only 1 IRQ to ARC core intc
127 * This INTC is actually connected to DW APB GPIO
128 * which acts as a wire between MB INTC and CPU INTC.
129 * GPIO INTC is configured in platform init code
130 * and here we mimic direct connection from MB INTC to
131 * CPU INTC, thus we set "interrupts = <0 1>" instead of
[all …]
HDaxc001.dtsi37 core_intc: arc700-intc@cpu {
38 compatible = "snps,arc700-intc";
45 * to uplink only 1 IRQ to ARC core intc
83 * This INTC is actually connected to DW APB GPIO
84 * which acts as a wire between MB INTC and CPU INTC.
85 * GPIO INTC is configured in platform init code
86 * and here we mimic direct connection from MB INTC to
87 * CPU INTC, thus we set "interrupts = <7>" instead of
90 * This intc actually resides on MB, but we move it here to
92 * this intc to cpu intc are different for axs101 and axs103
/freebsd-13-stable/sys/dts/arm/
HDversatilepb.dts17 intc: interrupt-controller { label
37 interrupt-parent = <&intc>;
46 interrupt-parent = <&intc>;
55 interrupt-parent = <&intc>;
64 interrupt-parent = <&intc>;
80 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;

12345678910>>...17