| /freebsd-13-stable/sys/contrib/device-tree/Bindings/sram/ |
| HD | sram.yaml | 4 $id: http://devicetree.org/schemas/sram/sram.yaml#
7 title: Generic on-chip SRAM
15 Each child of the sram node specifies a region of reserved memory. Each
25 pattern: "^sram(@.*)?"
30 - mmio-sram
32 - rockchip,rk3288-pmu-sram
40 SRAM clock.
50 Should translate from local addresses within the sram to bus addresses.
54 The flag indicating, that SRAM memory region has not to be remapped
59 "^([a-z]*-)?sram(-section)?@[a-f0-9]+$":
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| D | allwinner,sun4i-a10-system-control.yaml | 4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
14 The SRAM controller found on most Allwinner devices is represented
15 by a regular node for the SRAM controller itself, with sub-nodes
16 representing the SRAM handled by the SRAM controller.
27 - const: allwinner,sun4i-a10-sram-controller
36 - const: allwinner,sun50i-a64-sram-controller
53 "^sram@[a-z0-9]+":
58 const: mmio-sram
61 "^sram-section?@[a-f0-9]+$":
67 - const: allwinner,sun4i-a10-sram-a3-a4
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| HD | cache_sram.txt | 1 * Freescale PQ3 and QorIQ based Cache SRAM
5 as SRAM. This cache SRAM representation in the device
10 - compatible : should be "fsl,p2020-cache-sram"
11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
12 - reg : offset and length of the cache-sram.
16 cache-sram@fff00000 {
17 fsl,cache-sram-ctlr-handle = <&L2>;
19 compatible = "fsl,p2020-cache-sram";
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| /freebsd-13-stable/sys/contrib/device-tree/src/arm/ |
| HD | lpc4350.dtsi | 24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
26 reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
31 reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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| HD | lpc4357.dtsi | 24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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| HD | sun5i.dtsi | 140 sram_a: sram@0 {
141 compatible = "mmio-sram";
147 emac_sram: sram-section@8000 {
148 compatible = "allwinner,sun5i-a13-sram-a3-a4",
149 "allwinner,sun4i-a10-sram-a3-a4";
155 sram_d: sram@10000 {
156 compatible = "mmio-sram";
162 otg_sram: sram-section@0 {
163 compatible = "allwinner,sun5i-a13-sram-d",
164 "allwinner,sun4i-a10-sram-d";
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| HD | suniv-f1c100s.dtsi | 41 sram-controller@1c00000 {
49 sram_d: sram@10000 {
50 compatible = "mmio-sram";
56 otg_sram: sram-section@0 {
57 compatible = "allwinner,suniv-f1c100s-sram-d",
58 "allwinner,sun4i-a10-sram-d";
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/crypto/ |
| HD | mv_cesa.txt | 9 region. Can also contain an entry for the SRAM attached to the CESA,
12 - reg-names: "regs". Can contain an "sram" entry, but this representation
17 - marvell,crypto-srams: phandle to crypto SRAM definitions
20 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
21 specified the whole SRAM is used (2KB)
31 marvell,crypto-sram-size = <0x600>;
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| HD | marvell-cesa.txt | 13 region. Can also contain an entry for the SRAM attached to the CESA,
16 - reg-names: "regs". Can contain an "sram" entry, but this representation
26 - marvell,crypto-srams: phandle to crypto SRAM definitions
29 - marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
30 specified the whole SRAM is used (2KB)
43 marvell,crypto-sram-size = <0x600>;
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/net/ |
| HD | marvell-orion-net.txt | 43 - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM.
44 - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM.
46 - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM.
47 - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM.
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| D | allwinner,sun4i-a10-emac.yaml | 29 allwinner,sram:
30 description: Phandle to the device SRAM
39 - allwinner,sram
51 allwinner,sram = <&emac_sram 1>;
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/arm/ |
| D | arm,scpi.txt | 59 SRAM and Shared Memory for SCPI
62 A small area of SRAM is reserved for SCPI communication between application
65 The properties should follow the generic mmio-sram description found in [3]
70 - reg : The base offset and size of the reserved area with the SRAM
71 - compatible : should be "arm,scp-shmem" for Non-secure SRAM based
112 [3] Documentation/devicetree/bindings/sram/sram.yaml
117 sram: sram@50000000 {
118 compatible = "arm,juno-sram-ns", "mmio-sram";
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| D | juno,scpi.txt | 4 Juno SRAM and Shared Memory for SCPI
8 - compatible : should be "arm,juno-sram-ns" for Non-secure SRAM
13 - reg : The base offset and size of the reserved area with the SRAM
14 - compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based
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| D | arm,scmi.txt | 87 SRAM and Shared Memory for SCMI
90 A small area of SRAM is reserved for SCMI communication between application
93 The properties should follow the generic mmio-sram description found in [4]
98 - reg : The base offset and size of the reserved area with the SRAM
99 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
106 [4] Documentation/devicetree/bindings/sram/sram.yaml
111 sram@50000000 {
112 compatible = "mmio-sram";
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/arm/omap/ |
| HD | mpu.txt | 14 - sram: Phandle to the ocmcram node
17 - pm-sram: Phandles to ocmcram nodes to be used for power management.
20 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
52 pm-sram = <&pm_sram_code
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/clock/ |
| HD | hi6220-clock.txt | 28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
29 the driver need use the sram to pass parameters for frequency change.
44 hisilicon,hi6220-clk-sram = <&sram>;
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| /freebsd-13-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
| HD | ar9300_aic.c | 45 struct ath_aic_sram_info sram; member
413 /* From dir/quad_path_gain_lin to sram. */ in ar9300_aic_cal_post_process()
426 aic_sram[i].sram.vga_dir_sign = (aic_sram[i].dir_path_gain_lin >= 0) in ar9300_aic_cal_post_process()
428 aic_sram[i].sram.vga_quad_sign= (aic_sram[i].quad_path_gain_lin >= 0) in ar9300_aic_cal_post_process()
438 aic_sram[i].sram.com_att_6db = ar9300_aic_find_index(1, in ar9300_aic_cal_post_process()
441 aic_sram[i].sram.valid = 1; in ar9300_aic_cal_post_process()
442 aic_sram[i].sram.rot_dir_att_db = in ar9300_aic_cal_post_process()
445 aic_sram[i].sram.rot_quad_att_db = in ar9300_aic_cal_post_process()
453 ahp->ah_aic_sram[i] = (SM(aic_sram[i].sram.vga_dir_sign, in ar9300_aic_cal_post_process()
455 SM(aic_sram[i].sram.vga_quad_sign, in ar9300_aic_cal_post_process()
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/remoteproc/ |
| D | ti,k3-dsp-rproc.yaml | 76 sram:
81 phandles to one or more reserved on-chip SRAM regions. The regions
82 should be defined as child nodes of the respective SRAM node, and
84 Documentation/devicetree/bindings/sram/sram.yaml
95 - description: Address and Size of the L2 SRAM internal memory region
113 - description: Address and Size of the L2 SRAM internal memory region
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| D | ingenic,vpu.yaml | 27 - description: sram registers
34 - const: sram
69 <0x132f0000 0x7000>; /* SRAM */
70 reg-names = "aux", "tcsm0", "tcsm1", "sram";
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/memory-controllers/ti/ |
| HD | emif.txt | 32 - sram : Phandles for generic sram driver nodes,
35 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
76 sram = <&pm_sram_code
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| /freebsd-13-stable/sys/dev/sfxge/common/ |
| HD | siena_sram.c | 72 /* Set the event queue to use for SRAM updates */ in siena_sram_init()
99 * Move the descriptor caches up to the top of SRAM, and test in siena_sram_test()
100 * all of SRAM below them. We only miss out one row here. in siena_sram_test()
112 * to guarantee not to overflow the SRAM fifo in siena_sram_test()
162 * We don't need to reconfigure SRAM again because the API in siena_sram_test()
163 * requires efx_nic_fini() to be called after an sram test. in siena_sram_test()
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/fsi/ |
| HD | fsi-master-ast-cf.txt | 19 - aspeed,sram = <phandle>; : Reference to the SRAM node.
34 aspeed,sram = <&sram>;
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/media/ |
| HD | allegro.txt | 14 length of the memory mapped sram
15 - reg-names: must include "regs" and "sram"
26 reg-names = "regs", "sram";
37 reg-names = "regs", "sram";
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| /freebsd-13-stable/sys/dts/arm/ |
| HD | dockstar.dts | 46 sram = &SRAM;
212 sram-handle = <&SRAM>;
230 SRAM: sram@fd000000 { label
231 compatible = "mrvl,cesa-sram";
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/mtd/ |
| HD | atmel-nand.txt | 23 - atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
101 atmel,nfc-sram = <&nfc_sram>;
165 NFC registers and NFC SRAM. NFC SRAM address and size can be absent
169 - atmel,write-by-sram: boolean to enable NFC write by SRAM.
234 0x00200000 0x00100000 /* NFC SRAM banks */
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