Searched full:hardware (Results 1 – 25 of 3770) sorted by relevance
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/leds/ |
| HD | leds-bcm6328.txt | 4 In these SoCs it's possible to control LEDs both as GPIOs or by hardware.
8 by hardware using this driver.
9 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
10 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
14 should be controlled by a hardware signal instead of the MODE register value,
15 with 0 meaning hardware control enabled and 1 hardware control disabled. This
16 is usually 1:1 for hardware to LED signals, but through the activity/link
18 explained later in brcm,link-signal-sources). Even if a LED is hardware
20 but you can't turn it off if the hardware decides to light it up. For this
21 reason, hardware controlled LEDs aren't registered as LED class devices.
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| /freebsd-13-stable/sys/dev/ixgbe/ |
| HD | ixgbe_api.c | 62 * @hw: pointer to hardware structure
75 * @hw: pointer to hardware structure
78 * Does not touch the hardware. This function must be called prior to any
257 * ixgbe_init_hw - Initialize the hardware
258 * @hw: pointer to hardware structure
260 * Initialize the hardware by resetting and then starting the hardware
269 * ixgbe_reset_hw - Performs a hardware reset
270 * @hw: pointer to hardware structure
272 * Resets the hardware by resetting the transmit and receive units, masks and
282 * ixgbe_start_hw - Prepares hardware for Rx/Tx
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| HD | ixgbe_x540.c | 54 * @hw: pointer to hardware structure
57 * Does not touch the hardware.
166 * @hw: pointer to hardware structure
183 * @hw: pointer to hardware structure
195 * @hw: pointer to hardware structure
208 * ixgbe_reset_hw_X540 - Perform hardware reset
209 * @hw: pointer to hardware structure
211 * Resets the hardware by resetting the transmit and receive units, masks
310 * ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
311 * @hw: pointer to hardware structure
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/spi/ |
| HD | spi-sprd-adi.txt | 5 framework for its hardware implementation is alike to SPI bus and its timing
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
11 we can configure them to allow other hardware components to use it independently,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
14 triggered by hardware components instead of ADI software channels.
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
18 transfer data triggered by hardware automatically, and the second value specifies
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| /freebsd-13-stable/lib/libpmc/pmu-events/arch/arm64/fujitsu/a64fx/ |
| HD | cache.json | 45 …"PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.",
48 … "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch."
51 …"PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.",
54 … "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch."
63 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.",
66 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch."
87 "PublicDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch.",
90 "BriefDescription": "This event counts L2D_CACHE_REFILL caused by hardware prefetch."
105 …ns where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch.",
108 …ons where demand access hits an L2 cache refill buffer allocated by software or hardware prefetch."
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| HD | other.json | 147 …n": "This event counts streaming prefetch requests to L1D cache generated by hardware prefetcher.",
150 …on": "This event counts streaming prefetch requests to L1D cache generated by hardware prefetcher."
153 …counts allocation type prefetch injection requests to L1D cache generated by hardware prefetcher.",
156 … counts allocation type prefetch injection requests to L1D cache generated by hardware prefetcher."
159 …ts non-allocation type prefetch injection requests to L1D cache generated by hardware prefetcher.",
162 …nts non-allocation type prefetch injection requests to L1D cache generated by hardware prefetcher."
165 …ion": "This event counts streaming prefetch requests to L2 cache generated by hardware prefecher.",
168 …tion": "This event counts streaming prefetch requests to L2 cache generated by hardware prefecher."
171 … counts allocation type prefetch injection requests to L2 cache generated by hardware prefetcher.",
174 …t counts allocation type prefetch injection requests to L2 cache generated by hardware prefetcher."
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| /freebsd-13-stable/share/man/man4/ |
| HD | ath.4 | 104 AR5212, AR5416 and later parts have hardware support for the
151 .Sh HARDWARE
206 .It "ath%d: unable to attach hardware; HAL status %u"
207 The Atheros Hardware Access Layer was unable to configure the hardware
225 .It "ath%d: hardware error; resetting"
226 An unrecoverable error in the hardware occurred.
228 The driver will reset the hardware and continue.
230 The receive FIFO in the hardware overflowed before the data could be
232 This typically occurs because the hardware ran short of receive
234 The driver will reset the hardware and continue.
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| HD | pwmc.4 | 49 driver provides device-control access to a channel of PWM hardware.
54 Some PWM hardware is organized with multiple channels sharing a
60 hardware which share the same resources.
61 Consult the documentation for the underlying PWM hardware device driver
70 is a sequential number assigned to each PWM hardware controller
73 is the channel number within that hardware controller.
138 The hardware channel number the instance is attached to.
150 device is described with a child node of the pwm hardware controller node.
151 When the hardware supports multiple channels within the controller, it is
154 child node for every channel the hardware supports.
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| HD | hwpmc.4 | 36 .Nd "Hardware Performance Monitoring Counter support"
71 driver virtualizes the hardware performance monitoring facilities in
95 measures hardware events for the system as a whole.
101 In counting modes, the PMCs count hardware events.
110 hardware events have been observed.
119 These PMCs count hardware events whenever a thread in their attached process is
130 have seen the configured number of hardware events.
140 These PMCs count hardware events seen by them independent of the
164 Processes are allowed to allocate as many PMCs as the hardware and
224 It signifies that the PMC will track hardware events for its
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| HD | iicmux.4 | 50 the driver for the specific mux hardware in use.
55 I2C bus multiplexer (mux) hardware.
59 used by individual mux hardware drivers.
60 It will be loaded automatically when needed by a mux hardware driver.
67 Some hardware may be able to connect multiple downstream buses at the
80 Some mux hardware has the ability to disconnect all downstream buses
82 Other hardware must always have one of the downstream buses connected.
83 Individual mux hardware drivers typically provide a way to select which
98 The mux hardware maintains that upstream-to-downstream connection until
101 Before releasing ownership, the mux driver returns the mux hardware to
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| HD | uart.4 | 100 driver has a modular design to allow it to be used on differing hardware and
112 .Ss HARDWARE DRIVERS
113 The core component and the kernel interfaces talk to the hardware through the
114 hardware interface.
115 This interface serves as an abstraction of the hardware and allows varying
119 System devices are UARTs that have a special purpose by way of hardware
137 .Sh HARDWARE
144 NS8250: standard hardware based on the 8250, 16450, 16550, 16650, 16750 or
200 In narrow mode the driver uses the hardware's ability to latch a line
201 state change; not all hardware has this capability.
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| /freebsd-13-stable/sys/dev/scc/ |
| HD | scc_if.m | 35 # The SCC hardware interface. The core SCC code is hardware independent.
36 # The details of the hardware are abstracted by the SCC hardware interface.
49 # attach() - attach hardware.
51 # have been allocated. The intend of this method is to setup the hardware
53 # The reset parameter informs the hardware driver whether a full device
55 # be used as system console and a hardware reset would disrupt output.
79 # service them on an interrupt priority basis. If the hardware cannot provide
86 # probe() - detect hardware.
88 # hardware exists. This function should also set the device description
89 # to something that represents the hardware.
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| /freebsd-13-stable/sys/contrib/octeon-sdk/ |
| HD | cvmx-wqe.h | 46 * from several hardware blocks, those definitions have been placed
80 /** Use this struct if the hardware determines that the packet is IP */
98 …uint64_t software : 1; /**< reserved for software use, hardware will clear on p…
100 …uint64_t L4_error : 1; /**< the receive interface hardware detected an L4 error…
118 …uint64_t IP_exc : 1; /**< the receive interface hardware detected an IP error…
128 …uint64_t is_bcast : 1; /**< set if the hardware determined that the packet is a…
129 …uint64_t is_mcast : 1; /**< set if the hardware determined that the packet is a…
131 …uint64_t rcv_error : 1; /**< the receive interface hardware detected a receive e…
133 /* zero for packet submitted by hardware that isn't on the slow path */
156 …uint64_t software : 1; /**< reserved for software use, hardware will clear on p…
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| HD | cvmx-dma-engine.h | 95 … work-queue entry that is submitted by the hardware after completing the DMA;
97 … is written to 0 by the hardware after completing the DMA. */
106 … When CA = 1, the hardware updates the selected counter after it completes the
117 … When CA = 0, the hardware does not update any counters.
119 set, and the hardware never adds to the counters. */
121 … When FI is set for an OUTBOUND or EXTERNAL-ONLY transfer, the hardware
125 and the hardware never generates interrupts. */
128 … DMA HDR alone determines whether the hardware frees any/all of the local
130 … - when FL = 1, the hardware frees the local buffer when II=1.
131 … - when FL = 0, the hardware does not free the local buffer when II=1.
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| /freebsd-13-stable/lib/libpmc/ |
| HD | pmc.3 | 29 .Nd library for accessing hardware performance monitoring counters
38 hardware performance counters to gather performance data about
64 These PMCs only measure hardware events when the processes they are
88 to availability of hardware resources.
91 measured by hardware.
92 The syntax used for specifying a hardware event along with additional
171 Fixed function hardware counters presents in CPUs conforming to the
175 Programmable hardware counters present in CPUs conforming to the
179 Programmable hardware counters present in
183 Programmable hardware counters present in
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| HD | pmc_disable.3 | 30 .Nd administrative control of hardware performance counters
40 These functions allow specific hardware performance monitoring
42 The hardware performance counters available on each CPU are numbered
52 disables the hardware counter numbered by argument
59 enables the hardware counter numbered by argument
64 Hardware PMCs that are currently in use by applications cannot be
67 hardware PMCs in the system with the same pmc number as being in-use.
76 specified a hardware PMC is currently in use.
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| /freebsd-13-stable/share/man/man9/ |
| HD | ieee80211_crypto.9 | 120 The cryptographic framework supports hardware acceleration of ciphers
122 driver is unable to provide necessary hardware services.
150 hardware.
171 they are involved only when providing hardware acceleration of
196 handles hardware key state reloading from software key state, such
199 Drivers identify ciphers they have hardware support for through the
204 If hardware support is available then a driver should also fill in the
217 for updating hardware key state.
227 Otherwise, e.g. if hardware resources are not available, the driver will
235 mbuf flag to indicate the hardware has decrypted the payload.
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| /freebsd-13-stable/sys/dev/uart/ |
| HD | uart_if.m | 36 # The UART hardware interface. The core UART code is hardware independent.
37 # The details of the hardware are abstracted by the UART hardware interface.
52 # attach() - attach hardware.
56 # The intend of this method is to setup the hardware for normal operation.
61 # detach() - detach hardware.
65 # The intend of this method is to disable the hardware.
82 # by the hardware driver are cleared as a side-effect. A second call to
105 # service them on an interrupt priority basis. If the hardware cannot provide
122 # probe() - detect hardware.
124 # hardware exists. This function should also set the device description
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| /freebsd-13-stable/share/doc/smm/02.config/ |
| HD | 2.t | 50 available hardware
55 for identical hardware, but may have different locations for the root
98 code in the driver which understood how to handle this non-standard hardware
120 on the hardware and expected job mix. The rules
139 Hardware devices
144 those hardware devices
147 addresses, bus interconnects, etc. A system's hardware may be configured
149 whatsoever. Most people do not configure hardware devices into the
152 against a hardware
155 has hardware problems).
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| /freebsd-13-stable/sys/contrib/device-tree/src/mips/brcm/ |
| HD | bcm63268-comtrend-vr-3032u.dts | 29 brcm,hardware-controlled;
35 brcm,hardware-controlled;
66 brcm,hardware-controlled;
71 brcm,hardware-controlled;
76 brcm,hardware-controlled;
81 brcm,hardware-controlled;
86 brcm,hardware-controlled;
91 brcm,hardware-controlled;
96 brcm,hardware-controlled;
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| /freebsd-13-stable/sys/dev/isci/scil/ |
| HD | scu_remote_node_context.h | 61 * hardware to describe a remote node context.
73 * @brief This structure contains the SCU hardware definition for an SSP
90 * This field tells the SCU hardware how many simultaneous connections that
96 * This field tells the SCU hardware which logical port to associate with this
113 * This field must be set to TRUE when the hardware DMAs the remote node
114 * context to the hardware SRAM. When the remote node is being invalidated
153 * This field tells the SCU hardware how long this device may occupy the
159 * This field tells the SCU hardware how long to maintain a connection when
172 * This field is tells the hardware what to program for the connection rate in
178 * This field tells the SCU hardware what to program for the features in the
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| /freebsd-13-stable/sys/contrib/device-tree/Bindings/crypto/ |
| D | brcm,spu-crypto.txt | 1 The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
7 brcm,spum-crypto - for devices with SPU-M hardware
8 brcm,spu2-crypto - for devices with SPU2 hardware
9 brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3
11 brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
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| /freebsd-13-stable/sys/dev/ioat/ |
| HD | ioat.h | 48 * operations can be pipelined on some hardware. E.g., operation 2's source
74 * Hardware revision number. Different hardware revisions support different
82 * Hardware capabilities. Different hardware revisions support different
84 * them from hardware version.
87 * only be supported on the first two channels of some hardware.
142 * - ERANGE if the given value exceeds the delay supported by the hardware.
143 * (All current hardware supports a maximum of 0x3fff microseconds delay.)
144 * - ENODEV if the hardware does not support interrupt coalescing.
150 * ioat_set_interrupt_coalesce(). If the hardware does not support coalescing,
242 * Issues a null operation. This issues the operation to the hardware, but the
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| /freebsd-13-stable/sys/dev/ath/ath_hal/ |
| HD | ah.h | 23 * Atheros Hardware Access Layer
26 * structure for use with the device. Hardware-related operations that
71 HAL_ENXIO = 1, /* No hardware present */
73 HAL_EIO = 3, /* Hardware didn't respond as expected */
83 HAL_ENOTSUPP = 13, /* Hardware revision not supported */
84 HAL_ESELFTEST = 14, /* Hardware self-test failed */
98 HAL_CAP_CIPHER = 1, /* hardware supports cipher */
99 HAL_CAP_TKIP_MIC = 2, /* handle TKIP MIC in hardware */
100 HAL_CAP_TKIP_SPLIT = 3, /* hardware TKIP uses split keys */
101 HAL_CAP_PHYCOUNTERS = 4, /* hardware PHY error counters */
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| /freebsd-13-stable/share/doc/papers/timecounter/ |
| HD | timecounter.ms | 19 of a binary timescale using whatever hardware support is at hand
51 had neither in hardware or software any notion what time it was.
223 time formats available on UNIX for consumer grade hardware,
291 temperature of the clocks hardware and general relativistic
320 .I "using whatever hardware we have available at the time,"
323 piece of hardware to another on the fly'' since we may not know
324 right up front what hardware we have access to and which is
331 via network packets or hardware connection. This also implies
338 with external clock or frequency hardware, but it has many other
352 There are two basic options on contemporary hardware: use a 32 bit
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