1 /* $SourceForge: bktr_reg.h,v 1.3 2003/03/11 23:11:27 thomasklausner Exp $ */ 2 3 /* $NetBSD: bktr_reg.h,v 1.22 2012/10/27 17:18:36 chs Exp $ */ 4 /* 5 * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp$ 6 * 7 * Copyright (c) 1999 Roger Hardiman 8 * Copyright (c) 1998 Amancio Hasty 9 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by Mark Tinguely and Jim Lowe 23 * 4. The name of the author may not be used to endorse or promote products 24 * derived from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 * 38 */ 39 40 41 #include <sys/bus.h> 42 #include <sys/device.h> /* device_t */ 43 #include <sys/select.h> /* struct selinfo */ 44 #include <sys/reboot.h> /* AB_* for bootverbose */ 45 46 /* 47 * The kernel options for the driver now all begin with BKTR. 48 * Support the older kernel options on FreeBSD and OpenBSD. 49 * 50 */ 51 52 53 #ifndef PCI_LATENCY_TIMER 54 #define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 55 #endif 56 57 /* 58 * Definitions for the Brooktree 848/878 video capture to pci interface. 59 */ 60 61 #define BROOKTREE_848 1 62 #define BROOKTREE_848A 2 63 #define BROOKTREE_849A 3 64 #define BROOKTREE_878 4 65 #define BROOKTREE_879 5 66 67 typedef volatile u_int bregister_t; 68 /* 69 * if other persuasion endian, then compiler will probably require that 70 * these next 71 * macros be reversed 72 */ 73 #define BTBYTE(what) bregister_t what:8; int :24 74 #define BTWORD(what) bregister_t what:16; int: 16 75 #define BTLONG(what) bregister_t what:32 76 77 struct bt848_registers { 78 BTBYTE (dstatus); /* 0, 1,2,3 */ 79 #define BT848_DSTATUS_PRES (1<<7) 80 #define BT848_DSTATUS_HLOC (1<<6) 81 #define BT848_DSTATUS_FIELD (1<<5) 82 #define BT848_DSTATUS_NUML (1<<4) 83 #define BT848_DSTATUS_CSEL (1<<3) 84 #define BT848_DSTATUS_PLOCK (1<<2) 85 #define BT848_DSTATUS_LOF (1<<1) 86 #define BT848_DSTATUS_COF (1<<0) 87 BTBYTE (iform); /* 4, 5,6,7 */ 88 #define BT848_IFORM_MUXSEL (0x3<<5) 89 # define BT848_IFORM_M_MUX1 (0x03<<5) 90 # define BT848_IFORM_M_MUX0 (0x02<<5) 91 # define BT848_IFORM_M_MUX2 (0x01<<5) 92 # define BT848_IFORM_M_MUX3 (0x0) 93 # define BT848_IFORM_M_RSVD (0x00<<5) 94 #define BT848_IFORM_XTSEL (0x3<<3) 95 # define BT848_IFORM_X_AUTO (0x03<<3) 96 # define BT848_IFORM_X_XT1 (0x02<<3) 97 # define BT848_IFORM_X_XT0 (0x01<<3) 98 # define BT848_IFORM_X_RSVD (0x00<<3) 99 BTBYTE (tdec); /* 8, 9,a,b */ 100 BTBYTE (e_crop); /* c, d,e,f */ 101 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 102 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 103 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 104 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 105 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 106 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 107 BTBYTE (bright); /* 28, 29,2a,2b */ 108 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 109 #define BT848_E_CONTROL_LNOTCH (1<<7) 110 #define BT848_E_CONTROL_COMP (1<<6) 111 #define BT848_E_CONTROL_LDEC (1<<5) 112 #define BT848_E_CONTROL_CBSENSE (1<<4) 113 #define BT848_E_CONTROL_RSVD (1<<3) 114 #define BT848_E_CONTROL_CON_MSB (1<<2) 115 #define BT848_E_CONTROL_SAT_U_MSB (1<<1) 116 #define BT848_E_CONTROL_SAT_V_MSB (1<<0) 117 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 118 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 119 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 120 BTBYTE (hue); /* 3c, 3d,3e,3f */ 121 BTBYTE (e_scloop); /* 40, 41,42,43 */ 122 #define BT848_E_SCLOOP_RSVD1 (1<<7) 123 #define BT848_E_SCLOOP_CAGC (1<<6) 124 #define BT848_E_SCLOOP_CKILL (1<<5) 125 #define BT848_E_SCLOOP_HFILT (0x3<<3) 126 # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 127 # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 128 # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 129 # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 130 #define BT848_E_SCLOOP_RSVD0 (0x7<<0) 131 int :32; /* 44, 45,46,47 */ 132 BTBYTE (oform); /* 48, 49,4a,4b */ 133 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 134 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 135 BTBYTE (test); /* 54, 55,56,57 */ 136 int :32; /* 58, 59,5a,5b */ 137 int :32; /* 5c, 5d,5e,5f */ 138 BTLONG (adelay); /* 60, 61,62,63 */ 139 BTBYTE (bdelay); /* 64, 65,66,67 */ 140 BTBYTE (adc); /* 68, 69,6a,6b */ 141 #define BT848_ADC_RESERVED (0x80) /* required pattern */ 142 #define BT848_ADC_SYNC_T (1<<5) 143 #define BT848_ADC_AGC_EN (1<<4) 144 #define BT848_ADC_CLK_SLEEP (1<<3) 145 #define BT848_ADC_Y_SLEEP (1<<2) 146 #define BT848_ADC_C_SLEEP (1<<1) 147 #define BT848_ADC_CRUSH (1<<0) 148 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 149 int :32; /* 70, 71,72,73 */ 150 int :32; /* 74, 75,76,77 */ 151 int :32; /* 78, 79,7a,7b */ 152 BTLONG (sreset); /* 7c, 7d,7e,7f */ 153 u_char filler1[0x84-0x80]; 154 BTBYTE (tgctrl); /* 84, 85,86,87 */ 155 #define BT848_TGCTRL_TGCKI (3<<3) 156 #define BT848_TGCTRL_TGCKI_XTAL (0<<3) 157 #define BT848_TGCTRL_TGCKI_PLL (1<<3) 158 #define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 159 #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 160 u_char filler[0x8c-0x88]; 161 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 162 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 163 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 164 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 165 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 166 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 167 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 168 int :32; /* a8, a9,aa,ab */ 169 BTBYTE (o_control); /* ac, ad,ae,af */ 170 #define BT848_O_CONTROL_LNOTCH (1<<7) 171 #define BT848_O_CONTROL_COMP (1<<6) 172 #define BT848_O_CONTROL_LDEC (1<<5) 173 #define BT848_O_CONTROL_CBSENSE (1<<4) 174 #define BT848_O_CONTROL_RSVD (1<<3) 175 #define BT848_O_CONTROL_CON_MSB (1<<2) 176 #define BT848_O_CONTROL_SAT_U_MSB (1<<1) 177 #define BT848_O_CONTROL_SAT_V_MSB (1<<0) 178 u_char fillter4[16]; 179 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 180 #define BT848_O_SCLOOP_RSVD1 (1<<7) 181 #define BT848_O_SCLOOP_CAGC (1<<6) 182 #define BT848_O_SCLOOP_CKILL (1<<5) 183 #define BT848_O_SCLOOP_HFILT (0x3<<3) 184 #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 185 #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 186 #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 187 #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 188 #define BT848_O_SCLOOP_RSVD0 (0x7<<0) 189 int :32; /* c4, c5,c6,c7 */ 190 int :32; /* c8, c9,ca,cb */ 191 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 192 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 193 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 194 bregister_t color_ctl_swap :4; /* d8 */ 195 #define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 196 #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 197 #define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 198 #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 199 bregister_t color_ctl_gamma :1; 200 bregister_t color_ctl_rgb_ded :1; 201 bregister_t color_ctl_color_bars :1; 202 bregister_t color_ctl_ext_frmrate :1; 203 #define BT848_COLOR_CTL_GAMMA (1<<4) 204 #define BT848_COLOR_CTL_RGB_DED (1<<5) 205 #define BT848_COLOR_CTL_COLOR_BARS (1<<6) 206 #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7) 207 int :24; /* d9,da,db */ 208 BTBYTE (cap_ctl); /* dc, dd,de,df */ 209 #define BT848_CAP_CTL_DITH_FRAME (1<<4) 210 #define BT848_CAP_CTL_VBI_ODD (1<<3) 211 #define BT848_CAP_CTL_VBI_EVEN (1<<2) 212 #define BT848_CAP_CTL_ODD (1<<1) 213 #define BT848_CAP_CTL_EVEN (1<<0) 214 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 215 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 216 int :32; /* e8, e9,ea,eb */ 217 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 218 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 219 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 220 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 221 #define BT848_PLL_F_C (1<<6) 222 #define BT848_PLL_F_X (1<<7) 223 u_char filler2[0x100-0xfc]; 224 BTLONG (int_stat); /* 100, 101,102,103 */ 225 BTLONG (int_mask); /* 104, 105,106,107 */ 226 #define BT848_INT_RISCS (0xf<<28) 227 #define BT848_INT_RISC_EN (1<<27) 228 #define BT848_INT_RACK (1<<25) 229 #define BT848_INT_FIELD (1<<24) 230 #define BT848_INT_MYSTERYBIT (1<<23) 231 #define BT848_INT_SCERR (1<<19) 232 #define BT848_INT_OCERR (1<<18) 233 #define BT848_INT_PABORT (1<<17) 234 #define BT848_INT_RIPERR (1<<16) 235 #define BT848_INT_PPERR (1<<15) 236 #define BT848_INT_FDSR (1<<14) 237 #define BT848_INT_FTRGT (1<<13) 238 #define BT848_INT_FBUS (1<<12) 239 #define BT848_INT_RISCI (1<<11) 240 #define BT848_INT_GPINT (1<<9) 241 #define BT848_INT_I2CDONE (1<<8) 242 #define BT848_INT_RSV1 (1<<7) 243 #define BT848_INT_RSV0 (1<<6) 244 #define BT848_INT_VPRES (1<<5) 245 #define BT848_INT_HLOCK (1<<4) 246 #define BT848_INT_OFLOW (1<<3) 247 #define BT848_INT_HSYNC (1<<2) 248 #define BT848_INT_VSYNC (1<<1) 249 #define BT848_INT_FMTCHG (1<<0) 250 int :32; /* 108, 109,10a,10b */ 251 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 252 #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 253 #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 254 #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 255 #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 256 #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 257 #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 258 #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 259 #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 260 #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 261 #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 262 #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 263 #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 264 #define BT848_DMA_CTL_RISC_EN (1<<1) 265 #define BT848_DMA_CTL_FIFO_EN (1<<0) 266 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 267 #define BT848_DATA_CTL_I2CDIV (0xf<<4) 268 #define BT848_DATA_CTL_I2CSYNC (1<<3) 269 #define BT848_DATA_CTL_I2CW3B (1<<2) 270 #define BT848_DATA_CTL_I2CSCL (1<<1) 271 #define BT848_DATA_CTL_I2CSDA (1<<0) 272 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 273 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 274 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 275 BTLONG (risc_count); /* 120, 121,122,123 */ 276 u_char filler3[0x200-0x124]; 277 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 278 }; 279 280 281 #define BKTR_DSTATUS 0x000 282 #define BKTR_IFORM 0x004 283 #define BKTR_TDEC 0x008 284 #define BKTR_E_CROP 0x00C 285 #define BKTR_O_CROP 0x08C 286 #define BKTR_E_VDELAY_LO 0x010 287 #define BKTR_O_VDELAY_LO 0x090 288 #define BKTR_E_VACTIVE_LO 0x014 289 #define BKTR_O_VACTIVE_LO 0x094 290 #define BKTR_E_DELAY_LO 0x018 291 #define BKTR_O_DELAY_LO 0x098 292 #define BKTR_E_HACTIVE_LO 0x01C 293 #define BKTR_O_HACTIVE_LO 0x09C 294 #define BKTR_E_HSCALE_HI 0x020 295 #define BKTR_O_HSCALE_HI 0x0A0 296 #define BKTR_E_HSCALE_LO 0x024 297 #define BKTR_O_HSCALE_LO 0x0A4 298 #define BKTR_BRIGHT 0x028 299 #define BKTR_E_CONTROL 0x02C 300 #define BKTR_O_CONTROL 0x0AC 301 #define BKTR_CONTRAST_LO 0x030 302 #define BKTR_SAT_U_LO 0x034 303 #define BKTR_SAT_V_LO 0x038 304 #define BKTR_HUE 0x03C 305 #define BKTR_E_SCLOOP 0x040 306 #define BKTR_O_SCLOOP 0x0C0 307 #define BKTR_OFORM 0x048 308 #define BKTR_E_VSCALE_HI 0x04C 309 #define BKTR_O_VSCALE_HI 0x0CC 310 #define BKTR_E_VSCALE_LO 0x050 311 #define BKTR_O_VSCALE_LO 0x0D0 312 #define BKTR_TEST 0x054 313 #define BKTR_ADELAY 0x060 314 #define BKTR_BDELAY 0x064 315 #define BKTR_ADC 0x068 316 #define BKTR_E_VTC 0x06C 317 #define BKTR_O_VTC 0x0EC 318 #define BKTR_SRESET 0x07C 319 #define BKTR_COLOR_FMT 0x0D4 320 #define BKTR_COLOR_CTL 0x0D8 321 #define BKTR_CAP_CTL 0x0DC 322 #define BKTR_VBI_PACK_SIZE 0x0E0 323 #define BKTR_VBI_PACK_DEL 0x0E4 324 #define BKTR_INT_STAT 0x100 325 #define BKTR_INT_MASK 0x104 326 #define BKTR_RISC_COUNT 0x120 327 #define BKTR_RISC_STRT_ADD 0x114 328 #define BKTR_GPIO_DMA_CTL 0x10C 329 #define BKTR_GPIO_OUT_EN 0x118 330 #define BKTR_GPIO_REG_INP 0x11C 331 #define BKTR_GPIO_DATA 0x200 332 #define BKTR_I2C_DATA_CTL 0x110 333 #define BKTR_TGCTRL 0x084 334 #define BKTR_PLL_F_LO 0x0F0 335 #define BKTR_PLL_F_HI 0x0F4 336 #define BKTR_PLL_F_XCI 0x0F8 337 338 /* 339 * device support for onboard tv tuners 340 */ 341 342 /* description of the LOGICAL tuner */ 343 struct TVTUNER { 344 int frequency; 345 u_char chnlset; 346 u_char channel; 347 u_char band; 348 u_char afc; 349 u_char radio_mode; /* current mode of the radio mode */ 350 }; 351 352 /* description of the PHYSICAL tuner */ 353 struct TUNER { 354 const char* name; 355 u_char type; 356 u_char pllControl[4]; 357 u_int bandLimits[2]; 358 u_char bandAddrs[4]; /* 3 first for the 3 TV 359 ** bands. Last for radio 360 ** band (0x00=NoRadio). 361 */ 362 363 }; 364 365 /* description of the card */ 366 #define EEPROMBLOCKSIZE 32 367 struct CARDTYPE { 368 unsigned int card_id; /* card id (from #define's) */ 369 const char* name; 370 const struct TUNER* tuner; /* Tuner details */ 371 u_char tuner_pllAddr; /* Tuner i2c address */ 372 u_char dbx; /* Has DBX chip? */ 373 u_char msp3400c; /* Has msp3400c chip? */ 374 u_char dpl3518a; /* Has dpl3518a chip? */ 375 u_char eepromAddr; 376 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 377 u_int audiomuxs[5]; /* tuner, ext (line-in) */ 378 /* int/unused (radio) */ 379 /* mute, present */ 380 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 381 }; 382 383 struct format_params { 384 /* Total lines, lines before image, image lines */ 385 int vtotal, vdelay, vactive; 386 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 387 int htotal, hdelay, hactive; 388 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 389 int scaled_hactive, scaled_htotal; 390 /* frame rate . for ntsc is 30 frames per second */ 391 int frame_rate; 392 /* A-delay and B-delay */ 393 u_char adelay, bdelay; 394 /* Iform XTSEL value */ 395 int iform_xtsel; 396 /* VBI number of lines per field, and number of samples per line */ 397 int vbi_num_lines, vbi_num_samples; 398 }; 399 400 #if defined(BKTR_USE_FREEBSD_SMBUS) 401 struct bktr_i2c_softc { 402 device_t iicbus; 403 device_t smbus; 404 }; 405 #endif 406 407 408 /* Bt848/878 register access 409 * The registers can either be access via a memory mapped structure 410 * or accessed via bus_space. 411 * bus_space access allows cross platform support, where as the 412 * memory mapped structure method only works on 32 bit processors 413 * with the right type of endianness. 414 */ 415 struct bktr_softc; 416 417 u_int8_t bktr_INB(struct bktr_softc *, int); 418 u_int16_t bktr_INW(struct bktr_softc *, int); 419 u_int32_t bktr_INL(struct bktr_softc *, int); 420 void bktr_OUTB(struct bktr_softc *, int, u_int8_t); 421 void bktr_OUTW(struct bktr_softc *, int, u_int16_t); 422 void bktr_OUTL(struct bktr_softc *, int, u_int32_t); 423 424 #define INB(bktr,offset) bktr_INB(bktr,offset) 425 #define INW(bktr,offset) bktr_INW(bktr,offset) 426 #define INL(bktr,offset) bktr_INL(bktr,offset) 427 #define OUTB(bktr,offset,value) bktr_OUTB(bktr,offset,value) 428 #define OUTW(bktr,offset,value) bktr_OUTW(bktr,offset,value) 429 #define OUTL(bktr,offset,value) bktr_OUTL(bktr,offset,value) 430 431 typedef struct bktr_clip bktr_clip_t; 432 433 /* 434 * BrookTree 848 info structure, one per bt848 card installed. 435 */ 436 struct bktr_softc { 437 438 439 device_t bktr_dev; /* base device */ 440 bus_dma_tag_t dmat; /* DMA tag */ 441 bus_space_tag_t memt; 442 bus_space_handle_t memh; 443 bus_size_t obmemsz; /* size of en card (bytes) */ 444 void *ih; 445 bus_dmamap_t dm_prog; 446 bus_dmamap_t dm_oprog; 447 bus_dmamap_t dm_mem; 448 bus_dmamap_t dm_vbidata; 449 bus_dmamap_t dm_vbibuffer; 450 451 452 453 454 /* The following definitions are for the contiguous memory */ 455 vaddr_t bigbuf; /* buffer that holds the captured image */ 456 vaddr_t vbidata; /* RISC program puts VBI data from the current frame here */ 457 vaddr_t vbibuffer; /* Circular buffer holding VBI data for the user */ 458 vaddr_t dma_prog; /* RISC prog for single and/or even field capture*/ 459 vaddr_t odd_dma_prog; /* RISC program for Odd field capture */ 460 461 462 /* the following definitions are common over all platforms */ 463 int alloc_pages; /* number of pages in bigbuf */ 464 int vbiinsert; /* Position for next write into circular buffer */ 465 int vbistart; /* Position of last read from circular buffer */ 466 int vbisize; /* Number of bytes in the circular buffer */ 467 u_int vbi_sequence_number; /* sequence number for VBI */ 468 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */ 469 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */ 470 471 472 struct proc *proc; /* process to receive raised signal */ 473 int signal; /* signal to send to process */ 474 int clr_on_start; /* clear cap buf on capture start? */ 475 #define METEOR_SIG_MODE_MASK 0xffff0000 476 #define METEOR_SIG_FIELD_MODE 0x00010000 477 #define METEOR_SIG_FRAME_MODE 0x00000000 478 char dma_prog_loaded; 479 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 480 u_int synch_wait; /* wait for free buffer before continuing */ 481 short current; /* frame number in buffer (1-frames) */ 482 short rows; /* number of rows in a frame */ 483 short cols; /* number of columns in a frame */ 484 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 485 int capture_area_y_offset; /* captured. The capture area allows for */ 486 int capture_area_x_size; /* example 320x200 pixels from the centre */ 487 int capture_area_y_size; /* of the video image to be captured. */ 488 char capture_area_enabled; /* When TRUE use user's capture area. */ 489 int pixfmt; /* active pixel format (idx into fmt tbl) */ 490 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 491 u_int format; /* frame format rgb, yuv, etc.. */ 492 short frames; /* number of frames allocated */ 493 int frame_size; /* number of bytes in a frame */ 494 u_int fifo_errors; /* number of fifo capture errors since open */ 495 u_int dma_errors; /* number of DMA capture errors since open */ 496 u_int frames_captured;/* number of frames captured since open */ 497 u_int even_fields_captured; /* number of even fields captured */ 498 u_int odd_fields_captured; /* number of odd fields captured */ 499 u_int range_enable; /* enable range checking ?? */ 500 u_short capcontrol; /* reg 0xdc capture control */ 501 u_short bktr_cap_ctl; 502 volatile u_int flags; 503 #define METEOR_INITIALIZED 0x00000001 504 #define METEOR_OPEN 0x00000002 505 #define METEOR_MMAP 0x00000004 506 #define METEOR_INTR 0x00000008 507 #define METEOR_READ 0x00000010 /* XXX never gets referenced */ 508 #define METEOR_SINGLE 0x00000020 /* get single frame */ 509 #define METEOR_CONTIN 0x00000040 /* continuously get frames */ 510 #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 511 #define METEOR_CAP_MASK 0x000000f0 512 #define METEOR_NTSC 0x00000100 513 #define METEOR_PAL 0x00000200 514 #define METEOR_SECAM 0x00000400 515 #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 516 #define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 517 #define BROOKTREE_SECAM 0x00000400 /* file */ 518 #define METEOR_AUTOMODE 0x00000800 519 #define METEOR_FORM_MASK 0x00000f00 520 #define METEOR_DEV0 0x00001000 521 #define METEOR_DEV1 0x00002000 522 #define METEOR_DEV2 0x00004000 523 #define METEOR_DEV3 0x00008000 524 #define METEOR_DEV_SVIDEO 0x00006000 525 #define METEOR_DEV_RGB 0x0000a000 526 #define METEOR_DEV_MASK 0x0000f000 527 #define METEOR_RGB16 0x00010000 528 #define METEOR_RGB24 0x00020000 529 #define METEOR_YUV_PACKED 0x00040000 530 #define METEOR_YUV_PLANAR 0x00080000 531 #define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 532 #define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 533 #define METEOR_WANT_MASK 0x00300000 534 #define METEOR_ONLY_EVEN_FIELDS 0x01000000 535 #define METEOR_ONLY_ODD_FIELDS 0x02000000 536 #define METEOR_ONLY_FIELDS_MASK 0x03000000 537 #define METEOR_YUV_422 0x04000000 538 #define METEOR_OUTPUT_FMT_MASK 0x040f0000 539 #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 540 #define METEOR_RGB 0x20000000 /* meteor rgb unit */ 541 u_char tflags; /* Tuner flags (/dev/tuner) */ 542 #define TUNER_INITIALIZED 0x00000001 543 #define TUNER_OPEN 0x00000002 544 u_char vbiflags; /* VBI flags (/dev/vbi) */ 545 #define VBI_INITIALIZED 0x00000001 546 #define VBI_OPEN 0x00000002 547 #define VBI_CAPTURE 0x00000004 548 u_short fps; /* frames per second */ 549 struct meteor_video video; 550 struct TVTUNER tuner; 551 struct CARDTYPE card; 552 u_char audio_mux_select; /* current mode of the audio */ 553 u_char audio_mute_state; /* mute state of the audio */ 554 u_char format_params; 555 u_int current_sol; 556 u_int current_col; 557 int clip_start; 558 int line_length; 559 int last_y; 560 int y; 561 int y2; 562 int yclip; 563 int yclip2; 564 int max_clip_node; 565 bktr_clip_t clip_list[100]; 566 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */ 567 int bt848_tuner; 568 int bt848_card; 569 u_int id; 570 #define BT848_USE_XTALS 0 571 #define BT848_USE_PLL 1 572 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ 573 int remote_control; /* remote control detected */ 574 int remote_control_addr; /* remote control i2c address */ 575 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 576 int msp_addr; /* MSP i2c address */ 577 char dpl_version_string[9]; /* DPL version string 35xxx-xx */ 578 int dpl_addr; /* DPL i2c address */ 579 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */ 580 /* 1 = use slow MSP3410/3415 programming sequence */ 581 /* 2 = use Tuner's Mono audio output via the MSP chip */ 582 int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */ 583 int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */ 584 int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */ 585 void *sih; 586 587 }; 588 589 typedef struct bktr_softc bktr_reg_t; 590 typedef struct bktr_softc* bktr_ptr_t; 591 592 #define Bt848_MAX_SIGN 16 593 594 struct bt848_card_sig { 595 int card; 596 int tuner; 597 u_char signature[Bt848_MAX_SIGN]; 598 }; 599 600 601 /***********************************************************/ 602 /* ioctl_cmd_t int on old versions, u_long on new versions */ 603 /***********************************************************/ 604 605 606 607 typedef u_long ioctl_cmd_t; 608 609 610