xref: /freebsd-13-stable/sys/mips/nlm/intr_machdep.c (revision 3bc80996974a61a4223eae4c1ccd47b6ee32a48a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
5  * reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are
9  * met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in
15  *    the documentation and/or other materials provided with the
16  *    distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28  * THE POSSIBILITY OF SUCH DAMAGE.
29  *
30  * NETLOGIC_BSD */
31 
32 #include <sys/cdefs.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/interrupt.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 
40 #include <dev/ofw/ofw_bus.h>
41 #include <dev/ofw/ofw_bus_subr.h>
42 
43 #include <machine/cpu.h>
44 #include <machine/cpufunc.h>
45 #include <machine/cpuinfo.h>
46 #include <machine/cpuregs.h>
47 #include <machine/frame.h>
48 #include <machine/intr_machdep.h>
49 #include <machine/md_var.h>
50 #include <machine/trap.h>
51 #include <machine/hwfunc.h>
52 
53 #include <mips/nlm/hal/haldefs.h>
54 #include <mips/nlm/hal/iomap.h>
55 #include <mips/nlm/hal/mips-extns.h>
56 #include <mips/nlm/interrupt.h>
57 #include <mips/nlm/hal/pic.h>
58 #include <mips/nlm/xlp.h>
59 
60 #define INTRCNT_COUNT	256
61 #define	INTRNAME_LEN	(2*MAXCOMLEN + 1)
62 
63 MALLOC_DECLARE(M_MIPSINTR);
64 MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling");
65 
66 u_long *intrcnt;
67 char *intrnames;
68 size_t sintrcnt;
69 size_t sintrnames;
70 
71 struct xlp_intrsrc {
72 	void (*bus_ack)(int, void *);	/* Additional ack */
73 	void *bus_ack_arg;		/* arg for additional ack */
74 	struct intr_event *ie;		/* event corresponding to intr */
75 	int irq;
76 	int irt;
77 };
78 
79 static struct xlp_intrsrc xlp_interrupts[XLR_MAX_INTR];
80 static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR];
81 static int intrcnt_index;
82 
83 int
xlp_irq_to_irt(int irq)84 xlp_irq_to_irt(int irq)
85 {
86 	uint32_t offset;
87 
88 	switch (irq) {
89 	case PIC_UART_0_IRQ:
90 	case PIC_UART_1_IRQ:
91 		offset =  XLP_IO_UART_OFFSET(0, irq - PIC_UART_0_IRQ);
92 		return (xlp_socdev_irt(offset));
93 	case PIC_PCIE_0_IRQ:
94 	case PIC_PCIE_1_IRQ:
95 	case PIC_PCIE_2_IRQ:
96 	case PIC_PCIE_3_IRQ:
97 		offset = XLP_IO_PCIE_OFFSET(0, irq - PIC_PCIE_0_IRQ);
98 		return (xlp_socdev_irt(offset));
99 	case PIC_USB_0_IRQ:
100 	case PIC_USB_1_IRQ:
101 	case PIC_USB_2_IRQ:
102 	case PIC_USB_3_IRQ:
103 	case PIC_USB_4_IRQ:
104 		offset = XLP_IO_USB_OFFSET(0, irq - PIC_USB_0_IRQ);
105 		return (xlp_socdev_irt(offset));
106 	case PIC_I2C_0_IRQ:
107 	case PIC_I2C_1_IRQ:
108 		offset = XLP_IO_I2C0_OFFSET(0);
109 		return (xlp_socdev_irt(offset) + irq - PIC_I2C_0_IRQ);
110 	default:
111 		printf("ERROR: %s: unknown irq %d\n", __func__, irq);
112 		return (-1);
113 	}
114 }
115 
116 void
xlp_enable_irq(int irq)117 xlp_enable_irq(int irq)
118 {
119 	uint64_t eimr;
120 
121 	eimr = nlm_read_c0_eimr();
122 	nlm_write_c0_eimr(eimr | (1ULL << irq));
123 }
124 
125 void
cpu_establish_softintr(const char * name,driver_filter_t * filt,void (* handler)(void *),void * arg,int irq,int flags,void ** cookiep)126 cpu_establish_softintr(const char *name, driver_filter_t * filt,
127     void (*handler) (void *), void *arg, int irq, int flags,
128     void **cookiep)
129 {
130 
131 	panic("Soft interrupts unsupported!\n");
132 }
133 
134 static void
xlp_post_filter(void * source)135 xlp_post_filter(void *source)
136 {
137 	struct xlp_intrsrc *src = source;
138 
139 	if (src->bus_ack)
140 		src->bus_ack(src->irq, src->bus_ack_arg);
141 	nlm_pic_ack(xlp_pic_base, src->irt);
142 }
143 
144 static void
xlp_pre_ithread(void * source)145 xlp_pre_ithread(void *source)
146 {
147 	struct xlp_intrsrc *src = source;
148 
149 	if (src->bus_ack)
150 		src->bus_ack(src->irq, src->bus_ack_arg);
151 }
152 
153 static void
xlp_post_ithread(void * source)154 xlp_post_ithread(void *source)
155 {
156 	struct xlp_intrsrc *src = source;
157 
158 	nlm_pic_ack(xlp_pic_base, src->irt);
159 }
160 
161 void
xlp_set_bus_ack(int irq,void (* ack)(int,void *),void * arg)162 xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg)
163 {
164 	struct xlp_intrsrc *src;
165 
166 	KASSERT(irq > 0 && irq <= XLR_MAX_INTR,
167 	    ("%s called for bad hard intr %d", __func__, irq));
168 
169 	/* no locking needed - this will called early in boot */
170 	src = &xlp_interrupts[irq];
171 	KASSERT(src->ie != NULL,
172 	    ("%s called after IRQ enable for %d.", __func__, irq));
173 	src->bus_ack_arg = arg;
174 	src->bus_ack = ack;
175 }
176 
177 void
cpu_establish_hardintr(const char * name,driver_filter_t * filt,void (* handler)(void *),void * arg,int irq,int flags,void ** cookiep)178 cpu_establish_hardintr(const char *name, driver_filter_t * filt,
179     void (*handler) (void *), void *arg, int irq, int flags,
180     void **cookiep)
181 {
182 	struct intr_event *ie;	/* descriptor for the IRQ */
183 	struct xlp_intrsrc *src = NULL;
184 	int errcode;
185 
186 	KASSERT(irq > 0 && irq <= XLR_MAX_INTR ,
187 	    ("%s called for bad hard intr %d", __func__, irq));
188 
189 	/*
190 	 * Locking - not needed now, because we do this only on
191 	 * startup from CPU0
192 	 */
193 	src = &xlp_interrupts[irq];
194 	ie = src->ie;
195 	if (ie == NULL) {
196 		/*
197 		 * PIC based interrupts need ack in PIC, and some SoC
198 		 * components need additional acks (e.g. PCI)
199 		 */
200 		if (XLP_IRQ_IS_PICINTR(irq))
201 			errcode = intr_event_create(&ie, src, 0, irq,
202 			    xlp_pre_ithread, xlp_post_ithread, xlp_post_filter,
203 			    NULL, "hard intr%d:", irq);
204 		else {
205 			if (filt == NULL)
206 				panic("Unsupported non filter percpu intr %d", irq);
207 			errcode = intr_event_create(&ie, src, 0, irq,
208 			    NULL, NULL, NULL, NULL, "hard intr%d:", irq);
209 		}
210 		if (errcode) {
211 			printf("Could not create event for intr %d\n", irq);
212 			return;
213 		}
214 		src->irq = irq;
215 		src->ie = ie;
216 	}
217 	if (XLP_IRQ_IS_PICINTR(irq)) {
218 		/* Set all irqs to CPU 0 for now */
219 		src->irt = xlp_irq_to_irt(irq);
220 		nlm_pic_write_irt_direct(xlp_pic_base, src->irt, 1, 0,
221 		    PIC_LOCAL_SCHEDULING, irq, 0);
222 	}
223 
224 	intr_event_add_handler(ie, name, filt, handler, arg,
225 	    intr_priority(flags), flags, cookiep);
226 	xlp_enable_irq(irq);
227 }
228 
229 void
cpu_intr(struct trapframe * tf)230 cpu_intr(struct trapframe *tf)
231 {
232 	struct intr_event *ie;
233 	uint64_t eirr, eimr;
234 	int i;
235 
236 	critical_enter();
237 
238 	/* find a list of enabled interrupts */
239 	eirr = nlm_read_c0_eirr();
240 	eimr = nlm_read_c0_eimr();
241 	eirr &= eimr;
242 
243 	if (eirr == 0) {
244 		critical_exit();
245 		return;
246 	}
247 	/*
248 	 * No need to clear the EIRR here as the handler writes to
249 	 * compare which ACKs the interrupt.
250 	 */
251 	if (eirr & (1 << IRQ_TIMER)) {
252 		intr_event_handle(xlp_interrupts[IRQ_TIMER].ie, tf);
253 		critical_exit();
254 		return;
255 	}
256 
257 	/* FIXME sched pin >? LOCK>? */
258 	for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
259 		if ((eirr & (1ULL << i)) == 0)
260 			continue;
261 
262 		ie = xlp_interrupts[i].ie;
263 		/* Don't account special IRQs */
264 		switch (i) {
265 		case IRQ_IPI:
266 		case IRQ_MSGRING:
267 			break;
268 		default:
269 			mips_intrcnt_inc(mips_intr_counters[i]);
270 		}
271 
272 		/* Ack the IRQ on the CPU */
273 		nlm_write_c0_eirr(1ULL << i);
274 		if (intr_event_handle(ie, tf) != 0) {
275 			printf("stray interrupt %d\n", i);
276 		}
277 	}
278 	critical_exit();
279 }
280 
281 void
mips_intrcnt_setname(mips_intrcnt_t counter,const char * name)282 mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
283 {
284 	int idx = counter - intrcnt;
285 
286 	KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
287 
288 	snprintf(intrnames + (MAXCOMLEN + 1) * idx,
289 	    MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
290 }
291 
292 mips_intrcnt_t
mips_intrcnt_create(const char * name)293 mips_intrcnt_create(const char* name)
294 {
295 	mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
296 
297 	mips_intrcnt_setname(counter, name);
298 	return counter;
299 }
300 
301 void
cpu_init_interrupts()302 cpu_init_interrupts()
303 {
304 	int i;
305 	char name[MAXCOMLEN + 1];
306 
307 	intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR,
308 	    M_WAITOK | M_ZERO);
309 	intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR,
310 	    M_WAITOK | M_ZERO);
311 	sintrcnt = INTRCNT_COUNT * sizeof(u_long);
312 	sintrnames = INTRCNT_COUNT * INTRNAME_LEN;
313 
314 	/*
315 	 * Initialize all available vectors so spare IRQ
316 	 * would show up in systat output
317 	 */
318 	for (i = 0; i < XLR_MAX_INTR; i++) {
319 		snprintf(name, MAXCOMLEN + 1, "int%d:", i);
320 		mips_intr_counters[i] = mips_intrcnt_create(name);
321 	}
322 }
323 
324 static int	xlp_pic_probe(device_t);
325 static int	xlp_pic_attach(device_t);
326 
327 static int
xlp_pic_probe(device_t dev)328 xlp_pic_probe(device_t dev)
329 {
330 
331 	if (!ofw_bus_is_compatible(dev, "netlogic,xlp-pic"))
332 		return (ENXIO);
333 	device_set_desc(dev, "XLP PIC");
334 	return (0);
335 }
336 
337 static int
xlp_pic_attach(device_t dev)338 xlp_pic_attach(device_t dev)
339 {
340 
341 	return (0);
342 }
343 
344 static device_method_t xlp_pic_methods[] = {
345 	DEVMETHOD(device_probe,		xlp_pic_probe),
346 	DEVMETHOD(device_attach,	xlp_pic_attach),
347 
348 	DEVMETHOD_END
349 };
350 
351 static driver_t xlp_pic_driver = {
352 	"xlp_pic",
353 	xlp_pic_methods,
354 	1,		/* no softc */
355 };
356 
357 static devclass_t xlp_pic_devclass;
358 DRIVER_MODULE(xlp_pic, simplebus, xlp_pic_driver, xlp_pic_devclass, 0, 0);
359