1 /*- 2 * Copyright (c) 2002-2007 Neterion, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/10/sys/dev/nxge/include/xgehal-mgmt.h 173139 2007-10-29 14:19:32Z rwatson $ 27 */ 28 29 #ifndef XGE_HAL_MGMT_H 30 #define XGE_HAL_MGMT_H 31 32 #include <dev/nxge/include/xge-os-pal.h> 33 #include <dev/nxge/include/xge-debug.h> 34 #include <dev/nxge/include/xgehal-types.h> 35 #include <dev/nxge/include/xgehal-config.h> 36 #include <dev/nxge/include/xgehal-stats.h> 37 #include <dev/nxge/include/xgehal-regs.h> 38 #include <dev/nxge/include/xgehal-device.h> 39 40 __EXTERN_BEGIN_DECLS 41 42 /** 43 * struct xge_hal_mgmt_about_info_t - About info. 44 * @vendor: PCI Vendor ID. 45 * @device: PCI Device ID. 46 * @subsys_vendor: PCI Subsystem Vendor ID. 47 * @subsys_device: PCI Subsystem Device ID. 48 * @board_rev: PCI Board revision, e.g. 3 - for Xena 3. 49 * @vendor_name: Neterion, Inc. 50 * @chip_name: Xframe. 51 * @media: Fiber, copper. 52 * @hal_major: HAL major version number. 53 * @hal_minor: HAL minor version number. 54 * @hal_fix: HAL fix number. 55 * @hal_build: HAL build number. 56 * @ll_major: Link-layer ULD major version number. 57 * @ll_minor: Link-layer ULD minor version number. 58 * @ll_fix: Link-layer ULD fix version number. 59 * @ll_build: Link-layer ULD build number. 60 * @transponder_temperature: TODO 61 */ 62 typedef struct xge_hal_mgmt_about_info_t { 63 u16 vendor; 64 u16 device; 65 u16 subsys_vendor; 66 u16 subsys_device; 67 u8 board_rev; 68 char vendor_name[16]; 69 char chip_name[16]; 70 char media[16]; 71 char hal_major[4]; 72 char hal_minor[4]; 73 char hal_fix[4]; 74 char hal_build[16]; 75 char ll_major[4]; 76 char ll_minor[4]; 77 char ll_fix[4]; 78 char ll_build[16]; 79 u32 transponder_temperature; 80 } xge_hal_mgmt_about_info_t; 81 82 typedef xge_hal_stats_hw_info_t xge_hal_mgmt_hw_stats_t; 83 typedef xge_hal_stats_pcim_info_t xge_hal_mgmt_pcim_stats_t; 84 typedef xge_hal_stats_sw_err_t xge_hal_mgmt_sw_stats_t; 85 typedef xge_hal_stats_device_info_t xge_hal_mgmt_device_stats_t; 86 typedef xge_hal_stats_channel_info_t xge_hal_mgmt_channel_stats_t; 87 typedef xge_hal_device_config_t xge_hal_mgmt_device_config_t; 88 typedef xge_hal_driver_config_t xge_hal_mgmt_driver_config_t; 89 typedef xge_hal_pci_config_t xge_hal_mgmt_pci_config_t; 90 91 xge_hal_status_e 92 xge_hal_mgmt_about(xge_hal_device_h devh, xge_hal_mgmt_about_info_t *about_info, 93 int size); 94 95 xge_hal_status_e 96 xge_hal_mgmt_hw_stats(xge_hal_device_h devh, xge_hal_mgmt_hw_stats_t *hw_stats, 97 int size); 98 99 xge_hal_status_e 100 xge_hal_mgmt_hw_stats_off(xge_hal_device_h devh, int off, int size, char *out); 101 102 xge_hal_status_e 103 xge_hal_mgmt_pcim_stats(xge_hal_device_h devh, 104 xge_hal_mgmt_pcim_stats_t *pcim_stats, int size); 105 106 xge_hal_status_e 107 xge_hal_mgmt_pcim_stats_off(xge_hal_device_h devh, int off, int size, 108 char *out); 109 110 xge_hal_status_e 111 xge_hal_mgmt_sw_stats(xge_hal_device_h devh, xge_hal_mgmt_sw_stats_t *hw_stats, 112 int size); 113 114 xge_hal_status_e 115 xge_hal_mgmt_device_stats(xge_hal_device_h devh, 116 xge_hal_mgmt_device_stats_t *device_stats, int size); 117 118 xge_hal_status_e 119 xge_hal_mgmt_channel_stats(xge_hal_channel_h channelh, 120 xge_hal_mgmt_channel_stats_t *channel_stats, int size); 121 122 xge_hal_status_e 123 xge_hal_mgmt_reg_read(xge_hal_device_h devh, int bar_id, unsigned int offset, 124 u64 *value); 125 126 xge_hal_status_e 127 xge_hal_mgmt_reg_write(xge_hal_device_h devh, int bar_id, unsigned int offset, 128 u64 value); 129 130 xge_hal_status_e 131 xge_hal_mgmt_pcireg_read(xge_hal_device_h devh, unsigned int offset, 132 int bits, u32 *value); 133 134 xge_hal_status_e 135 xge_hal_mgmt_device_config(xge_hal_device_h devh, 136 xge_hal_mgmt_device_config_t *dev_config, int size); 137 138 xge_hal_status_e 139 xge_hal_mgmt_driver_config(xge_hal_mgmt_driver_config_t *drv_config, 140 int size); 141 142 xge_hal_status_e 143 xge_hal_mgmt_pci_config(xge_hal_device_h devh, 144 xge_hal_mgmt_pci_config_t *pci_config, int size); 145 146 xge_hal_status_e 147 xge_hal_pma_loopback( xge_hal_device_h devh, int enable ); 148 149 xge_hal_status_e 150 xge_hal_rldram_test(xge_hal_device_h devh, u64 * data); 151 152 u16 153 xge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr ); 154 155 xge_hal_status_e 156 xge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value ); 157 158 u32 159 xge_hal_read_xfp_current_temp(xge_hal_device_h devh); 160 161 xge_hal_status_e 162 xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data); 163 164 xge_hal_status_e 165 xge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt); 166 167 xge_hal_status_e 168 xge_hal_register_test(xge_hal_device_h devh, u64 *data); 169 170 xge_hal_status_e 171 xge_hal_eeprom_test(xge_hal_device_h devh, u64 *data); 172 173 xge_hal_status_e 174 xge_hal_bist_test(xge_hal_device_h devh, u64 *data); 175 176 xge_hal_status_e 177 xge_hal_link_test(xge_hal_device_h devh, u64 *data); 178 179 int 180 xge_hal_setpause_data(xge_hal_device_h devh, int tx, int rx); 181 182 void 183 xge_hal_getpause_data(xge_hal_device_h devh, int *tx, int *rx); 184 185 void 186 __hal_updt_stats_xpak(xge_hal_device_t *hldev); 187 188 void 189 __hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value); 190 191 #ifdef XGE_TRACE_INTO_CIRCULAR_ARR 192 xge_hal_status_e 193 xge_hal_mgmt_trace_read(char *buffer, unsigned buf_size, unsigned *offset, 194 unsigned *read_length); 195 #endif 196 197 void 198 xge_hal_restore_link_led(xge_hal_device_h devh); 199 200 201 void 202 xge_hal_flick_link_led(xge_hal_device_h devh); 203 204 /* 205 * Some set of Xena3 Cards were known to have some link LED 206 * Problems. This macro identifies if the card is among them 207 * given its Sub system ID. 208 */ 209 #define CARDS_WITH_FAULTY_LINK_INDICATORS(subid) \ 210 ((((subid >= 0x600B) && (subid <= 0x600D)) || \ 211 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) 212 #define CHECKBIT(value, nbit) (value & (1 << nbit)) 213 214 #ifdef XGE_HAL_USE_MGMT_AUX 215 #include <dev/nxge/include/xgehal-mgmtaux.h> 216 #endif 217 218 __EXTERN_END_DECLS 219 220 #endif /* XGE_HAL_MGMT_H */ 221