1 /*-
2 * Copyright (c) 2002-2007 Neterion, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 #include <dev/nxge/include/xgehal-mgmt.h>
30 #include <dev/nxge/include/xgehal-driver.h>
31 #include <dev/nxge/include/xgehal-device.h>
32
33 #ifdef XGE_OS_HAS_SNPRINTF
34 #define __hal_aux_snprintf(retbuf, bufsize, fmt, key, value, retsize) \
35 if (bufsize <= 0) return XGE_HAL_ERR_OUT_OF_SPACE; \
36 retsize = xge_os_snprintf(retbuf, bufsize, fmt, key, \
37 XGE_HAL_AUX_SEPA, value); \
38 if (retsize < 0 || retsize >= bufsize) return XGE_HAL_ERR_OUT_OF_SPACE;
39 #else
40 #define __hal_aux_snprintf(retbuf, bufsize, fmt, key, value, retsize) \
41 if (bufsize <= 0) return XGE_HAL_ERR_OUT_OF_SPACE; \
42 retsize = xge_os_sprintf(retbuf, fmt, key, XGE_HAL_AUX_SEPA, value); \
43 xge_assert(retsize < bufsize); \
44 if (retsize < 0 || retsize >= bufsize) \
45 return XGE_HAL_ERR_OUT_OF_SPACE;
46 #endif
47
48 #define __HAL_AUX_ENTRY_DECLARE(size, buf) \
49 int entrysize = 0, leftsize = size; \
50 char *ptr = buf;
51
52 #define __HAL_AUX_ENTRY(key, value, fmt) \
53 ptr += entrysize; leftsize -= entrysize; \
54 __hal_aux_snprintf(ptr, leftsize, "%s%c"fmt"\n", key, value, entrysize)
55
56 #define __HAL_AUX_ENTRY_END(bufsize, retsize) \
57 leftsize -= entrysize; \
58 *retsize = bufsize - leftsize;
59
60 #define __hal_aux_pci_link_info(name, index, var) { \
61 __HAL_AUX_ENTRY(name, \
62 (unsigned long long)pcim.link_info[index].var, "%llu") \
63 }
64
65 #define __hal_aux_pci_aggr_info(name, index, var) { \
66 __HAL_AUX_ENTRY(name, \
67 (unsigned long long)pcim.aggr_info[index].var, "%llu") \
68 }
69
70 /**
71 * xge_hal_aux_bar0_read - Read and format Xframe BAR0 register.
72 * @devh: HAL device handle.
73 * @offset: Register offset in the BAR0 space.
74 * @bufsize: Buffer size.
75 * @retbuf: Buffer pointer.
76 * @retsize: Size of the result. Cannot be greater than @bufsize.
77 *
78 * Read Xframe register from BAR0 space. The result is formatted as an ascii string.
79 *
80 * Returns: XGE_HAL_OK - success.
81 * XGE_HAL_ERR_OUT_OF_SPACE - Buffer size is very small.
82 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
83 * XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
84 * valid.
85 * XGE_HAL_ERR_INVALID_BAR_ID - BAR id is not valid.
86 *
87 * See also: xge_hal_mgmt_reg_read().
88 */
xge_hal_aux_bar0_read(xge_hal_device_h devh,unsigned int offset,int bufsize,char * retbuf,int * retsize)89 xge_hal_status_e xge_hal_aux_bar0_read(xge_hal_device_h devh,
90 unsigned int offset, int bufsize, char *retbuf,
91 int *retsize)
92 {
93 xge_hal_status_e status;
94 u64 retval;
95
96 status = xge_hal_mgmt_reg_read(devh, 0, offset, &retval);
97 if (status != XGE_HAL_OK) {
98 return status;
99 }
100
101 if (bufsize < XGE_OS_SPRINTF_STRLEN) {
102 return XGE_HAL_ERR_OUT_OF_SPACE;
103 }
104
105 *retsize = xge_os_sprintf(retbuf, "0x%04X%c0x%08X%08X\n", offset,
106 XGE_HAL_AUX_SEPA, (u32)(retval>>32), (u32)retval);
107
108 return XGE_HAL_OK;
109 }
110
111 /**
112 * xge_hal_aux_bar1_read - Read and format Xframe BAR1 register.
113 * @devh: HAL device handle.
114 * @offset: Register offset in the BAR1 space.
115 * @bufsize: Buffer size.
116 * @retbuf: Buffer pointer.
117 * @retsize: Size of the result. Cannot be greater than @bufsize.
118 *
119 * Read Xframe register from BAR1 space. The result is formatted as ascii string.
120 * Returns: XGE_HAL_OK - success.
121 * XGE_HAL_ERR_OUT_OF_SPACE - Buffer size is very small.
122 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
123 * XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
124 * valid.
125 * XGE_HAL_ERR_INVALID_BAR_ID - BAR id is not valid.
126 *
127 * See also: xge_hal_mgmt_reg_read().
128 */
xge_hal_aux_bar1_read(xge_hal_device_h devh,unsigned int offset,int bufsize,char * retbuf,int * retsize)129 xge_hal_status_e xge_hal_aux_bar1_read(xge_hal_device_h devh,
130 unsigned int offset, int bufsize, char *retbuf,
131 int *retsize)
132 {
133 xge_hal_status_e status;
134 u64 retval;
135
136 status = xge_hal_mgmt_reg_read(devh, 1, offset, &retval);
137 if (status != XGE_HAL_OK) {
138 return status;
139 }
140
141 if (bufsize < XGE_OS_SPRINTF_STRLEN) {
142 return XGE_HAL_ERR_OUT_OF_SPACE;
143 }
144
145 *retsize = xge_os_sprintf(retbuf, "0x%04X%c0x%08X%08X\n",
146 offset,
147 XGE_HAL_AUX_SEPA, (u32)(retval>>32), (u32)retval);
148
149 return XGE_HAL_OK;
150 }
151
152 /**
153 * xge_hal_aux_bar0_write - Write BAR0 register.
154 * @devh: HAL device handle.
155 * @offset: Register offset in the BAR0 space.
156 * @value: Regsister value (to write).
157 *
158 * Write BAR0 register.
159 *
160 * Returns: XGE_HAL_OK - success.
161 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
162 * XGE_HAL_ERR_INVALID_OFFSET - Register offset in the BAR space is not
163 * valid.
164 * XGE_HAL_ERR_INVALID_BAR_ID - BAR id is not valid.
165 *
166 * See also: xge_hal_mgmt_reg_write().
167 */
xge_hal_aux_bar0_write(xge_hal_device_h devh,unsigned int offset,u64 value)168 xge_hal_status_e xge_hal_aux_bar0_write(xge_hal_device_h devh,
169 unsigned int offset, u64 value)
170 {
171 xge_hal_status_e status;
172
173 status = xge_hal_mgmt_reg_write(devh, 0, offset, value);
174 if (status != XGE_HAL_OK) {
175 return status;
176 }
177
178 return XGE_HAL_OK;
179 }
180
181 /**
182 * xge_hal_aux_about_read - Retrieve and format about info.
183 * @devh: HAL device handle.
184 * @bufsize: Buffer size.
185 * @retbuf: Buffer pointer.
186 * @retsize: Size of the result. Cannot be greater than @bufsize.
187 *
188 * Retrieve about info (using xge_hal_mgmt_about()) and sprintf it
189 * into the provided @retbuf.
190 *
191 * Returns: XGE_HAL_OK - success.
192 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
193 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
194 * XGE_HAL_FAIL - Failed to retrieve the information.
195 *
196 * See also: xge_hal_mgmt_about(), xge_hal_aux_device_dump().
197 */
xge_hal_aux_about_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)198 xge_hal_status_e xge_hal_aux_about_read(xge_hal_device_h devh, int bufsize,
199 char *retbuf, int *retsize)
200 {
201 xge_hal_status_e status;
202 xge_hal_mgmt_about_info_t about_info;
203 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
204
205 status = xge_hal_mgmt_about(devh, &about_info,
206 sizeof(xge_hal_mgmt_about_info_t));
207 if (status != XGE_HAL_OK) {
208 return status;
209 }
210
211 __HAL_AUX_ENTRY("vendor", about_info.vendor, "0x%x");
212 __HAL_AUX_ENTRY("device", about_info.device, "0x%x");
213 __HAL_AUX_ENTRY("subsys_vendor", about_info.subsys_vendor, "0x%x");
214 __HAL_AUX_ENTRY("subsys_device", about_info.subsys_device, "0x%x");
215 __HAL_AUX_ENTRY("board_rev", about_info.board_rev, "0x%x");
216 __HAL_AUX_ENTRY("vendor_name", about_info.vendor_name, "%s");
217 __HAL_AUX_ENTRY("chip_name", about_info.chip_name, "%s");
218 __HAL_AUX_ENTRY("media", about_info.media, "%s");
219 __HAL_AUX_ENTRY("hal_major", about_info.hal_major, "%s");
220 __HAL_AUX_ENTRY("hal_minor", about_info.hal_minor, "%s");
221 __HAL_AUX_ENTRY("hal_fix", about_info.hal_fix, "%s");
222 __HAL_AUX_ENTRY("hal_build", about_info.hal_build, "%s");
223 __HAL_AUX_ENTRY("ll_major", about_info.ll_major, "%s");
224 __HAL_AUX_ENTRY("ll_minor", about_info.ll_minor, "%s");
225 __HAL_AUX_ENTRY("ll_fix", about_info.ll_fix, "%s");
226 __HAL_AUX_ENTRY("ll_build", about_info.ll_build, "%s");
227
228 __HAL_AUX_ENTRY("transponder_temperature",
229 about_info.transponder_temperature, "%d C");
230
231 __HAL_AUX_ENTRY_END(bufsize, retsize);
232
233 return XGE_HAL_OK;
234 }
235
236 /**
237 * xge_hal_aux_stats_tmac_read - Read TMAC hardware statistics.
238 * @devh: HAL device handle.
239 * @bufsize: Buffer size.
240 * @retbuf: Buffer pointer.
241 * @retsize: Size of the result. Cannot be greater than @bufsize.
242 *
243 * Read TMAC hardware statistics. This is a subset of stats counters
244 * from xge_hal_stats_hw_info_t{}.
245 *
246 * Returns: XGE_HAL_OK - success.
247 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
248 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
249 *
250 * See also: xge_hal_mgmt_hw_stats{}, xge_hal_stats_hw_info_t{},
251 * xge_hal_aux_stats_pci_read(),
252 * xge_hal_aux_device_dump().
253 */
xge_hal_aux_stats_tmac_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)254 xge_hal_status_e xge_hal_aux_stats_tmac_read(xge_hal_device_h devh, int bufsize,
255 char *retbuf, int *retsize)
256 {
257 xge_hal_status_e status;
258 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
259
260 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
261
262 if (xge_hal_device_check_id(hldev) != XGE_HAL_CARD_TITAN) {
263 xge_hal_mgmt_hw_stats_t hw;
264
265 status = xge_hal_mgmt_hw_stats(devh, &hw,
266 sizeof(xge_hal_mgmt_hw_stats_t));
267 if (status != XGE_HAL_OK) {
268 return status;
269 }
270
271 __HAL_AUX_ENTRY("tmac_data_octets", hw.tmac_data_octets, "%u");
272 __HAL_AUX_ENTRY("tmac_frms", hw.tmac_frms, "%u");
273 __HAL_AUX_ENTRY("tmac_drop_frms", (unsigned long long)
274 hw.tmac_drop_frms, "%llu");
275 __HAL_AUX_ENTRY("tmac_bcst_frms", hw.tmac_bcst_frms, "%u");
276 __HAL_AUX_ENTRY("tmac_mcst_frms", hw.tmac_mcst_frms, "%u");
277 __HAL_AUX_ENTRY("tmac_pause_ctrl_frms", (unsigned long long)
278 hw.tmac_pause_ctrl_frms, "%llu");
279 __HAL_AUX_ENTRY("tmac_ucst_frms", hw.tmac_ucst_frms, "%u");
280 __HAL_AUX_ENTRY("tmac_ttl_octets", hw.tmac_ttl_octets, "%u");
281 __HAL_AUX_ENTRY("tmac_any_err_frms", hw.tmac_any_err_frms, "%u");
282 __HAL_AUX_ENTRY("tmac_nucst_frms", hw.tmac_nucst_frms, "%u");
283 __HAL_AUX_ENTRY("tmac_ttl_less_fb_octets", (unsigned long long)
284 hw.tmac_ttl_less_fb_octets, "%llu");
285 __HAL_AUX_ENTRY("tmac_vld_ip_octets", (unsigned long long)
286 hw.tmac_vld_ip_octets, "%llu");
287 __HAL_AUX_ENTRY("tmac_drop_ip", hw.tmac_drop_ip, "%u");
288 __HAL_AUX_ENTRY("tmac_vld_ip", hw.tmac_vld_ip, "%u");
289 __HAL_AUX_ENTRY("tmac_rst_tcp", hw.tmac_rst_tcp, "%u");
290 __HAL_AUX_ENTRY("tmac_icmp", hw.tmac_icmp, "%u");
291 __HAL_AUX_ENTRY("tmac_tcp", (unsigned long long)
292 hw.tmac_tcp, "%llu");
293 __HAL_AUX_ENTRY("reserved_0", hw.reserved_0, "%u");
294 __HAL_AUX_ENTRY("tmac_udp", hw.tmac_udp, "%u");
295 } else {
296 int i;
297 xge_hal_mgmt_pcim_stats_t pcim;
298 status = xge_hal_mgmt_pcim_stats(devh, &pcim,
299 sizeof(xge_hal_mgmt_pcim_stats_t));
300 if (status != XGE_HAL_OK) {
301 return status;
302 }
303
304 for (i = 0; i < XGE_HAL_MAC_LINKS; i++) {
305 __hal_aux_pci_link_info("tx_frms", i,
306 tx_frms);
307 __hal_aux_pci_link_info("tx_ttl_eth_octets",
308 i, tx_ttl_eth_octets );
309 __hal_aux_pci_link_info("tx_data_octets", i,
310 tx_data_octets);
311 __hal_aux_pci_link_info("tx_mcst_frms", i,
312 tx_mcst_frms);
313 __hal_aux_pci_link_info("tx_bcst_frms", i,
314 tx_bcst_frms);
315 __hal_aux_pci_link_info("tx_ucst_frms", i,
316 tx_ucst_frms);
317 __hal_aux_pci_link_info("tx_tagged_frms", i,
318 tx_tagged_frms);
319 __hal_aux_pci_link_info("tx_vld_ip", i,
320 tx_vld_ip);
321 __hal_aux_pci_link_info("tx_vld_ip_octets", i,
322 tx_vld_ip_octets);
323 __hal_aux_pci_link_info("tx_icmp", i,
324 tx_icmp);
325 __hal_aux_pci_link_info("tx_tcp", i,
326 tx_tcp);
327 __hal_aux_pci_link_info("tx_rst_tcp", i,
328 tx_rst_tcp);
329 __hal_aux_pci_link_info("tx_udp", i,
330 tx_udp);
331 __hal_aux_pci_link_info("tx_unknown_protocol", i,
332 tx_unknown_protocol);
333 __hal_aux_pci_link_info("tx_parse_error", i,
334 tx_parse_error);
335 __hal_aux_pci_link_info("tx_pause_ctrl_frms", i,
336 tx_pause_ctrl_frms);
337 __hal_aux_pci_link_info("tx_lacpdu_frms", i,
338 tx_lacpdu_frms);
339 __hal_aux_pci_link_info("tx_marker_pdu_frms", i,
340 tx_marker_pdu_frms);
341 __hal_aux_pci_link_info("tx_marker_resp_pdu_frms", i,
342 tx_marker_resp_pdu_frms);
343 __hal_aux_pci_link_info("tx_drop_ip", i,
344 tx_drop_ip);
345 __hal_aux_pci_link_info("tx_xgmii_char1_match", i,
346 tx_xgmii_char1_match);
347 __hal_aux_pci_link_info("tx_xgmii_char2_match", i,
348 tx_xgmii_char2_match);
349 __hal_aux_pci_link_info("tx_xgmii_column1_match", i,
350 tx_xgmii_column1_match);
351 __hal_aux_pci_link_info("tx_xgmii_column2_match", i,
352 tx_xgmii_column2_match);
353 __hal_aux_pci_link_info("tx_drop_frms", i,
354 tx_drop_frms);
355 __hal_aux_pci_link_info("tx_any_err_frms", i,
356 tx_any_err_frms);
357 }
358
359 for (i = 0; i < XGE_HAL_MAC_AGGREGATORS; i++) {
360 __hal_aux_pci_aggr_info("tx_frms", i, tx_frms);
361 __hal_aux_pci_aggr_info("tx_mcst_frms", i,
362 tx_mcst_frms);
363 __hal_aux_pci_aggr_info("tx_bcst_frms", i,
364 tx_bcst_frms);
365 __hal_aux_pci_aggr_info("tx_discarded_frms", i,
366 tx_discarded_frms);
367 __hal_aux_pci_aggr_info("tx_errored_frms", i,
368 tx_errored_frms);
369 }
370 }
371
372 __HAL_AUX_ENTRY_END(bufsize, retsize);
373
374 return XGE_HAL_OK;
375 }
376
377 /**
378 * xge_hal_aux_stats_rmac_read - Read RMAC hardware statistics.
379 * @devh: HAL device handle.
380 * @bufsize: Buffer size.
381 * @retbuf: Buffer pointer.
382 * @retsize: Size of the result. Cannot be greater than @bufsize.
383 *
384 * Read RMAC hardware statistics. This is a subset of stats counters
385 * from xge_hal_stats_hw_info_t{}.
386 *
387 * Returns: XGE_HAL_OK - success.
388 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
389 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
390 *
391 * See also: xge_hal_mgmt_hw_stats{}, xge_hal_stats_hw_info_t{},
392 * xge_hal_aux_stats_pci_read(), xge_hal_aux_stats_tmac_read(),
393 * xge_hal_aux_device_dump().
394 */
xge_hal_aux_stats_rmac_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)395 xge_hal_status_e xge_hal_aux_stats_rmac_read(xge_hal_device_h devh, int bufsize,
396 char *retbuf, int *retsize)
397 {
398 xge_hal_status_e status;
399 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
400
401 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
402
403 if (xge_hal_device_check_id(hldev) != XGE_HAL_CARD_TITAN) {
404 xge_hal_mgmt_hw_stats_t hw;
405
406 status = xge_hal_mgmt_hw_stats(devh, &hw,
407 sizeof(xge_hal_mgmt_hw_stats_t));
408 if (status != XGE_HAL_OK) {
409 return status;
410 }
411
412 __HAL_AUX_ENTRY("rmac_data_octets", hw.rmac_data_octets, "%u");
413 __HAL_AUX_ENTRY("rmac_vld_frms", hw.rmac_vld_frms, "%u");
414 __HAL_AUX_ENTRY("rmac_fcs_err_frms", (unsigned long long)
415 hw.rmac_fcs_err_frms, "%llu");
416 __HAL_AUX_ENTRY("mac_drop_frms", (unsigned long long)
417 hw.rmac_drop_frms, "%llu");
418 __HAL_AUX_ENTRY("rmac_vld_bcst_frms", hw.rmac_vld_bcst_frms,
419 "%u");
420 __HAL_AUX_ENTRY("rmac_vld_mcst_frms", hw.rmac_vld_mcst_frms,
421 "%u");
422 __HAL_AUX_ENTRY("rmac_out_rng_len_err_frms",
423 hw.rmac_out_rng_len_err_frms, "%u");
424 __HAL_AUX_ENTRY("rmac_in_rng_len_err_frms",
425 hw.rmac_in_rng_len_err_frms, "%u");
426 __HAL_AUX_ENTRY("rmac_long_frms", (unsigned long long)
427 hw.rmac_long_frms, "%llu");
428 __HAL_AUX_ENTRY("rmac_pause_ctrl_frms", (unsigned long long)
429 hw.rmac_pause_ctrl_frms, "%llu");
430 __HAL_AUX_ENTRY("rmac_unsup_ctrl_frms", (unsigned long long)
431 hw.rmac_unsup_ctrl_frms, "%llu");
432 __HAL_AUX_ENTRY("rmac_accepted_ucst_frms",
433 hw.rmac_accepted_ucst_frms, "%u");
434 __HAL_AUX_ENTRY("rmac_ttl_octets", hw.rmac_ttl_octets, "%u");
435 __HAL_AUX_ENTRY("rmac_discarded_frms", hw.rmac_discarded_frms,
436 "%u");
437 __HAL_AUX_ENTRY("rmac_accepted_nucst_frms",
438 hw.rmac_accepted_nucst_frms, "%u");
439 __HAL_AUX_ENTRY("reserved_1", hw.reserved_1, "%u");
440 __HAL_AUX_ENTRY("rmac_drop_events", hw.rmac_drop_events, "%u");
441 __HAL_AUX_ENTRY("rmac_ttl_less_fb_octets", (unsigned long long)
442 hw.rmac_ttl_less_fb_octets, "%llu");
443 __HAL_AUX_ENTRY("rmac_ttl_frms", (unsigned long long)
444 hw.rmac_ttl_frms, "%llu");
445 __HAL_AUX_ENTRY("reserved_2", (unsigned long long)
446 hw.reserved_2, "%llu");
447 __HAL_AUX_ENTRY("rmac_usized_frms", hw.rmac_usized_frms, "%u");
448 __HAL_AUX_ENTRY("reserved_3", hw.reserved_3, "%u");
449 __HAL_AUX_ENTRY("rmac_frag_frms", hw.rmac_frag_frms, "%u");
450 __HAL_AUX_ENTRY("rmac_osized_frms", hw.rmac_osized_frms, "%u");
451 __HAL_AUX_ENTRY("reserved_4", hw.reserved_4, "%u");
452 __HAL_AUX_ENTRY("rmac_jabber_frms", hw.rmac_jabber_frms, "%u");
453 __HAL_AUX_ENTRY("rmac_ttl_64_frms", (unsigned long long)
454 hw.rmac_ttl_64_frms, "%llu");
455 __HAL_AUX_ENTRY("rmac_ttl_65_127_frms", (unsigned long long)
456 hw.rmac_ttl_65_127_frms, "%llu");
457 __HAL_AUX_ENTRY("reserved_5", (unsigned long long)
458 hw.reserved_5, "%llu");
459 __HAL_AUX_ENTRY("rmac_ttl_128_255_frms", (unsigned long long)
460 hw.rmac_ttl_128_255_frms, "%llu");
461 __HAL_AUX_ENTRY("rmac_ttl_256_511_frms", (unsigned long long)
462 hw.rmac_ttl_256_511_frms, "%llu");
463 __HAL_AUX_ENTRY("reserved_6", (unsigned long long)
464 hw.reserved_6, "%llu");
465 __HAL_AUX_ENTRY("rmac_ttl_512_1023_frms", (unsigned long long)
466 hw.rmac_ttl_512_1023_frms, "%llu");
467 __HAL_AUX_ENTRY("rmac_ttl_1024_1518_frms", (unsigned long long)
468 hw.rmac_ttl_1024_1518_frms, "%llu");
469 __HAL_AUX_ENTRY("rmac_ip", hw.rmac_ip, "%u");
470 __HAL_AUX_ENTRY("reserved_7", hw.reserved_7, "%u");
471 __HAL_AUX_ENTRY("rmac_ip_octets", (unsigned long long)
472 hw.rmac_ip_octets, "%llu");
473 __HAL_AUX_ENTRY("rmac_drop_ip", hw.rmac_drop_ip, "%u");
474 __HAL_AUX_ENTRY("rmac_hdr_err_ip", hw.rmac_hdr_err_ip, "%u");
475 __HAL_AUX_ENTRY("reserved_8", hw.reserved_8, "%u");
476 __HAL_AUX_ENTRY("rmac_icmp", hw.rmac_icmp, "%u");
477 __HAL_AUX_ENTRY("rmac_tcp", (unsigned long long)
478 hw.rmac_tcp, "%llu");
479 __HAL_AUX_ENTRY("rmac_err_drp_udp", hw.rmac_err_drp_udp, "%u");
480 __HAL_AUX_ENTRY("rmac_udp", hw.rmac_udp, "%u");
481 __HAL_AUX_ENTRY("rmac_xgmii_err_sym", (unsigned long long)
482 hw.rmac_xgmii_err_sym, "%llu");
483 __HAL_AUX_ENTRY("rmac_frms_q0", (unsigned long long)
484 hw.rmac_frms_q0, "%llu");
485 __HAL_AUX_ENTRY("rmac_frms_q1", (unsigned long long)
486 hw.rmac_frms_q1, "%llu");
487 __HAL_AUX_ENTRY("rmac_frms_q2", (unsigned long long)
488 hw.rmac_frms_q2, "%llu");
489 __HAL_AUX_ENTRY("rmac_frms_q3", (unsigned long long)
490 hw.rmac_frms_q3, "%llu");
491 __HAL_AUX_ENTRY("rmac_frms_q4", (unsigned long long)
492 hw.rmac_frms_q4, "%llu");
493 __HAL_AUX_ENTRY("rmac_frms_q5", (unsigned long long)
494 hw.rmac_frms_q5, "%llu");
495 __HAL_AUX_ENTRY("rmac_frms_q6", (unsigned long long)
496 hw.rmac_frms_q6, "%llu");
497 __HAL_AUX_ENTRY("rmac_frms_q7", (unsigned long long)
498 hw.rmac_frms_q7, "%llu");
499 __HAL_AUX_ENTRY("rmac_full_q3", hw.rmac_full_q3, "%d");
500 __HAL_AUX_ENTRY("rmac_full_q2", hw.rmac_full_q2, "%d");
501 __HAL_AUX_ENTRY("rmac_full_q1", hw.rmac_full_q1, "%d");
502 __HAL_AUX_ENTRY("rmac_full_q0", hw.rmac_full_q0, "%d");
503 __HAL_AUX_ENTRY("rmac_full_q7", hw.rmac_full_q7, "%d");
504 __HAL_AUX_ENTRY("rmac_full_q6", hw.rmac_full_q6, "%d");
505 __HAL_AUX_ENTRY("rmac_full_q5", hw.rmac_full_q5, "%d");
506 __HAL_AUX_ENTRY("rmac_full_q4", hw.rmac_full_q4, "%d");
507 __HAL_AUX_ENTRY("reserved_9", hw.reserved_9, "%u");
508 __HAL_AUX_ENTRY("rmac_pause_cnt", hw.rmac_pause_cnt, "%u");
509 __HAL_AUX_ENTRY("rmac_xgmii_data_err_cnt", (unsigned long long)
510 hw.rmac_xgmii_data_err_cnt, "%llu");
511 __HAL_AUX_ENTRY("rmac_xgmii_ctrl_err_cnt", (unsigned long long)
512 hw.rmac_xgmii_ctrl_err_cnt, "%llu");
513 __HAL_AUX_ENTRY("rmac_err_tcp", hw.rmac_err_tcp, "%u");
514 __HAL_AUX_ENTRY("rmac_accepted_ip", hw.rmac_accepted_ip, "%u");
515 } else {
516 int i;
517 xge_hal_mgmt_pcim_stats_t pcim;
518 status = xge_hal_mgmt_pcim_stats(devh, &pcim,
519 sizeof(xge_hal_mgmt_pcim_stats_t));
520 if (status != XGE_HAL_OK) {
521 return status;
522 }
523 for (i = 0; i < XGE_HAL_MAC_LINKS; i++) {
524 __hal_aux_pci_link_info("rx_ttl_frms", i,
525 rx_ttl_frms);
526 __hal_aux_pci_link_info("rx_vld_frms", i,
527 rx_vld_frms);
528 __hal_aux_pci_link_info("rx_offld_frms", i,
529 rx_offld_frms);
530 __hal_aux_pci_link_info("rx_ttl_eth_octets", i,
531 rx_ttl_eth_octets);
532 __hal_aux_pci_link_info("rx_data_octets", i,
533 rx_data_octets);
534 __hal_aux_pci_link_info("rx_offld_octets", i,
535 rx_offld_octets);
536 __hal_aux_pci_link_info("rx_vld_mcst_frms", i,
537 rx_vld_mcst_frms);
538 __hal_aux_pci_link_info("rx_vld_bcst_frms", i,
539 rx_vld_bcst_frms);
540 __hal_aux_pci_link_info("rx_accepted_ucst_frms", i,
541 rx_accepted_ucst_frms);
542 __hal_aux_pci_link_info("rx_accepted_nucst_frms", i,
543 rx_accepted_nucst_frms);
544 __hal_aux_pci_link_info("rx_tagged_frms", i,
545 rx_tagged_frms);
546 __hal_aux_pci_link_info("rx_long_frms", i,
547 rx_long_frms);
548 __hal_aux_pci_link_info("rx_usized_frms", i,
549 rx_usized_frms);
550 __hal_aux_pci_link_info("rx_osized_frms", i,
551 rx_osized_frms);
552 __hal_aux_pci_link_info("rx_frag_frms", i,
553 rx_frag_frms);
554 __hal_aux_pci_link_info("rx_jabber_frms", i,
555 rx_jabber_frms);
556 __hal_aux_pci_link_info("rx_ttl_64_frms", i,
557 rx_ttl_64_frms);
558 __hal_aux_pci_link_info("rx_ttl_65_127_frms", i,
559 rx_ttl_65_127_frms);
560 __hal_aux_pci_link_info("rx_ttl_128_255_frms", i,
561 rx_ttl_128_255_frms);
562 __hal_aux_pci_link_info("rx_ttl_256_511_frms", i,
563 rx_ttl_256_511_frms);
564 __hal_aux_pci_link_info("rx_ttl_512_1023_frms", i,
565 rx_ttl_512_1023_frms);
566 __hal_aux_pci_link_info("rx_ttl_1024_1518_frms", i,
567 rx_ttl_1024_1518_frms);
568 __hal_aux_pci_link_info("rx_ttl_1519_4095_frms", i,
569 rx_ttl_1519_4095_frms);
570 __hal_aux_pci_link_info("rx_ttl_40956_8191_frms", i,
571 rx_ttl_40956_8191_frms);
572 __hal_aux_pci_link_info("rx_ttl_8192_max_frms", i,
573 rx_ttl_8192_max_frms);
574 __hal_aux_pci_link_info("rx_ttl_gt_max_frms", i,
575 rx_ttl_gt_max_frms);
576 __hal_aux_pci_link_info("rx_ip", i,
577 rx_ip);
578 __hal_aux_pci_link_info("rx_ip_octets", i,
579 rx_ip_octets);
580
581 __hal_aux_pci_link_info("rx_hdr_err_ip", i,
582 rx_hdr_err_ip);
583
584 __hal_aux_pci_link_info("rx_icmp", i,
585 rx_icmp);
586 __hal_aux_pci_link_info("rx_tcp", i,
587 rx_tcp);
588 __hal_aux_pci_link_info("rx_udp", i,
589 rx_udp);
590 __hal_aux_pci_link_info("rx_err_tcp", i,
591 rx_err_tcp);
592 __hal_aux_pci_link_info("rx_pause_cnt", i,
593 rx_pause_cnt);
594 __hal_aux_pci_link_info("rx_pause_ctrl_frms", i,
595 rx_pause_ctrl_frms);
596 __hal_aux_pci_link_info("rx_unsup_ctrl_frms", i,
597 rx_pause_cnt);
598 __hal_aux_pci_link_info("rx_in_rng_len_err_frms", i,
599 rx_in_rng_len_err_frms);
600 __hal_aux_pci_link_info("rx_out_rng_len_err_frms", i,
601 rx_out_rng_len_err_frms);
602 __hal_aux_pci_link_info("rx_drop_frms", i,
603 rx_drop_frms);
604 __hal_aux_pci_link_info("rx_discarded_frms", i,
605 rx_discarded_frms);
606 __hal_aux_pci_link_info("rx_drop_ip", i,
607 rx_drop_ip);
608 __hal_aux_pci_link_info("rx_err_drp_udp", i,
609 rx_err_drp_udp);
610 __hal_aux_pci_link_info("rx_lacpdu_frms", i,
611 rx_lacpdu_frms);
612 __hal_aux_pci_link_info("rx_marker_pdu_frms", i,
613 rx_marker_pdu_frms);
614 __hal_aux_pci_link_info("rx_marker_resp_pdu_frms", i,
615 rx_marker_resp_pdu_frms);
616 __hal_aux_pci_link_info("rx_unknown_pdu_frms", i,
617 rx_unknown_pdu_frms);
618 __hal_aux_pci_link_info("rx_illegal_pdu_frms", i,
619 rx_illegal_pdu_frms);
620 __hal_aux_pci_link_info("rx_fcs_discard", i,
621 rx_fcs_discard);
622 __hal_aux_pci_link_info("rx_len_discard", i,
623 rx_len_discard);
624 __hal_aux_pci_link_info("rx_pf_discard", i,
625 rx_pf_discard);
626 __hal_aux_pci_link_info("rx_trash_discard", i,
627 rx_trash_discard);
628 __hal_aux_pci_link_info("rx_rts_discard", i,
629 rx_trash_discard);
630 __hal_aux_pci_link_info("rx_wol_discard", i,
631 rx_wol_discard);
632 __hal_aux_pci_link_info("rx_red_discard", i,
633 rx_red_discard);
634 __hal_aux_pci_link_info("rx_ingm_full_discard", i,
635 rx_ingm_full_discard);
636 __hal_aux_pci_link_info("rx_xgmii_data_err_cnt", i,
637 rx_xgmii_data_err_cnt);
638 __hal_aux_pci_link_info("rx_xgmii_ctrl_err_cnt", i,
639 rx_xgmii_ctrl_err_cnt);
640 __hal_aux_pci_link_info("rx_xgmii_err_sym", i,
641 rx_xgmii_err_sym);
642 __hal_aux_pci_link_info("rx_xgmii_char1_match", i,
643 rx_xgmii_char1_match);
644 __hal_aux_pci_link_info("rx_xgmii_char2_match", i,
645 rx_xgmii_char2_match);
646 __hal_aux_pci_link_info("rx_xgmii_column1_match", i,
647 rx_xgmii_column1_match);
648 __hal_aux_pci_link_info("rx_xgmii_column2_match", i,
649 rx_xgmii_column2_match);
650 __hal_aux_pci_link_info("rx_local_fault", i,
651 rx_local_fault);
652 __hal_aux_pci_link_info("rx_remote_fault", i,
653 rx_remote_fault);
654 __hal_aux_pci_link_info("rx_queue_full", i,
655 rx_queue_full);
656 }
657 for (i = 0; i < XGE_HAL_MAC_AGGREGATORS; i++) {
658 __hal_aux_pci_aggr_info("rx_frms", i, rx_frms);
659 __hal_aux_pci_link_info("rx_data_octets", i,
660 rx_data_octets);
661 __hal_aux_pci_aggr_info("rx_mcst_frms", i,
662 rx_mcst_frms);
663 __hal_aux_pci_aggr_info("rx_bcst_frms", i,
664 rx_bcst_frms);
665 __hal_aux_pci_aggr_info("rx_discarded_frms", i,
666 rx_discarded_frms);
667 __hal_aux_pci_aggr_info("rx_errored_frms", i,
668 rx_errored_frms);
669 __hal_aux_pci_aggr_info("rx_unknown_protocol_frms", i,
670 rx_unknown_protocol_frms);
671 }
672
673 }
674 __HAL_AUX_ENTRY_END(bufsize, retsize);
675
676 return XGE_HAL_OK;
677 }
678
679 /**
680 * xge_hal_aux_stats_herc_enchanced - Get Hercules hardware statistics.
681 * @devh: HAL device handle.
682 * @bufsize: Buffer size.
683 * @retbuf: Buffer pointer.
684 * @retsize: Size of the result. Cannot be greater than @bufsize.
685 *
686 * Read Hercules device hardware statistics.
687 *
688 * Returns: XGE_HAL_OK - success.
689 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
690 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
691 *
692 * See also: xge_hal_mgmt_hw_stats{}, xge_hal_stats_hw_info_t{},
693 * xge_hal_aux_stats_tmac_read(), xge_hal_aux_stats_rmac_read(),
694 * xge_hal_aux_device_dump().
695 */
xge_hal_aux_stats_herc_enchanced(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)696 xge_hal_status_e xge_hal_aux_stats_herc_enchanced(xge_hal_device_h devh,
697 int bufsize, char *retbuf, int *retsize)
698 {
699 xge_hal_status_e status;
700 xge_hal_mgmt_hw_stats_t hw;
701 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
702
703 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
704
705 if (xge_hal_device_check_id(hldev) == XGE_HAL_CARD_TITAN) {
706
707 __HAL_AUX_ENTRY_END(bufsize, retsize);
708
709 return XGE_HAL_OK;
710 }
711
712
713 status = xge_hal_mgmt_hw_stats(devh, &hw,
714 sizeof(xge_hal_mgmt_hw_stats_t));
715 if (status != XGE_HAL_OK) {
716 return status;
717 }
718 __HAL_AUX_ENTRY("tmac_frms_oflow", hw.tmac_frms_oflow, "%u");
719 __HAL_AUX_ENTRY("tmac_data_octets_oflow", hw.tmac_data_octets_oflow,
720 "%u");
721 __HAL_AUX_ENTRY("tmac_mcst_frms_oflow", hw.tmac_mcst_frms_oflow, "%u");
722 __HAL_AUX_ENTRY("tmac_bcst_frms_oflow", hw.tmac_bcst_frms_oflow, "%u");
723 __HAL_AUX_ENTRY("tmac_ttl_octets_oflow", hw.tmac_ttl_octets_oflow,
724 "%u");
725 __HAL_AUX_ENTRY("tmac_ucst_frms_oflow", hw.tmac_ucst_frms_oflow, "%u");
726 __HAL_AUX_ENTRY("tmac_nucst_frms_oflow", hw.tmac_nucst_frms_oflow,
727 "%u");
728 __HAL_AUX_ENTRY("tmac_any_err_frms_oflow", hw.tmac_any_err_frms_oflow,
729 "%u");
730 __HAL_AUX_ENTRY("tmac_vlan_frms", (unsigned long long)hw.tmac_vlan_frms,
731 "%llu");
732 __HAL_AUX_ENTRY("tmac_vld_ip_oflow", hw.tmac_vld_ip_oflow, "%u");
733 __HAL_AUX_ENTRY("tmac_drop_ip_oflow", hw.tmac_drop_ip_oflow, "%u");
734 __HAL_AUX_ENTRY("tmac_icmp_oflow", hw.tmac_icmp_oflow, "%u");
735 __HAL_AUX_ENTRY("tmac_rst_tcp_oflow", hw.tmac_rst_tcp_oflow, "%u");
736 __HAL_AUX_ENTRY("tmac_udp_oflow", hw.tmac_udp_oflow, "%u");
737 __HAL_AUX_ENTRY("tpa_unknown_protocol", hw.tpa_unknown_protocol, "%u");
738 __HAL_AUX_ENTRY("tpa_parse_failure", hw.tpa_parse_failure, "%u");
739 __HAL_AUX_ENTRY("rmac_vld_frms_oflow", hw.rmac_vld_frms_oflow, "%u");
740 __HAL_AUX_ENTRY("rmac_data_octets_oflow", hw.rmac_data_octets_oflow,
741 "%u");
742 __HAL_AUX_ENTRY("rmac_vld_mcst_frms_oflow", hw.rmac_vld_mcst_frms_oflow,
743 "%u");
744 __HAL_AUX_ENTRY("rmac_vld_bcst_frms_oflow", hw.rmac_vld_bcst_frms_oflow,
745 "%u");
746 __HAL_AUX_ENTRY("rmac_ttl_octets_oflow", hw.rmac_ttl_octets_oflow,
747 "%u");
748 __HAL_AUX_ENTRY("rmac_accepted_ucst_frms_oflow",
749 hw.rmac_accepted_ucst_frms_oflow, "%u");
750 __HAL_AUX_ENTRY("rmac_accepted_nucst_frms_oflow",
751 hw.rmac_accepted_nucst_frms_oflow, "%u");
752 __HAL_AUX_ENTRY("rmac_discarded_frms_oflow",
753 hw.rmac_discarded_frms_oflow, "%u");
754 __HAL_AUX_ENTRY("rmac_drop_events_oflow", hw.rmac_drop_events_oflow,
755 "%u");
756 __HAL_AUX_ENTRY("rmac_usized_frms_oflow", hw.rmac_usized_frms_oflow,
757 "%u");
758 __HAL_AUX_ENTRY("rmac_osized_frms_oflow", hw.rmac_osized_frms_oflow,
759 "%u");
760 __HAL_AUX_ENTRY("rmac_frag_frms_oflow", hw.rmac_frag_frms_oflow, "%u");
761 __HAL_AUX_ENTRY("rmac_jabber_frms_oflow", hw.rmac_jabber_frms_oflow,
762 "%u");
763 __HAL_AUX_ENTRY("rmac_ip_oflow", hw.rmac_ip_oflow, "%u");
764 __HAL_AUX_ENTRY("rmac_drop_ip_oflow", hw.rmac_drop_ip_oflow, "%u");
765 __HAL_AUX_ENTRY("rmac_icmp_oflow", hw.rmac_icmp_oflow, "%u");
766 __HAL_AUX_ENTRY("rmac_udp_oflow", hw.rmac_udp_oflow, "%u");
767 __HAL_AUX_ENTRY("rmac_err_drp_udp_oflow", hw.rmac_err_drp_udp_oflow,
768 "%u");
769 __HAL_AUX_ENTRY("rmac_pause_cnt_oflow", hw.rmac_pause_cnt_oflow, "%u");
770 __HAL_AUX_ENTRY("rmac_ttl_1519_4095_frms",
771 (unsigned long long)hw.rmac_ttl_1519_4095_frms, "%llu");
772 __HAL_AUX_ENTRY("rmac_ttl_4096_8191_frms",
773 (unsigned long long)hw.rmac_ttl_4096_8191_frms, "%llu");
774 __HAL_AUX_ENTRY("rmac_ttl_8192_max_frms",
775 (unsigned long long)hw.rmac_ttl_8192_max_frms, "%llu");
776 __HAL_AUX_ENTRY("rmac_ttl_gt_max_frms",
777 (unsigned long long)hw.rmac_ttl_gt_max_frms, "%llu");
778 __HAL_AUX_ENTRY("rmac_osized_alt_frms",
779 (unsigned long long)hw.rmac_osized_alt_frms, "%llu");
780 __HAL_AUX_ENTRY("rmac_jabber_alt_frms",
781 (unsigned long long)hw.rmac_jabber_alt_frms, "%llu");
782 __HAL_AUX_ENTRY("rmac_gt_max_alt_frms",
783 (unsigned long long)hw.rmac_gt_max_alt_frms, "%llu");
784 __HAL_AUX_ENTRY("rmac_vlan_frms",
785 (unsigned long long)hw.rmac_vlan_frms, "%llu");
786 __HAL_AUX_ENTRY("rmac_fcs_discard", hw.rmac_fcs_discard, "%u");
787 __HAL_AUX_ENTRY("rmac_len_discard", hw.rmac_len_discard, "%u");
788 __HAL_AUX_ENTRY("rmac_da_discard", hw.rmac_da_discard, "%u");
789 __HAL_AUX_ENTRY("rmac_pf_discard", hw.rmac_pf_discard, "%u");
790 __HAL_AUX_ENTRY("rmac_rts_discard", hw.rmac_rts_discard, "%u");
791 __HAL_AUX_ENTRY("rmac_red_discard", hw.rmac_red_discard, "%u");
792 __HAL_AUX_ENTRY("rmac_ingm_full_discard", hw.rmac_ingm_full_discard,
793 "%u");
794 __HAL_AUX_ENTRY("rmac_accepted_ip_oflow", hw.rmac_accepted_ip_oflow,
795 "%u");
796 __HAL_AUX_ENTRY("link_fault_cnt", hw.link_fault_cnt, "%u");
797
798 __HAL_AUX_ENTRY_END(bufsize, retsize);
799
800 return XGE_HAL_OK;
801 }
802
803 /**
804 * xge_hal_aux_stats_rmac_read - Read PCI hardware statistics.
805 * @devh: HAL device handle.
806 * @bufsize: Buffer size.
807 * @retbuf: Buffer pointer.
808 * @retsize: Size of the result. Cannot be greater than @bufsize.
809 *
810 * Read PCI statistics counters, including number of PCI read and
811 * write transactions, PCI retries, discards, etc.
812 * This is a subset of stats counters from xge_hal_stats_hw_info_t{}.
813 *
814 * Returns: XGE_HAL_OK - success.
815 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
816 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
817 *
818 * See also: xge_hal_mgmt_hw_stats{}, xge_hal_stats_hw_info_t{},
819 * xge_hal_aux_stats_tmac_read(), xge_hal_aux_stats_rmac_read(),
820 * xge_hal_aux_device_dump().
821 */
xge_hal_aux_stats_pci_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)822 xge_hal_status_e xge_hal_aux_stats_pci_read(xge_hal_device_h devh, int bufsize,
823 char *retbuf, int *retsize)
824 {
825 xge_hal_status_e status;
826 xge_hal_mgmt_hw_stats_t hw;
827 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
828
829 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
830
831 if (xge_hal_device_check_id(hldev) == XGE_HAL_CARD_TITAN) {
832
833 __HAL_AUX_ENTRY_END(bufsize, retsize);
834
835 return XGE_HAL_OK;
836 }
837
838
839 status = xge_hal_mgmt_hw_stats(devh, &hw,
840 sizeof(xge_hal_mgmt_hw_stats_t));
841 if (status != XGE_HAL_OK) {
842 return status;
843 }
844
845 __HAL_AUX_ENTRY("new_rd_req_cnt", hw.new_rd_req_cnt, "%u");
846 __HAL_AUX_ENTRY("rd_req_cnt", hw.rd_req_cnt, "%u");
847 __HAL_AUX_ENTRY("rd_rtry_cnt", hw.rd_rtry_cnt, "%u");
848 __HAL_AUX_ENTRY("new_rd_req_rtry_cnt", hw.new_rd_req_rtry_cnt, "%u");
849 __HAL_AUX_ENTRY("wr_req_cnt", hw.wr_req_cnt, "%u");
850 __HAL_AUX_ENTRY("wr_rtry_rd_ack_cnt", hw.wr_rtry_rd_ack_cnt, "%u");
851 __HAL_AUX_ENTRY("new_wr_req_rtry_cnt", hw.new_wr_req_rtry_cnt, "%u");
852 __HAL_AUX_ENTRY("new_wr_req_cnt", hw.new_wr_req_cnt, "%u");
853 __HAL_AUX_ENTRY("wr_disc_cnt", hw.wr_disc_cnt, "%u");
854 __HAL_AUX_ENTRY("wr_rtry_cnt", hw.wr_rtry_cnt, "%u");
855 __HAL_AUX_ENTRY("txp_wr_cnt", hw.txp_wr_cnt, "%u");
856 __HAL_AUX_ENTRY("rd_rtry_wr_ack_cnt", hw.rd_rtry_wr_ack_cnt, "%u");
857 __HAL_AUX_ENTRY("txd_wr_cnt", hw.txd_wr_cnt, "%u");
858 __HAL_AUX_ENTRY("txd_rd_cnt", hw.txd_rd_cnt, "%u");
859 __HAL_AUX_ENTRY("rxd_wr_cnt", hw.rxd_wr_cnt, "%u");
860 __HAL_AUX_ENTRY("rxd_rd_cnt", hw.rxd_rd_cnt, "%u");
861 __HAL_AUX_ENTRY("rxf_wr_cnt", hw.rxf_wr_cnt, "%u");
862 __HAL_AUX_ENTRY("txf_rd_cnt", hw.txf_rd_cnt, "%u");
863
864 __HAL_AUX_ENTRY_END(bufsize, retsize);
865
866 return XGE_HAL_OK;
867 }
868
869 /**
870 * xge_hal_aux_stats_hal_read - Read HAL (layer) statistics.
871 * @devh: HAL device handle.
872 * @bufsize: Buffer size.
873 * @retbuf: Buffer pointer.
874 * @retsize: Size of the result. Cannot be greater than @bufsize.
875 *
876 * Read HAL statistics.
877 *
878 * Returns: XGE_HAL_OK - success.
879 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
880 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
881 * XGE_HAL_INF_STATS_IS_NOT_READY - Statistics information is not
882 * currently available.
883 *
884 * See also: xge_hal_aux_device_dump().
885 */
xge_hal_aux_stats_hal_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)886 xge_hal_status_e xge_hal_aux_stats_hal_read(xge_hal_device_h devh,
887 int bufsize, char *retbuf, int *retsize)
888 {
889 xge_list_t *item;
890 xge_hal_channel_t *channel;
891 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
892 xge_hal_status_e status;
893 xge_hal_mgmt_device_stats_t devstat;
894 xge_hal_mgmt_channel_stats_t chstat;
895 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
896
897 status = xge_hal_mgmt_device_stats(hldev, &devstat,
898 sizeof(xge_hal_mgmt_device_stats_t));
899 if (status != XGE_HAL_OK) {
900 return status;
901 }
902
903 if (!hldev->config.bimodal_interrupts) {
904 __HAL_AUX_ENTRY("rx_traffic_intr_cnt",
905 devstat.rx_traffic_intr_cnt, "%u");
906 }
907 __HAL_AUX_ENTRY("tx_traffic_intr_cnt", devstat.tx_traffic_intr_cnt, "%u");
908 __HAL_AUX_ENTRY("txpic_intr_cnt", devstat.txpic_intr_cnt, "%u");
909 __HAL_AUX_ENTRY("txdma_intr_cnt", devstat.txdma_intr_cnt, "%u");
910 __HAL_AUX_ENTRY("txmac_intr_cnt", devstat.txmac_intr_cnt, "%u");
911 __HAL_AUX_ENTRY("txxgxs_intr_cnt", devstat.txxgxs_intr_cnt, "%u");
912 __HAL_AUX_ENTRY("rxpic_intr_cnt", devstat.rxpic_intr_cnt, "%u");
913 __HAL_AUX_ENTRY("rxdma_intr_cnt", devstat.rxdma_intr_cnt, "%u");
914 __HAL_AUX_ENTRY("rxmac_intr_cnt", devstat.rxmac_intr_cnt, "%u");
915 __HAL_AUX_ENTRY("rxxgxs_intr_cnt", devstat.rxxgxs_intr_cnt, "%u");
916 __HAL_AUX_ENTRY("mc_intr_cnt", devstat.mc_intr_cnt, "%u");
917 __HAL_AUX_ENTRY("not_xge_intr_cnt", devstat.not_xge_intr_cnt, "%u");
918 __HAL_AUX_ENTRY("not_traffic_intr_cnt",
919 devstat.not_traffic_intr_cnt, "%u");
920 __HAL_AUX_ENTRY("traffic_intr_cnt", devstat.traffic_intr_cnt, "%u");
921 __HAL_AUX_ENTRY("total_intr_cnt", devstat.total_intr_cnt, "%u");
922 __HAL_AUX_ENTRY("soft_reset_cnt", devstat.soft_reset_cnt, "%u");
923
924 if (hldev->config.rxufca_hi_lim != hldev->config.rxufca_lo_lim &&
925 hldev->config.rxufca_lo_lim != 0) {
926 __HAL_AUX_ENTRY("rxufca_lo_adjust_cnt",
927 devstat.rxufca_lo_adjust_cnt, "%u");
928 __HAL_AUX_ENTRY("rxufca_hi_adjust_cnt",
929 devstat.rxufca_hi_adjust_cnt, "%u");
930 }
931
932 if (hldev->config.bimodal_interrupts) {
933 __HAL_AUX_ENTRY("bimodal_lo_adjust_cnt",
934 devstat.bimodal_lo_adjust_cnt, "%u");
935 __HAL_AUX_ENTRY("bimodal_hi_adjust_cnt",
936 devstat.bimodal_hi_adjust_cnt, "%u");
937 }
938
939 #if defined(XGE_HAL_CONFIG_LRO)
940 __HAL_AUX_ENTRY("tot_frms_lroised",
941 devstat.tot_frms_lroised, "%u");
942 __HAL_AUX_ENTRY("tot_lro_sessions",
943 devstat.tot_lro_sessions, "%u");
944 __HAL_AUX_ENTRY("lro_frm_len_exceed_cnt",
945 devstat.lro_frm_len_exceed_cnt, "%u");
946 __HAL_AUX_ENTRY("lro_sg_exceed_cnt",
947 devstat.lro_sg_exceed_cnt, "%u");
948 __HAL_AUX_ENTRY("lro_out_of_seq_pkt_cnt",
949 devstat.lro_out_of_seq_pkt_cnt, "%u");
950 __HAL_AUX_ENTRY("lro_dup_pkt_cnt",
951 devstat.lro_dup_pkt_cnt, "%u");
952 #endif
953
954 /* for each opened rx channel */
955 xge_list_for_each(item, &hldev->ring_channels) {
956 char key[XGE_OS_SPRINTF_STRLEN];
957 channel = xge_container_of(item, xge_hal_channel_t, item);
958
959 status = xge_hal_mgmt_channel_stats(channel, &chstat,
960 sizeof(xge_hal_mgmt_channel_stats_t));
961 if (status != XGE_HAL_OK) {
962 return status;
963 }
964
965 (void) xge_os_sprintf(key, "ring%d_", channel->post_qid);
966
967 xge_os_strcpy(key+6, "full_cnt");
968 __HAL_AUX_ENTRY(key, chstat.full_cnt, "%u");
969 xge_os_strcpy(key+6, "usage_max");
970 __HAL_AUX_ENTRY(key, chstat.usage_max, "%u");
971 xge_os_strcpy(key+6, "usage_cnt");
972 __HAL_AUX_ENTRY(key, channel->usage_cnt, "%u");
973 xge_os_strcpy(key+6, "reserve_free_swaps_cnt");
974 __HAL_AUX_ENTRY(key, chstat.reserve_free_swaps_cnt, "%u");
975 if (!hldev->config.bimodal_interrupts) {
976 xge_os_strcpy(key+6, "avg_compl_per_intr_cnt");
977 __HAL_AUX_ENTRY(key, chstat.avg_compl_per_intr_cnt, "%u");
978 }
979 xge_os_strcpy(key+6, "total_compl_cnt");
980 __HAL_AUX_ENTRY(key, chstat.total_compl_cnt, "%u");
981 xge_os_strcpy(key+6, "bump_cnt");
982 __HAL_AUX_ENTRY(key, chstat.ring_bump_cnt, "%u");
983 }
984
985 /* for each opened tx channel */
986 xge_list_for_each(item, &hldev->fifo_channels) {
987 char key[XGE_OS_SPRINTF_STRLEN];
988 channel = xge_container_of(item, xge_hal_channel_t, item);
989
990 status = xge_hal_mgmt_channel_stats(channel, &chstat,
991 sizeof(xge_hal_mgmt_channel_stats_t));
992 if (status != XGE_HAL_OK) {
993 return status;
994 }
995
996 (void) xge_os_sprintf(key, "fifo%d_", channel->post_qid);
997
998 xge_os_strcpy(key+6, "full_cnt");
999 __HAL_AUX_ENTRY(key, chstat.full_cnt, "%u");
1000 xge_os_strcpy(key+6, "usage_max");
1001 __HAL_AUX_ENTRY(key, chstat.usage_max, "%u");
1002 xge_os_strcpy(key+6, "usage_cnt");
1003 __HAL_AUX_ENTRY(key, channel->usage_cnt, "%u");
1004 xge_os_strcpy(key+6, "reserve_free_swaps_cnt");
1005 __HAL_AUX_ENTRY(key, chstat.reserve_free_swaps_cnt, "%u");
1006 xge_os_strcpy(key+6, "avg_compl_per_intr_cnt");
1007 __HAL_AUX_ENTRY(key, chstat.avg_compl_per_intr_cnt, "%u");
1008 xge_os_strcpy(key+6, "total_compl_cnt");
1009 __HAL_AUX_ENTRY(key, chstat.total_compl_cnt, "%u");
1010 xge_os_strcpy(key+6, "total_posts");
1011 __HAL_AUX_ENTRY(key, chstat.total_posts, "%u");
1012 xge_os_strcpy(key+6, "total_posts_many");
1013 __HAL_AUX_ENTRY(key, chstat.total_posts_many, "%u");
1014 xge_os_strcpy(key+6, "copied_frags");
1015 __HAL_AUX_ENTRY(key, chstat.copied_frags, "%u");
1016 xge_os_strcpy(key+6, "copied_buffers");
1017 __HAL_AUX_ENTRY(key, chstat.copied_buffers, "%u");
1018 xge_os_strcpy(key+6, "total_buffers");
1019 __HAL_AUX_ENTRY(key, chstat.total_buffers, "%u");
1020 xge_os_strcpy(key+6, "avg_buffers_per_post");
1021 __HAL_AUX_ENTRY(key, chstat.avg_buffers_per_post, "%u");
1022 xge_os_strcpy(key+6, "avg_buffer_size");
1023 __HAL_AUX_ENTRY(key, chstat.avg_buffer_size, "%u");
1024 xge_os_strcpy(key+6, "avg_post_size");
1025 __HAL_AUX_ENTRY(key, chstat.avg_post_size, "%u");
1026 xge_os_strcpy(key+6, "total_posts_dtrs_many");
1027 __HAL_AUX_ENTRY(key, chstat.total_posts_dtrs_many, "%u");
1028 xge_os_strcpy(key+6, "total_posts_frags_many");
1029 __HAL_AUX_ENTRY(key, chstat.total_posts_frags_many, "%u");
1030 xge_os_strcpy(key+6, "total_posts_dang_dtrs");
1031 __HAL_AUX_ENTRY(key, chstat.total_posts_dang_dtrs, "%u");
1032 xge_os_strcpy(key+6, "total_posts_dang_frags");
1033 __HAL_AUX_ENTRY(key, chstat.total_posts_dang_frags, "%u");
1034 }
1035
1036 __HAL_AUX_ENTRY_END(bufsize, retsize);
1037
1038 return XGE_HAL_OK;
1039 }
1040
1041
1042
1043 /**
1044 * xge_hal_aux_stats_sw_dev_read - Read software device statistics.
1045 * @devh: HAL device handle.
1046 * @bufsize: Buffer size.
1047 * @retbuf: Buffer pointer.
1048 * @retsize: Size of the result. Cannot be greater than @bufsize.
1049 *
1050 * Read software-maintained device statistics.
1051 *
1052 * Returns: XGE_HAL_OK - success.
1053 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
1054 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
1055 * XGE_HAL_INF_STATS_IS_NOT_READY - Statistics information is not
1056 * currently available.
1057 *
1058 * See also: xge_hal_aux_device_dump().
1059 */
xge_hal_aux_stats_sw_dev_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)1060 xge_hal_status_e xge_hal_aux_stats_sw_dev_read(xge_hal_device_h devh,
1061 int bufsize, char *retbuf, int *retsize)
1062 {
1063 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
1064 xge_hal_status_e status;
1065 xge_hal_mgmt_sw_stats_t sw_dev_err_stats;
1066 int t_code;
1067 char buf[XGE_OS_SPRINTF_STRLEN];
1068
1069 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
1070
1071 status = xge_hal_mgmt_sw_stats(hldev, &sw_dev_err_stats,
1072 sizeof(xge_hal_mgmt_sw_stats_t));
1073 if (status != XGE_HAL_OK) {
1074 return status;
1075 }
1076
1077 __HAL_AUX_ENTRY("sm_err_cnt",sw_dev_err_stats.sm_err_cnt, "%u");
1078 __HAL_AUX_ENTRY("single_ecc_err_cnt",sw_dev_err_stats.single_ecc_err_cnt, "%u");
1079 __HAL_AUX_ENTRY("double_ecc_err_cnt",sw_dev_err_stats.double_ecc_err_cnt, "%u");
1080 __HAL_AUX_ENTRY("ecc_err_cnt", sw_dev_err_stats.ecc_err_cnt, "%u");
1081 __HAL_AUX_ENTRY("parity_err_cnt",sw_dev_err_stats.parity_err_cnt, "%u");
1082 __HAL_AUX_ENTRY("serr_cnt",sw_dev_err_stats.serr_cnt, "%u");
1083
1084 for (t_code = 1; t_code < 16; t_code++) {
1085 int t_code_cnt = sw_dev_err_stats.rxd_t_code_err_cnt[t_code];
1086 if (t_code_cnt) {
1087 (void) xge_os_sprintf(buf, "rxd_t_code_%d", t_code);
1088 __HAL_AUX_ENTRY(buf, t_code_cnt, "%u");
1089 }
1090 t_code_cnt = sw_dev_err_stats.txd_t_code_err_cnt[t_code];
1091 if (t_code_cnt) {
1092 (void) xge_os_sprintf(buf, "txd_t_code_%d", t_code);
1093 __HAL_AUX_ENTRY(buf, t_code_cnt, "%u");
1094 }
1095 }
1096 __HAL_AUX_ENTRY("alarm_transceiver_temp_high",sw_dev_err_stats.
1097 stats_xpak.alarm_transceiver_temp_high, "%u");
1098 __HAL_AUX_ENTRY("alarm_transceiver_temp_low",sw_dev_err_stats.
1099 stats_xpak.alarm_transceiver_temp_low, "%u");
1100 __HAL_AUX_ENTRY("alarm_laser_bias_current_high",sw_dev_err_stats.
1101 stats_xpak.alarm_laser_bias_current_high, "%u");
1102 __HAL_AUX_ENTRY("alarm_laser_bias_current_low",sw_dev_err_stats.
1103 stats_xpak.alarm_laser_bias_current_low, "%u");
1104 __HAL_AUX_ENTRY("alarm_laser_output_power_high",sw_dev_err_stats.
1105 stats_xpak.alarm_laser_output_power_high, "%u");
1106 __HAL_AUX_ENTRY("alarm_laser_output_power_low",sw_dev_err_stats.
1107 stats_xpak.alarm_laser_output_power_low, "%u");
1108 __HAL_AUX_ENTRY("warn_transceiver_temp_high",sw_dev_err_stats.
1109 stats_xpak.warn_transceiver_temp_high, "%u");
1110 __HAL_AUX_ENTRY("warn_transceiver_temp_low",sw_dev_err_stats.
1111 stats_xpak.warn_transceiver_temp_low, "%u");
1112 __HAL_AUX_ENTRY("warn_laser_bias_current_high",sw_dev_err_stats.
1113 stats_xpak.warn_laser_bias_current_high, "%u");
1114 __HAL_AUX_ENTRY("warn_laser_bias_current_low",sw_dev_err_stats.
1115 stats_xpak.warn_laser_bias_current_low, "%u");
1116 __HAL_AUX_ENTRY("warn_laser_output_power_high",sw_dev_err_stats.
1117 stats_xpak.warn_laser_output_power_high, "%u");
1118 __HAL_AUX_ENTRY("warn_laser_output_power_low",sw_dev_err_stats.
1119 stats_xpak.warn_laser_output_power_low, "%u");
1120
1121 __HAL_AUX_ENTRY_END(bufsize, retsize);
1122
1123 return XGE_HAL_OK;
1124 }
1125
1126 /**
1127 * xge_hal_aux_pci_config_read - Retrieve and format PCI Configuration
1128 * info.
1129 * @devh: HAL device handle.
1130 * @bufsize: Buffer size.
1131 * @retbuf: Buffer pointer.
1132 * @retsize: Size of the result. Cannot be greater than @bufsize.
1133 *
1134 * Retrieve about info (using xge_hal_mgmt_pci_config()) and sprintf it
1135 * into the provided @retbuf.
1136 *
1137 * Returns: XGE_HAL_OK - success.
1138 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
1139 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
1140 *
1141 * See also: xge_hal_mgmt_pci_config(), xge_hal_aux_device_dump().
1142 */
xge_hal_aux_pci_config_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)1143 xge_hal_status_e xge_hal_aux_pci_config_read(xge_hal_device_h devh, int bufsize,
1144 char *retbuf, int *retsize)
1145 {
1146 xge_hal_status_e status;
1147 xge_hal_mgmt_pci_config_t pci_config;
1148 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
1149
1150 status = xge_hal_mgmt_pci_config(devh, &pci_config,
1151 sizeof(xge_hal_mgmt_pci_config_t));
1152 if (status != XGE_HAL_OK) {
1153 return status;
1154 }
1155
1156 __HAL_AUX_ENTRY("vendor_id", pci_config.vendor_id, "0x%04X");
1157 __HAL_AUX_ENTRY("device_id", pci_config.device_id, "0x%04X");
1158 __HAL_AUX_ENTRY("command", pci_config.command, "0x%04X");
1159 __HAL_AUX_ENTRY("status", pci_config.status, "0x%04X");
1160 __HAL_AUX_ENTRY("revision", pci_config.revision, "0x%02X");
1161 __HAL_AUX_ENTRY("pciClass1", pci_config.pciClass[0], "0x%02X");
1162 __HAL_AUX_ENTRY("pciClass2", pci_config.pciClass[1], "0x%02X");
1163 __HAL_AUX_ENTRY("pciClass3", pci_config.pciClass[2], "0x%02X");
1164 __HAL_AUX_ENTRY("cache_line_size",
1165 pci_config.cache_line_size, "0x%02X");
1166 __HAL_AUX_ENTRY("latency_timer", pci_config.latency_timer, "0x%02X");
1167 __HAL_AUX_ENTRY("header_type", pci_config.header_type, "0x%02X");
1168 __HAL_AUX_ENTRY("bist", pci_config.bist, "0x%02X");
1169 __HAL_AUX_ENTRY("base_addr0_lo", pci_config.base_addr0_lo, "0x%08X");
1170 __HAL_AUX_ENTRY("base_addr0_hi", pci_config.base_addr0_hi, "0x%08X");
1171 __HAL_AUX_ENTRY("base_addr1_lo", pci_config.base_addr1_lo, "0x%08X");
1172 __HAL_AUX_ENTRY("base_addr1_hi", pci_config.base_addr1_hi, "0x%08X");
1173 __HAL_AUX_ENTRY("not_Implemented1",
1174 pci_config.not_Implemented1, "0x%08X");
1175 __HAL_AUX_ENTRY("not_Implemented2", pci_config.not_Implemented2,
1176 "0x%08X");
1177 __HAL_AUX_ENTRY("cardbus_cis_pointer", pci_config.cardbus_cis_pointer,
1178 "0x%08X");
1179 __HAL_AUX_ENTRY("subsystem_vendor_id", pci_config.subsystem_vendor_id,
1180 "0x%04X");
1181 __HAL_AUX_ENTRY("subsystem_id", pci_config.subsystem_id, "0x%04X");
1182 __HAL_AUX_ENTRY("rom_base", pci_config.rom_base, "0x%08X");
1183 __HAL_AUX_ENTRY("capabilities_pointer",
1184 pci_config.capabilities_pointer, "0x%02X");
1185 __HAL_AUX_ENTRY("interrupt_line", pci_config.interrupt_line, "0x%02X");
1186 __HAL_AUX_ENTRY("interrupt_pin", pci_config.interrupt_pin, "0x%02X");
1187 __HAL_AUX_ENTRY("min_grant", pci_config.min_grant, "0x%02X");
1188 __HAL_AUX_ENTRY("max_latency", pci_config.max_latency, "0x%02X");
1189 __HAL_AUX_ENTRY("msi_cap_id", pci_config.msi_cap_id, "0x%02X");
1190 __HAL_AUX_ENTRY("msi_next_ptr", pci_config.msi_next_ptr, "0x%02X");
1191 __HAL_AUX_ENTRY("msi_control", pci_config.msi_control, "0x%04X");
1192 __HAL_AUX_ENTRY("msi_lower_address", pci_config.msi_lower_address,
1193 "0x%08X");
1194 __HAL_AUX_ENTRY("msi_higher_address", pci_config.msi_higher_address,
1195 "0x%08X");
1196 __HAL_AUX_ENTRY("msi_data", pci_config.msi_data, "0x%04X");
1197 __HAL_AUX_ENTRY("msi_unused", pci_config.msi_unused, "0x%04X");
1198 __HAL_AUX_ENTRY("vpd_cap_id", pci_config.vpd_cap_id, "0x%02X");
1199 __HAL_AUX_ENTRY("vpd_next_cap", pci_config.vpd_next_cap, "0x%02X");
1200 __HAL_AUX_ENTRY("vpd_addr", pci_config.vpd_addr, "0x%04X");
1201 __HAL_AUX_ENTRY("vpd_data", pci_config.vpd_data, "0x%08X");
1202 __HAL_AUX_ENTRY("pcix_cap", pci_config.pcix_cap, "0x%02X");
1203 __HAL_AUX_ENTRY("pcix_next_cap", pci_config.pcix_next_cap, "0x%02X");
1204 __HAL_AUX_ENTRY("pcix_command", pci_config.pcix_command, "0x%04X");
1205 __HAL_AUX_ENTRY("pcix_status", pci_config.pcix_status, "0x%08X");
1206
1207 if (xge_hal_device_check_id(devh) == XGE_HAL_CARD_HERC) {
1208 char key[XGE_OS_SPRINTF_STRLEN];
1209 int i;
1210
1211 for (i = 0;
1212 i < (XGE_HAL_PCI_XFRAME_CONFIG_SPACE_SIZE - 0x68)/4;
1213 i++) {
1214 (void) xge_os_sprintf(key, "%03x:", 4*i + 0x68);
1215 __HAL_AUX_ENTRY(key, *((int *)pci_config.rsvd_b1 + i),
1216 "0x%08X");
1217 }
1218 }
1219
1220 __HAL_AUX_ENTRY_END(bufsize, retsize);
1221
1222 return XGE_HAL_OK;
1223 }
1224
1225
1226 /**
1227 * xge_hal_aux_channel_read - Read channels information.
1228 * @devh: HAL device handle.
1229 * @bufsize: Buffer size.
1230 * @retbuf: Buffer pointer.
1231 * @retsize: Size of the result. Cannot be greater than @bufsize.
1232 *
1233 * Read HAL statistics.
1234 *
1235 * Returns: XGE_HAL_OK - success.
1236 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
1237 * XGE_HAL_ERR_OUT_OF_SPACE - Buffer size is very small.
1238 * See also: xge_hal_aux_device_dump().
1239 */
xge_hal_aux_channel_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)1240 xge_hal_status_e xge_hal_aux_channel_read(xge_hal_device_h devh,
1241 int bufsize, char *retbuf, int *retsize)
1242 {
1243 xge_list_t *item;
1244 xge_hal_channel_t *channel;
1245 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
1246 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
1247
1248 if (hldev->magic != XGE_HAL_MAGIC) {
1249 return XGE_HAL_ERR_INVALID_DEVICE;
1250 }
1251
1252 /* for each opened rx channel */
1253 xge_list_for_each(item, &hldev->ring_channels) {
1254 char key[XGE_OS_SPRINTF_STRLEN];
1255 channel = xge_container_of(item, xge_hal_channel_t, item);
1256
1257 if (channel->is_open != 1)
1258 continue;
1259
1260 (void) xge_os_sprintf(key, "ring%d_", channel->post_qid);
1261 xge_os_strcpy(key+6, "type");
1262 __HAL_AUX_ENTRY(key, channel->type, "%u");
1263 xge_os_strcpy(key+6, "length");
1264 __HAL_AUX_ENTRY(key, channel->length, "%u");
1265 xge_os_strcpy(key+6, "is_open");
1266 __HAL_AUX_ENTRY(key, channel->is_open, "%u");
1267 xge_os_strcpy(key+6, "reserve_initial");
1268 __HAL_AUX_ENTRY(key, channel->reserve_initial, "%u");
1269 xge_os_strcpy(key+6, "reserve_max");
1270 __HAL_AUX_ENTRY(key, channel->reserve_max, "%u");
1271 xge_os_strcpy(key+6, "reserve_length");
1272 __HAL_AUX_ENTRY(key, channel->reserve_length, "%u");
1273 xge_os_strcpy(key+6, "reserve_top");
1274 __HAL_AUX_ENTRY(key, channel->reserve_top, "%u");
1275 xge_os_strcpy(key+6, "reserve_threshold");
1276 __HAL_AUX_ENTRY(key, channel->reserve_threshold, "%u");
1277 xge_os_strcpy(key+6, "free_length");
1278 __HAL_AUX_ENTRY(key, channel->free_length, "%u");
1279 xge_os_strcpy(key+6, "post_index");
1280 __HAL_AUX_ENTRY(key, channel->post_index, "%u");
1281 xge_os_strcpy(key+6, "compl_index");
1282 __HAL_AUX_ENTRY(key, channel->compl_index, "%u");
1283 xge_os_strcpy(key+6, "per_dtr_space");
1284 __HAL_AUX_ENTRY(key, channel->per_dtr_space, "%u");
1285 xge_os_strcpy(key+6, "usage_cnt");
1286 __HAL_AUX_ENTRY(key, channel->usage_cnt, "%u");
1287 }
1288
1289 /* for each opened tx channel */
1290 xge_list_for_each(item, &hldev->fifo_channels) {
1291 char key[XGE_OS_SPRINTF_STRLEN];
1292 channel = xge_container_of(item, xge_hal_channel_t, item);
1293
1294 if (channel->is_open != 1)
1295 continue;
1296
1297 (void) xge_os_sprintf(key, "fifo%d_", channel->post_qid);
1298 xge_os_strcpy(key+6, "type");
1299 __HAL_AUX_ENTRY(key, channel->type, "%u");
1300 xge_os_strcpy(key+6, "length");
1301 __HAL_AUX_ENTRY(key, channel->length, "%u");
1302 xge_os_strcpy(key+6, "is_open");
1303 __HAL_AUX_ENTRY(key, channel->is_open, "%u");
1304 xge_os_strcpy(key+6, "reserve_initial");
1305 __HAL_AUX_ENTRY(key, channel->reserve_initial, "%u");
1306 xge_os_strcpy(key+6, "reserve_max");
1307 __HAL_AUX_ENTRY(key, channel->reserve_max, "%u");
1308 xge_os_strcpy(key+6, "reserve_length");
1309 __HAL_AUX_ENTRY(key, channel->reserve_length, "%u");
1310 xge_os_strcpy(key+6, "reserve_top");
1311 __HAL_AUX_ENTRY(key, channel->reserve_top, "%u");
1312 xge_os_strcpy(key+6, "reserve_threshold");
1313 __HAL_AUX_ENTRY(key, channel->reserve_threshold, "%u");
1314 xge_os_strcpy(key+6, "free_length");
1315 __HAL_AUX_ENTRY(key, channel->free_length, "%u");
1316 xge_os_strcpy(key+6, "post_index");
1317 __HAL_AUX_ENTRY(key, channel->post_index, "%u");
1318 xge_os_strcpy(key+6, "compl_index");
1319 __HAL_AUX_ENTRY(key, channel->compl_index, "%u");
1320 xge_os_strcpy(key+6, "per_dtr_space");
1321 __HAL_AUX_ENTRY(key, channel->per_dtr_space, "%u");
1322 xge_os_strcpy(key+6, "usage_cnt");
1323 __HAL_AUX_ENTRY(key, channel->usage_cnt, "%u");
1324 }
1325
1326 __HAL_AUX_ENTRY_END(bufsize, retsize);
1327
1328 return XGE_HAL_OK;
1329 }
1330
1331 /**
1332 * xge_hal_aux_device_dump - Dump driver "about" info and device state.
1333 * @devh: HAL device handle.
1334 *
1335 * Dump driver & device "about" info and device state,
1336 * including all BAR0 registers, hardware and software statistics, PCI
1337 * configuration space.
1338 * See also: xge_hal_aux_about_read(), xge_hal_mgmt_reg_read(),
1339 * xge_hal_aux_pci_config_read(), xge_hal_aux_stats_sw_dev_read(),
1340 * xge_hal_aux_stats_tmac_read(), xge_hal_aux_stats_rmac_read(),
1341 * xge_hal_aux_channel_read(), xge_hal_aux_stats_hal_read().
1342 * Returns:
1343 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
1344 * XGE_HAL_ERR_OUT_OF_SPACE - Buffer size is very small.
1345 */
1346 xge_hal_status_e
xge_hal_aux_device_dump(xge_hal_device_h devh)1347 xge_hal_aux_device_dump(xge_hal_device_h devh)
1348 {
1349 xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
1350 xge_hal_status_e status;
1351 int retsize;
1352 int offset;
1353 u64 retval;
1354
1355 xge_assert(hldev->dump_buf != NULL);
1356
1357 xge_os_println("********* xge DEVICE DUMP BEGIN **********");
1358
1359 status = xge_hal_aux_about_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1360 hldev->dump_buf,
1361 &retsize);
1362 if (status != XGE_HAL_OK) {
1363 goto error;
1364 }
1365 xge_os_println(hldev->dump_buf);
1366
1367
1368 for (offset = 0; offset < 1574; offset++) {
1369
1370 status = xge_hal_mgmt_reg_read(hldev, 0, offset*8, &retval);
1371 if (status != XGE_HAL_OK) {
1372 goto error;
1373 }
1374
1375 if (!retval) continue;
1376
1377 xge_os_printf("0x%04x 0x%08x%08x", offset*8,
1378 (u32)(retval>>32), (u32)retval);
1379 }
1380 xge_os_println("\n");
1381
1382 status = xge_hal_aux_pci_config_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1383 hldev->dump_buf,
1384 &retsize);
1385 if (status != XGE_HAL_OK) {
1386 goto error;
1387 }
1388 xge_os_println(hldev->dump_buf);
1389
1390 status = xge_hal_aux_stats_tmac_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1391 hldev->dump_buf,
1392 &retsize);
1393 if (status != XGE_HAL_OK) {
1394 goto error;
1395 }
1396 xge_os_println(hldev->dump_buf);
1397
1398 status = xge_hal_aux_stats_rmac_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1399 hldev->dump_buf,
1400 &retsize);
1401 if (status != XGE_HAL_OK) {
1402 goto error;
1403 }
1404 xge_os_println(hldev->dump_buf);
1405
1406 status = xge_hal_aux_stats_pci_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1407 hldev->dump_buf,
1408 &retsize);
1409 if (status != XGE_HAL_OK) {
1410 goto error;
1411 }
1412 xge_os_println(hldev->dump_buf);
1413
1414 if (xge_hal_device_check_id(hldev) == XGE_HAL_CARD_HERC) {
1415 status = xge_hal_aux_stats_herc_enchanced(hldev,
1416 XGE_HAL_DUMP_BUF_SIZE, hldev->dump_buf, &retsize);
1417 if (status != XGE_HAL_OK) {
1418 goto error;
1419 }
1420 xge_os_println(hldev->dump_buf);
1421 }
1422
1423 status = xge_hal_aux_stats_sw_dev_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1424 hldev->dump_buf, &retsize);
1425 if (status != XGE_HAL_OK) {
1426 goto error;
1427 }
1428 xge_os_println(hldev->dump_buf);
1429
1430 status = xge_hal_aux_channel_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1431 hldev->dump_buf,
1432 &retsize);
1433 if (status != XGE_HAL_OK) {
1434 goto error;
1435 }
1436 xge_os_println(hldev->dump_buf);
1437
1438 status = xge_hal_aux_stats_hal_read(hldev, XGE_HAL_DUMP_BUF_SIZE,
1439 hldev->dump_buf,
1440 &retsize);
1441 if (status != XGE_HAL_OK) {
1442 goto error;
1443 }
1444 xge_os_println(hldev->dump_buf);
1445
1446 xge_os_println("********* XFRAME DEVICE DUMP END **********");
1447
1448 error:
1449 return status;
1450 }
1451
1452
1453 /**
1454 * xge_hal_aux_driver_config_read - Read Driver configuration.
1455 * @bufsize: Buffer size.
1456 * @retbuf: Buffer pointer.
1457 * @retsize: Size of the result. Cannot be greater than @bufsize.
1458 *
1459 * Read driver configuration,
1460 *
1461 * Returns: XGE_HAL_OK - success.
1462 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
1463 *
1464 * See also: xge_hal_aux_device_config_read().
1465 */
1466 xge_hal_status_e
xge_hal_aux_driver_config_read(int bufsize,char * retbuf,int * retsize)1467 xge_hal_aux_driver_config_read(int bufsize, char *retbuf, int *retsize)
1468 {
1469 xge_hal_status_e status;
1470 xge_hal_driver_config_t drv_config;
1471 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
1472
1473 status = xge_hal_mgmt_driver_config(&drv_config,
1474 sizeof(xge_hal_driver_config_t));
1475 if (status != XGE_HAL_OK) {
1476 return status;
1477 }
1478
1479 __HAL_AUX_ENTRY("queue size initial",
1480 drv_config.queue_size_initial, "%u");
1481 __HAL_AUX_ENTRY("queue size max", drv_config.queue_size_max, "%u");
1482 __HAL_AUX_ENTRY_END(bufsize, retsize);
1483
1484 return XGE_HAL_OK;
1485 }
1486
1487
1488 /**
1489 * xge_hal_aux_device_config_read - Read device configuration.
1490 * @devh: HAL device handle.
1491 * @bufsize: Buffer size.
1492 * @retbuf: Buffer pointer.
1493 * @retsize: Size of the result. Cannot be greater than @bufsize.
1494 *
1495 * Read device configuration,
1496 *
1497 * Returns: XGE_HAL_OK - success.
1498 * XGE_HAL_ERR_INVALID_DEVICE - Device is not valid.
1499 * XGE_HAL_ERR_VERSION_CONFLICT - Version it not maching.
1500 *
1501 * See also: xge_hal_aux_driver_config_read().
1502 */
xge_hal_aux_device_config_read(xge_hal_device_h devh,int bufsize,char * retbuf,int * retsize)1503 xge_hal_status_e xge_hal_aux_device_config_read(xge_hal_device_h devh,
1504 int bufsize, char *retbuf, int *retsize)
1505 {
1506 int i;
1507 xge_hal_status_e status;
1508 xge_hal_device_config_t *dev_config;
1509 xge_hal_device_t *hldev = (xge_hal_device_t *) devh;
1510 char key[XGE_OS_SPRINTF_STRLEN];
1511 __HAL_AUX_ENTRY_DECLARE(bufsize, retbuf);
1512
1513 dev_config = (xge_hal_device_config_t *) xge_os_malloc(hldev->pdev,
1514 sizeof(xge_hal_device_config_t));
1515 if (dev_config == NULL) {
1516 return XGE_HAL_FAIL;
1517 }
1518
1519 status = xge_hal_mgmt_device_config(devh, dev_config,
1520 sizeof(xge_hal_device_config_t));
1521 if (status != XGE_HAL_OK) {
1522 xge_os_free(hldev->pdev, dev_config,
1523 sizeof(xge_hal_device_config_t));
1524 return status;
1525 }
1526
1527 __HAL_AUX_ENTRY("mtu", dev_config->mtu, "%u");
1528 __HAL_AUX_ENTRY("isr_polling_count", dev_config->isr_polling_cnt, "%u");
1529 __HAL_AUX_ENTRY("latency_timer", dev_config->latency_timer, "%u");
1530 __HAL_AUX_ENTRY("max_splits_trans",
1531 dev_config->max_splits_trans, "%u");
1532 __HAL_AUX_ENTRY("mmrb_count", dev_config->mmrb_count, "%d");
1533 __HAL_AUX_ENTRY("shared_splits", dev_config->shared_splits, "%u");
1534 __HAL_AUX_ENTRY("stats_refresh_time_sec",
1535 dev_config->stats_refresh_time_sec, "%u");
1536 __HAL_AUX_ENTRY("pci_freq_mherz", dev_config->pci_freq_mherz, "%u");
1537 __HAL_AUX_ENTRY("intr_mode", dev_config->intr_mode, "%u");
1538 __HAL_AUX_ENTRY("ring_memblock_size",
1539 dev_config->ring.memblock_size, "%u");
1540
1541 __HAL_AUX_ENTRY("sched_timer_us", dev_config->sched_timer_us, "%u");
1542 __HAL_AUX_ENTRY("sched_timer_one_shot",
1543 dev_config->sched_timer_one_shot, "%u");
1544 __HAL_AUX_ENTRY("rxufca_intr_thres", dev_config->rxufca_intr_thres, "%u");
1545 __HAL_AUX_ENTRY("rxufca_lo_lim", dev_config->rxufca_lo_lim, "%u");
1546 __HAL_AUX_ENTRY("rxufca_hi_lim", dev_config->rxufca_hi_lim, "%u");
1547 __HAL_AUX_ENTRY("rxufca_lbolt_period", dev_config->rxufca_lbolt_period, "%u");
1548
1549 for(i = 0; i < XGE_HAL_MAX_RING_NUM; i++)
1550 {
1551 xge_hal_ring_queue_t *ring = &dev_config->ring.queue[i];
1552 xge_hal_rti_config_t *rti = &ring->rti;
1553
1554 if (!ring->configured)
1555 continue;
1556
1557 (void) xge_os_sprintf(key, "ring%d_", i);
1558 xge_os_strcpy(key+6, "inital");
1559 __HAL_AUX_ENTRY(key, ring->initial, "%u");
1560 xge_os_strcpy(key+6, "max");
1561 __HAL_AUX_ENTRY(key, ring->max, "%u");
1562 xge_os_strcpy(key+6, "buffer_mode");
1563 __HAL_AUX_ENTRY(key, ring->buffer_mode, "%u");
1564 xge_os_strcpy(key+6, "dram_size_mb");
1565 __HAL_AUX_ENTRY(key, ring->dram_size_mb, "%u");
1566 xge_os_strcpy(key+6, "backoff_interval_us");
1567 __HAL_AUX_ENTRY(key, ring->backoff_interval_us, "%u");
1568 xge_os_strcpy(key+6, "max_frame_len");
1569 __HAL_AUX_ENTRY(key, ring->max_frm_len, "%d");
1570 xge_os_strcpy(key+6, "priority");
1571 __HAL_AUX_ENTRY(key, ring->priority, "%u");
1572 xge_os_strcpy(key+6, "rth_en");
1573 __HAL_AUX_ENTRY(key, ring->rth_en, "%u");
1574 xge_os_strcpy(key+6, "no_snoop_bits");
1575 __HAL_AUX_ENTRY(key, ring->no_snoop_bits, "%u");
1576 xge_os_strcpy(key+6, "indicate_max_pkts");
1577 __HAL_AUX_ENTRY(key, ring->indicate_max_pkts, "%u");
1578
1579 xge_os_strcpy(key+6, "urange_a");
1580 __HAL_AUX_ENTRY(key, rti->urange_a, "%u");
1581 xge_os_strcpy(key+6, "ufc_a");
1582 __HAL_AUX_ENTRY(key, rti->ufc_a, "%u");
1583 xge_os_strcpy(key+6, "urange_b");
1584 __HAL_AUX_ENTRY(key, rti->urange_b, "%u");
1585 xge_os_strcpy(key+6, "ufc_b");
1586 __HAL_AUX_ENTRY(key, rti->ufc_b, "%u");
1587 xge_os_strcpy(key+6, "urange_c");
1588 __HAL_AUX_ENTRY(key, rti->urange_c, "%u");
1589 xge_os_strcpy(key+6, "ufc_c");
1590 __HAL_AUX_ENTRY(key, rti->ufc_c, "%u");
1591 xge_os_strcpy(key+6, "ufc_d");
1592 __HAL_AUX_ENTRY(key, rti->ufc_d, "%u");
1593 xge_os_strcpy(key+6, "timer_val_us");
1594 __HAL_AUX_ENTRY(key, rti->timer_val_us, "%u");
1595 }
1596
1597
1598 {
1599 xge_hal_mac_config_t *mac= &dev_config->mac;
1600
1601 __HAL_AUX_ENTRY("tmac_util_period",
1602 mac->tmac_util_period, "%u");
1603 __HAL_AUX_ENTRY("rmac_util_period",
1604 mac->rmac_util_period, "%u");
1605 __HAL_AUX_ENTRY("rmac_bcast_en",
1606 mac->rmac_bcast_en, "%u");
1607 __HAL_AUX_ENTRY("rmac_pause_gen_en",
1608 mac->rmac_pause_gen_en, "%d");
1609 __HAL_AUX_ENTRY("rmac_pause_rcv_en",
1610 mac->rmac_pause_rcv_en, "%d");
1611 __HAL_AUX_ENTRY("rmac_pause_time",
1612 mac->rmac_pause_time, "%u");
1613 __HAL_AUX_ENTRY("mc_pause_threshold_q0q3",
1614 mac->mc_pause_threshold_q0q3, "%u");
1615 __HAL_AUX_ENTRY("mc_pause_threshold_q4q7",
1616 mac->mc_pause_threshold_q4q7, "%u");
1617 }
1618
1619
1620 __HAL_AUX_ENTRY("fifo_max_frags", dev_config->fifo.max_frags, "%u");
1621 __HAL_AUX_ENTRY("fifo_reserve_threshold",
1622 dev_config->fifo.reserve_threshold, "%u");
1623 __HAL_AUX_ENTRY("fifo_memblock_size",
1624 dev_config->fifo.memblock_size, "%u");
1625 #ifdef XGE_HAL_ALIGN_XMIT
1626 __HAL_AUX_ENTRY("fifo_alignment_size",
1627 dev_config->fifo.alignment_size, "%u");
1628 #endif
1629
1630 for (i = 0; i < XGE_HAL_MAX_FIFO_NUM; i++) {
1631 int j;
1632 xge_hal_fifo_queue_t *fifo = &dev_config->fifo.queue[i];
1633
1634 if (!fifo->configured)
1635 continue;
1636
1637 (void) xge_os_sprintf(key, "fifo%d_", i);
1638 xge_os_strcpy(key+6, "initial");
1639 __HAL_AUX_ENTRY(key, fifo->initial, "%u");
1640 xge_os_strcpy(key+6, "max");
1641 __HAL_AUX_ENTRY(key, fifo->max, "%u");
1642 xge_os_strcpy(key+6, "intr");
1643 __HAL_AUX_ENTRY(key, fifo->intr, "%u");
1644 xge_os_strcpy(key+6, "no_snoop_bits");
1645 __HAL_AUX_ENTRY(key, fifo->no_snoop_bits, "%u");
1646
1647 for (j = 0; j < XGE_HAL_MAX_FIFO_TTI_NUM; j++) {
1648 xge_hal_tti_config_t *tti =
1649 &dev_config->fifo.queue[i].tti[j];
1650
1651 if (!tti->enabled)
1652 continue;
1653
1654 (void) xge_os_sprintf(key, "fifo%d_tti%02d_", i,
1655 i * XGE_HAL_MAX_FIFO_TTI_NUM + j);
1656 xge_os_strcpy(key+12, "urange_a");
1657 __HAL_AUX_ENTRY(key, tti->urange_a, "%u");
1658 xge_os_strcpy(key+12, "ufc_a");
1659 __HAL_AUX_ENTRY(key, tti->ufc_a, "%u");
1660 xge_os_strcpy(key+12, "urange_b");
1661 __HAL_AUX_ENTRY(key, tti->urange_b, "%u");
1662 xge_os_strcpy(key+12, "ufc_b");
1663 __HAL_AUX_ENTRY(key, tti->ufc_b, "%u");
1664 xge_os_strcpy(key+12, "urange_c");
1665 __HAL_AUX_ENTRY(key, tti->urange_c, "%u");
1666 xge_os_strcpy(key+12, "ufc_c");
1667 __HAL_AUX_ENTRY(key, tti->ufc_c, "%u");
1668 xge_os_strcpy(key+12, "ufc_d");
1669 __HAL_AUX_ENTRY(key, tti->ufc_d, "%u");
1670 xge_os_strcpy(key+12, "timer_val_us");
1671 __HAL_AUX_ENTRY(key, tti->timer_val_us, "%u");
1672 xge_os_strcpy(key+12, "timer_ci_en");
1673 __HAL_AUX_ENTRY(key, tti->timer_ci_en, "%u");
1674 }
1675 }
1676
1677 /* and bimodal TTIs */
1678 for (i=0; i<XGE_HAL_MAX_RING_NUM; i++) {
1679 xge_hal_tti_config_t *tti = &hldev->bimodal_tti[i];
1680
1681 if (!tti->enabled)
1682 continue;
1683
1684 (void) xge_os_sprintf(key, "tti%02d_",
1685 XGE_HAL_MAX_FIFO_TTI_RING_0 + i);
1686
1687 xge_os_strcpy(key+6, "urange_a");
1688 __HAL_AUX_ENTRY(key, tti->urange_a, "%u");
1689 xge_os_strcpy(key+6, "ufc_a");
1690 __HAL_AUX_ENTRY(key, tti->ufc_a, "%u");
1691 xge_os_strcpy(key+6, "urange_b");
1692 __HAL_AUX_ENTRY(key, tti->urange_b, "%u");
1693 xge_os_strcpy(key+6, "ufc_b");
1694 __HAL_AUX_ENTRY(key, tti->ufc_b, "%u");
1695 xge_os_strcpy(key+6, "urange_c");
1696 __HAL_AUX_ENTRY(key, tti->urange_c, "%u");
1697 xge_os_strcpy(key+6, "ufc_c");
1698 __HAL_AUX_ENTRY(key, tti->ufc_c, "%u");
1699 xge_os_strcpy(key+6, "ufc_d");
1700 __HAL_AUX_ENTRY(key, tti->ufc_d, "%u");
1701 xge_os_strcpy(key+6, "timer_val_us");
1702 __HAL_AUX_ENTRY(key, tti->timer_val_us, "%u");
1703 xge_os_strcpy(key+6, "timer_ac_en");
1704 __HAL_AUX_ENTRY(key, tti->timer_ac_en, "%u");
1705 xge_os_strcpy(key+6, "timer_ci_en");
1706 __HAL_AUX_ENTRY(key, tti->timer_ci_en, "%u");
1707 }
1708 __HAL_AUX_ENTRY("dump_on_serr", dev_config->dump_on_serr, "%u");
1709 __HAL_AUX_ENTRY("dump_on_eccerr",
1710 dev_config->dump_on_eccerr, "%u");
1711 __HAL_AUX_ENTRY("dump_on_parityerr",
1712 dev_config->dump_on_parityerr, "%u");
1713 __HAL_AUX_ENTRY("rth_en", dev_config->rth_en, "%u");
1714 __HAL_AUX_ENTRY("rth_bucket_size", dev_config->rth_bucket_size, "%u");
1715
1716 __HAL_AUX_ENTRY_END(bufsize, retsize);
1717
1718 xge_os_free(hldev->pdev, dev_config,
1719 sizeof(xge_hal_device_config_t));
1720
1721 return XGE_HAL_OK;
1722 }
1723
1724