1 /*        $NetBSD: wdcreg.h,v 1.35 2012/01/15 20:08:54 jakllsch Exp $ */
2 
3 /*-
4  * Copyright (c) 1991 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * William Jolitz.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *        @(#)wdreg.h         7.1 (Berkeley) 5/9/91
35  */
36 
37 #ifndef _DEV_IC_WDCREG_H_
38 #define   _DEV_IC_WDCREG_H_
39 
40 /*
41  * WD1003 / ATA Disk Controller register definitions.
42  */
43 
44 /* offsets of registers in the 'regular' register region */
45 #define   wd_data                       0         /* data register (R/W - 16 bits) */
46 #define   wd_error            1         /* error register (R) */
47 #define   wd_precomp                    1         /* write precompensation (W) */
48 #define   wd_seccnt           2         /* sector count (R/W) */
49 #define   wd_ireason                    2         /* interrupt reason (R/W) (for atapi) */
50 #define   wd_sector           3         /* first sector number (R/W) */
51 #define   wd_cyl_lo           4         /* cylinder address, low byte (R/W) */
52 #define   wd_cyl_hi           5         /* cylinder address, high byte (R/W) */
53 #define   wd_sdh                        6         /* sector size/drive/head (R/W) */
54 #define   wd_command                    7         /* command register (W)       */
55 #define   wd_lba_lo           3         /* lba address, low byte (RW) */
56 #define   wd_lba_mi           4         /* lba address, middle byte (RW) */
57 #define   wd_lba_hi           5         /* lba address, high byte (RW) */
58 
59 /* "shadow" registers; these may or may not overlap regular registers */
60 #define   wd_status           8         /* immediate status (R) */
61 #define   wd_features                   9         /* features (W) */
62 
63 /* offsets of registers in the auxiliary register region */
64 #define   wd_aux_altsts                 0         /* alternate fixed disk status (R) */
65 #define   wd_aux_ctlr                   0         /* fixed disk controller control (W) */
66 #define  WDCTL_HOB             0x80     /* read high order byte */
67 #define  WDCTL_4BIT            0x08     /* use four head bits (wd1003) */
68 #define  WDCTL_RST             0x04     /* reset the controller */
69 #define  WDCTL_IDS             0x02     /* disable controller interrupts */
70 #if 0 /* NOT MAPPED; fd uses this register on PCs */
71 #define   wd_digin            1         /* disk controller input (R) */
72 #endif
73 
74 #endif /* _DEV_IC_WDCREG_H_ */
75