1 /*
2 * Copyright 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #include "vega12_thermal.h"
25 #include "vega12_hwmgr.h"
26 #include "vega12_smumgr.h"
27 #include "vega12_ppsmc.h"
28 #include "vega12_inc.h"
29 #include "soc15_common.h"
30 #include "pp_debug.h"
31
vega12_get_current_rpm(struct pp_hwmgr * hwmgr,uint32_t * current_rpm)32 static int vega12_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
33 {
34 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
35 PPSMC_MSG_GetCurrentRpm),
36 "Attempt to get current RPM from SMC Failed!",
37 return -EINVAL);
38 *current_rpm = smum_get_argument(hwmgr);
39
40 return 0;
41 }
42
vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr * hwmgr,struct phm_fan_speed_info * fan_speed_info)43 int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
44 struct phm_fan_speed_info *fan_speed_info)
45 {
46 memset(fan_speed_info, 0, sizeof(*fan_speed_info));
47 fan_speed_info->supports_percent_read = false;
48 fan_speed_info->supports_percent_write = false;
49 fan_speed_info->supports_rpm_read = true;
50 fan_speed_info->supports_rpm_write = true;
51
52 return 0;
53 }
54
vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr * hwmgr,uint32_t * speed)55 int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
56 {
57 *speed = 0;
58
59 return vega12_get_current_rpm(hwmgr, speed);
60 }
61
62 /**
63 * @fn vega12_enable_fan_control_feature
64 * @brief Enables the SMC Fan Control Feature.
65 *
66 * @param hwmgr - the address of the powerplay hardware manager.
67 * @return 0 on success. -1 otherwise.
68 */
vega12_enable_fan_control_feature(struct pp_hwmgr * hwmgr)69 static int vega12_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
70 {
71 #if 0
72 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
73
74 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
75 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
76 hwmgr, true,
77 data->smu_features[GNLD_FAN_CONTROL].
78 smu_feature_bitmap),
79 "Attempt to Enable FAN CONTROL feature Failed!",
80 return -1);
81 data->smu_features[GNLD_FAN_CONTROL].enabled = true;
82 }
83 #endif
84 return 0;
85 }
86
vega12_disable_fan_control_feature(struct pp_hwmgr * hwmgr)87 static int vega12_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
88 {
89 #if 0
90 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
91
92 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
93 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
94 hwmgr, false,
95 data->smu_features[GNLD_FAN_CONTROL].
96 smu_feature_bitmap),
97 "Attempt to Enable FAN CONTROL feature Failed!",
98 return -1);
99 data->smu_features[GNLD_FAN_CONTROL].enabled = false;
100 }
101 #endif
102 return 0;
103 }
104
vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr * hwmgr)105 int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
106 {
107 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
108
109 if (data->smu_features[GNLD_FAN_CONTROL].supported)
110 PP_ASSERT_WITH_CODE(
111 !vega12_enable_fan_control_feature(hwmgr),
112 "Attempt to Enable SMC FAN CONTROL Feature Failed!",
113 return -1);
114
115 return 0;
116 }
117
118
vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr * hwmgr)119 int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
120 {
121 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
122
123 if (data->smu_features[GNLD_FAN_CONTROL].supported)
124 PP_ASSERT_WITH_CODE(!vega12_disable_fan_control_feature(hwmgr),
125 "Attempt to Disable SMC FAN CONTROL Feature Failed!",
126 return -1);
127
128 return 0;
129 }
130
131 /**
132 * Reset Fan Speed to default.
133 * @param hwmgr the address of the powerplay hardware manager.
134 * @exception Always succeeds.
135 */
vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr * hwmgr)136 int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
137 {
138 return vega12_fan_ctrl_start_smc_fan_control(hwmgr);
139 }
140
141 /**
142 * Reads the remote temperature from the SIslands thermal controller.
143 *
144 * @param hwmgr The address of the hardware manager.
145 */
vega12_thermal_get_temperature(struct pp_hwmgr * hwmgr)146 int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
147 {
148 struct amdgpu_device *adev = hwmgr->adev;
149 int temp = 0;
150
151 temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
152
153 temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
154 CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
155
156 temp = temp & 0x1ff;
157
158 temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
159 return temp;
160 }
161
162 /**
163 * Set the requested temperature range for high and low alert signals
164 *
165 * @param hwmgr The address of the hardware manager.
166 * @param range Temperature range to be programmed for
167 * high and low alert signals
168 * @exception PP_Result_BadInput if the input data is not valid.
169 */
vega12_thermal_set_temperature_range(struct pp_hwmgr * hwmgr,struct PP_TemperatureRange * range)170 static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
171 struct PP_TemperatureRange *range)
172 {
173 struct phm_ppt_v3_information *pptable_information =
174 (struct phm_ppt_v3_information *)hwmgr->pptable;
175 struct amdgpu_device *adev = hwmgr->adev;
176 int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
177 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
178 int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
179 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
180 uint32_t val;
181
182 if (low < range->min)
183 low = range->min;
184 if (high > pptable_information->us_software_shutdown_temp)
185 high = pptable_information->us_software_shutdown_temp;
186
187 if (low > high)
188 return -EINVAL;
189
190 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
191
192 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
193 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
194 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
195 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
196 val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
197
198 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
199
200 return 0;
201 }
202
203 /**
204 * Enable thermal alerts on the RV770 thermal controller.
205 *
206 * @param hwmgr The address of the hardware manager.
207 */
vega12_thermal_enable_alert(struct pp_hwmgr * hwmgr)208 static int vega12_thermal_enable_alert(struct pp_hwmgr *hwmgr)
209 {
210 struct amdgpu_device *adev = hwmgr->adev;
211 uint32_t val = 0;
212
213 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
214 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
215 val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
216
217 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
218
219 return 0;
220 }
221
222 /**
223 * Disable thermal alerts on the RV770 thermal controller.
224 * @param hwmgr The address of the hardware manager.
225 */
vega12_thermal_disable_alert(struct pp_hwmgr * hwmgr)226 int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr)
227 {
228 struct amdgpu_device *adev = hwmgr->adev;
229
230 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
231
232 return 0;
233 }
234
235 /**
236 * Uninitialize the thermal controller.
237 * Currently just disables alerts.
238 * @param hwmgr The address of the hardware manager.
239 */
vega12_thermal_stop_thermal_controller(struct pp_hwmgr * hwmgr)240 int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
241 {
242 int result = vega12_thermal_disable_alert(hwmgr);
243
244 return result;
245 }
246
247 /**
248 * Set up the fan table to control the fan using the SMC.
249 * @param hwmgr the address of the powerplay hardware manager.
250 * @param pInput the pointer to input data
251 * @param pOutput the pointer to output data
252 * @param pStorage the pointer to temporary storage
253 * @param Result the last failure code
254 * @return result from set temperature range routine
255 */
256 int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
vega12_thermal_setup_fan_table(struct pp_hwmgr * hwmgr)257 int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
258 {
259 int ret;
260 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
261 PPTable_t *table = &(data->smc_state_table.pp_table);
262
263 ret = smum_send_msg_to_smc_with_parameter(hwmgr,
264 PPSMC_MSG_SetFanTemperatureTarget,
265 (uint32_t)table->FanTargetTemperature);
266
267 return ret;
268 }
269
270 /**
271 * Start the fan control on the SMC.
272 * @param hwmgr the address of the powerplay hardware manager.
273 * @param pInput the pointer to input data
274 * @param pOutput the pointer to output data
275 * @param pStorage the pointer to temporary storage
276 * @param Result the last failure code
277 * @return result from set temperature range routine
278 */
279 int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr);
vega12_thermal_start_smc_fan_control(struct pp_hwmgr * hwmgr)280 int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
281 {
282 /* If the fantable setup has failed we could have disabled
283 * PHM_PlatformCaps_MicrocodeFanControl even after
284 * this function was included in the table.
285 * Make sure that we still think controlling the fan is OK.
286 */
287 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
288 vega12_fan_ctrl_start_smc_fan_control(hwmgr);
289
290 return 0;
291 }
292
293
vega12_start_thermal_controller(struct pp_hwmgr * hwmgr,struct PP_TemperatureRange * range)294 int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
295 struct PP_TemperatureRange *range)
296 {
297 int ret = 0;
298
299 if (range == NULL)
300 return -EINVAL;
301
302 ret = vega12_thermal_set_temperature_range(hwmgr, range);
303 if (ret)
304 return -EINVAL;
305
306 vega12_thermal_enable_alert(hwmgr);
307 /* We should restrict performance levels to low before we halt the SMC.
308 * On the other hand we are still in boot state when we do this
309 * so it would be pointless.
310 * If this assumption changes we have to revisit this table.
311 */
312 ret = vega12_thermal_setup_fan_table(hwmgr);
313 if (ret)
314 return -EINVAL;
315
316 vega12_thermal_start_smc_fan_control(hwmgr);
317
318 return 0;
319 };
320