1 /*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <sys/rman.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
47
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51 #include <dev/uart/uart_ppstypes.h>
52
53 #include "uart_if.h"
54
55 devclass_t uart_devclass;
56 const char uart_driver_name[] = "uart";
57
58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
59 SLIST_HEAD_INITIALIZER(uart_sysdevs);
60
61 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
62
63 #ifndef UART_POLL_FREQ
64 #define UART_POLL_FREQ 50
65 #endif
66 static int uart_poll_freq = UART_POLL_FREQ;
67 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
68 0, "UART poll frequency");
69
70 static int uart_force_poll;
71 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
72 0, "Force UART polling");
73
74 static inline int
uart_pps_mode_valid(int pps_mode)75 uart_pps_mode_valid(int pps_mode)
76 {
77 int opt;
78
79 switch(pps_mode & UART_PPS_SIGNAL_MASK) {
80 case UART_PPS_DISABLED:
81 case UART_PPS_CTS:
82 case UART_PPS_DCD:
83 break;
84 default:
85 return (false);
86 }
87
88 opt = pps_mode & UART_PPS_OPTION_MASK;
89 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
90 return (false);
91
92 return (true);
93 }
94
95 static void
uart_pps_print_mode(struct uart_softc * sc)96 uart_pps_print_mode(struct uart_softc *sc)
97 {
98
99 device_printf(sc->sc_dev, "PPS capture mode: ");
100 switch(sc->sc_pps_mode) {
101 case UART_PPS_DISABLED:
102 printf("disabled");
103 case UART_PPS_CTS:
104 printf("CTS");
105 case UART_PPS_DCD:
106 printf("DCD");
107 default:
108 printf("invalid");
109 }
110 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
111 printf("-Inverted");
112 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
113 printf("-NarrowPulse");
114 printf("\n");
115 }
116
117 static int
uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)118 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
119 {
120 struct uart_softc *sc;
121 int err, tmp;
122
123 sc = arg1;
124 tmp = sc->sc_pps_mode;
125 err = sysctl_handle_int(oidp, &tmp, 0, req);
126 if (err != 0 || req->newptr == NULL)
127 return (err);
128 if (!uart_pps_mode_valid(tmp))
129 return (EINVAL);
130 sc->sc_pps_mode = tmp;
131 return(0);
132 }
133
134 static void
uart_pps_process(struct uart_softc * sc,int ser_sig)135 uart_pps_process(struct uart_softc *sc, int ser_sig)
136 {
137 sbintime_t now;
138 int is_assert, pps_sig;
139
140 /* Which signal is configured as PPS? Early out if none. */
141 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
142 case UART_PPS_CTS:
143 pps_sig = SER_CTS;
144 break;
145 case UART_PPS_DCD:
146 pps_sig = SER_DCD;
147 break;
148 default:
149 return;
150 }
151
152 /* Early out if there is no change in the signal configured as PPS. */
153 if ((ser_sig & SER_DELTA(pps_sig)) == 0)
154 return;
155
156 /*
157 * In narrow-pulse mode we need to synthesize both capture and clear
158 * events from a single "delta occurred" indication from the uart
159 * hardware because the pulse width is too narrow to reliably detect
160 * both edges. However, when the pulse width is close to our interrupt
161 * processing latency we might intermittantly catch both edges. To
162 * guard against generating spurious events when that happens, we use a
163 * separate timer to ensure at least half a second elapses before we
164 * generate another event.
165 */
166 pps_capture(&sc->sc_pps);
167 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
168 now = getsbinuptime();
169 if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
170 sc->sc_pps_captime = now;
171 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
172 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
173 }
174 } else {
175 is_assert = ser_sig & pps_sig;
176 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
177 is_assert = !is_assert;
178 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
179 PPS_CAPTURECLEAR);
180 }
181 }
182
183 static void
uart_pps_init(struct uart_softc * sc)184 uart_pps_init(struct uart_softc *sc)
185 {
186 struct sysctl_ctx_list *ctx;
187 struct sysctl_oid *tree;
188
189 ctx = device_get_sysctl_ctx(sc->sc_dev);
190 tree = device_get_sysctl_tree(sc->sc_dev);
191
192 /*
193 * The historical default for pps capture mode is either DCD or CTS,
194 * depending on the UART_PPS_ON_CTS kernel option. Start with that,
195 * then try to fetch the tunable that overrides the mode for all uart
196 * devices, then try to fetch the sysctl-tunable that overrides the mode
197 * for one specific device.
198 */
199 #ifdef UART_PPS_ON_CTS
200 sc->sc_pps_mode = UART_PPS_CTS;
201 #else
202 sc->sc_pps_mode = UART_PPS_DCD;
203 #endif
204 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
205 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
206 CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I",
207 "pulse mode: 0/1/2=disabled/CTS/DCD; "
208 "add 0x10 to invert, 0x20 for narrow pulse");
209
210 if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
211 device_printf(sc->sc_dev,
212 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
213 sc->sc_pps_mode);
214 sc->sc_pps_mode = UART_PPS_DISABLED;
215 } else if (bootverbose) {
216 uart_pps_print_mode(sc);
217 }
218
219 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
220 sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
221 sc->sc_pps.driver_abi = PPS_ABI_VERSION;
222 pps_init_abi(&sc->sc_pps);
223 }
224
225 void
uart_add_sysdev(struct uart_devinfo * di)226 uart_add_sysdev(struct uart_devinfo *di)
227 {
228 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
229 }
230
231 const char *
uart_getname(struct uart_class * uc)232 uart_getname(struct uart_class *uc)
233 {
234 return ((uc != NULL) ? uc->name : NULL);
235 }
236
237 struct uart_ops *
uart_getops(struct uart_class * uc)238 uart_getops(struct uart_class *uc)
239 {
240 return ((uc != NULL) ? uc->uc_ops : NULL);
241 }
242
243 int
uart_getrange(struct uart_class * uc)244 uart_getrange(struct uart_class *uc)
245 {
246 return ((uc != NULL) ? uc->uc_range : 0);
247 }
248
249 u_int
uart_getregshift(struct uart_class * uc)250 uart_getregshift(struct uart_class *uc)
251 {
252 return ((uc != NULL) ? uc->uc_rshift : 0);
253 }
254
255 u_int
uart_getregiowidth(struct uart_class * uc)256 uart_getregiowidth(struct uart_class *uc)
257 {
258 return ((uc != NULL) ? uc->uc_riowidth : 0);
259 }
260
261 /*
262 * Schedule a soft interrupt. We do this on the 0 to !0 transition
263 * of the TTY pending interrupt status.
264 */
265 void
uart_sched_softih(struct uart_softc * sc,uint32_t ipend)266 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
267 {
268 uint32_t new, old;
269
270 do {
271 old = sc->sc_ttypend;
272 new = old | ipend;
273 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
274
275 if ((old & SER_INT_MASK) == 0)
276 swi_sched(sc->sc_softih, 0);
277 }
278
279 /*
280 * A break condition has been detected. We treat the break condition as
281 * a special case that should not happen during normal operation. When
282 * the break condition is to be passed to higher levels in the form of
283 * a NUL character, we really want the break to be in the right place in
284 * the input stream. The overhead to achieve that is not in relation to
285 * the exceptional nature of the break condition, so we permit ourselves
286 * to be sloppy.
287 */
288 static __inline int
uart_intr_break(void * arg)289 uart_intr_break(void *arg)
290 {
291 struct uart_softc *sc = arg;
292
293 #if defined(KDB)
294 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
295 if (kdb_break())
296 return (0);
297 }
298 #endif
299 if (sc->sc_opened)
300 uart_sched_softih(sc, SER_INT_BREAK);
301 return (0);
302 }
303
304 /*
305 * Handle a receiver overrun situation. We lost at least 1 byte in the
306 * input stream and it's our job to contain the situation. We grab as
307 * much of the data we can, but otherwise flush the receiver FIFO to
308 * create some breathing room. The net effect is that we avoid the
309 * overrun condition to happen for the next X characters, where X is
310 * related to the FIFO size at the cost of losing data right away.
311 * So, instead of having multiple overrun interrupts in close proximity
312 * to each other and possibly pessimizing UART interrupt latency for
313 * other UARTs in a multiport configuration, we create a longer segment
314 * of missing characters by freeing up the FIFO.
315 * Each overrun condition is marked in the input buffer by a token. The
316 * token represents the loss of at least one, but possible more bytes in
317 * the input stream.
318 */
319 static __inline int
uart_intr_overrun(void * arg)320 uart_intr_overrun(void *arg)
321 {
322 struct uart_softc *sc = arg;
323
324 if (sc->sc_opened) {
325 UART_RECEIVE(sc);
326 if (uart_rx_put(sc, UART_STAT_OVERRUN))
327 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
328 uart_sched_softih(sc, SER_INT_RXREADY);
329 }
330 sc->sc_rxoverruns++;
331 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
332 return (0);
333 }
334
335 /*
336 * Received data ready.
337 */
338 static __inline int
uart_intr_rxready(void * arg)339 uart_intr_rxready(void *arg)
340 {
341 struct uart_softc *sc = arg;
342 int rxp;
343
344 rxp = sc->sc_rxput;
345 UART_RECEIVE(sc);
346 #if defined(KDB)
347 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
348 while (rxp != sc->sc_rxput) {
349 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
350 if (rxp == sc->sc_rxbufsz)
351 rxp = 0;
352 }
353 }
354 #endif
355 if (sc->sc_opened)
356 uart_sched_softih(sc, SER_INT_RXREADY);
357 else
358 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
359 return (1);
360 }
361
362 /*
363 * Line or modem status change (OOB signalling).
364 * We pass the signals to the software interrupt handler for further
365 * processing. Note that we merge the delta bits, but set the state
366 * bits. This is to avoid losing state transitions due to having more
367 * than 1 hardware interrupt between software interrupts.
368 */
369 static __inline int
uart_intr_sigchg(void * arg)370 uart_intr_sigchg(void *arg)
371 {
372 struct uart_softc *sc = arg;
373 int new, old, sig;
374
375 sig = UART_GETSIG(sc);
376
377 /*
378 * Time pulse counting support, invoked whenever the PPS parameters are
379 * currently set to capture either edge of the signal.
380 */
381 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
382 uart_pps_process(sc, sig);
383 }
384
385 /*
386 * Keep track of signal changes, even when the device is not
387 * opened. This allows us to inform upper layers about a
388 * possible loss of DCD and thus the existence of a (possibly)
389 * different connection when we have DCD back, during the time
390 * that the device was closed.
391 */
392 do {
393 old = sc->sc_ttypend;
394 new = old & ~SER_MASK_STATE;
395 new |= sig & SER_INT_SIGMASK;
396 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
397
398 if (sc->sc_opened)
399 uart_sched_softih(sc, SER_INT_SIGCHG);
400 return (1);
401 }
402
403 /*
404 * The transmitter can accept more data.
405 */
406 static __inline int
uart_intr_txidle(void * arg)407 uart_intr_txidle(void *arg)
408 {
409 struct uart_softc *sc = arg;
410
411 if (sc->sc_txbusy) {
412 sc->sc_txbusy = 0;
413 uart_sched_softih(sc, SER_INT_TXIDLE);
414 }
415 return (0);
416 }
417
418 static int
uart_intr(void * arg)419 uart_intr(void *arg)
420 {
421 struct uart_softc *sc = arg;
422 int cnt, ipend, testintr;
423
424 if (sc->sc_leaving)
425 return (FILTER_STRAY);
426
427 cnt = 0;
428 testintr = sc->sc_testintr;
429 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
430 cnt++;
431 if (ipend & SER_INT_OVERRUN)
432 uart_intr_overrun(sc);
433 if (ipend & SER_INT_BREAK)
434 uart_intr_break(sc);
435 if (ipend & SER_INT_RXREADY)
436 uart_intr_rxready(sc);
437 if (ipend & SER_INT_SIGCHG)
438 uart_intr_sigchg(sc);
439 if (ipend & SER_INT_TXIDLE)
440 uart_intr_txidle(sc);
441 }
442
443 if (sc->sc_polled) {
444 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
445 (timeout_t *)uart_intr, sc);
446 }
447
448 return ((cnt == 0) ? FILTER_STRAY :
449 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
450 FILTER_HANDLED));
451 }
452
453 serdev_intr_t *
uart_bus_ihand(device_t dev,int ipend)454 uart_bus_ihand(device_t dev, int ipend)
455 {
456
457 switch (ipend) {
458 case SER_INT_BREAK:
459 return (uart_intr_break);
460 case SER_INT_OVERRUN:
461 return (uart_intr_overrun);
462 case SER_INT_RXREADY:
463 return (uart_intr_rxready);
464 case SER_INT_SIGCHG:
465 return (uart_intr_sigchg);
466 case SER_INT_TXIDLE:
467 return (uart_intr_txidle);
468 }
469 return (NULL);
470 }
471
472 int
uart_bus_ipend(device_t dev)473 uart_bus_ipend(device_t dev)
474 {
475 struct uart_softc *sc;
476
477 sc = device_get_softc(dev);
478 return (UART_IPEND(sc));
479 }
480
481 int
uart_bus_sysdev(device_t dev)482 uart_bus_sysdev(device_t dev)
483 {
484 struct uart_softc *sc;
485
486 sc = device_get_softc(dev);
487 return ((sc->sc_sysdev != NULL) ? 1 : 0);
488 }
489
490 int
uart_bus_probe(device_t dev,int regshft,int regiowidth,int rclk,int rid,int chan,int quirks)491 uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks)
492 {
493 struct uart_softc *sc;
494 struct uart_devinfo *sysdev;
495 int error;
496
497 sc = device_get_softc(dev);
498
499 /*
500 * All uart_class references are weak. Check that the needed
501 * class has been compiled-in. Fail if not.
502 */
503 if (sc->sc_class == NULL)
504 return (ENXIO);
505
506 /*
507 * Initialize the instance. Note that the instance (=softc) does
508 * not necessarily match the hardware specific softc. We can't do
509 * anything about it now, because we may not attach to the device.
510 * Hardware drivers cannot use any of the class specific fields
511 * while probing.
512 */
513 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
514 sc->sc_dev = dev;
515 if (device_get_desc(dev) == NULL)
516 device_set_desc(dev, uart_getname(sc->sc_class));
517
518 /*
519 * Allocate the register resource. We assume that all UARTs have
520 * a single register window in either I/O port space or memory
521 * mapped I/O space. Any UART that needs multiple windows will
522 * consequently not be supported by this driver as-is. We try I/O
523 * port space first because that's the common case.
524 */
525 sc->sc_rrid = rid;
526 sc->sc_rtype = SYS_RES_IOPORT;
527 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
528 RF_ACTIVE);
529 if (sc->sc_rres == NULL) {
530 sc->sc_rrid = rid;
531 sc->sc_rtype = SYS_RES_MEMORY;
532 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
533 &sc->sc_rrid, RF_ACTIVE);
534 if (sc->sc_rres == NULL)
535 return (ENXIO);
536 }
537
538 /*
539 * Fill in the bus access structure and compare this device with
540 * a possible console device and/or a debug port. We set the flags
541 * in the softc so that the hardware dependent probe can adjust
542 * accordingly. In general, you don't want to permanently disrupt
543 * console I/O.
544 */
545 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
546 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
547 sc->sc_bas.chan = chan;
548 sc->sc_bas.regshft = regshft;
549 sc->sc_bas.regiowidth = regiowidth;
550 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
551 sc->sc_bas.busy_detect = !!(quirks & UART_F_BUSY_DETECT);
552
553 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
554 if (chan == sysdev->bas.chan &&
555 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
556 /* XXX check if ops matches class. */
557 sc->sc_sysdev = sysdev;
558 sysdev->bas.rclk = sc->sc_bas.rclk;
559 }
560 }
561
562 error = UART_PROBE(sc);
563 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
564 return ((error) ? error : BUS_PROBE_DEFAULT);
565 }
566
567 int
uart_bus_attach(device_t dev)568 uart_bus_attach(device_t dev)
569 {
570 struct uart_softc *sc, *sc0;
571 const char *sep;
572 int error, filt;
573
574 /*
575 * The sc_class field defines the type of UART we're going to work
576 * with and thus the size of the softc. Replace the generic softc
577 * with one that matches the UART now that we're certain we handle
578 * the device.
579 */
580 sc0 = device_get_softc(dev);
581 if (sc0->sc_class->size > sizeof(*sc)) {
582 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
583 bcopy(sc0, sc, sizeof(*sc));
584 device_set_softc(dev, sc);
585 } else
586 sc = sc0;
587
588 /*
589 * Now that we know the softc for this device, connect the back
590 * pointer from the sysdev for this device, if any
591 */
592 if (sc->sc_sysdev != NULL)
593 sc->sc_sysdev->sc = sc;
594
595 /*
596 * Protect ourselves against interrupts while we're not completely
597 * finished attaching and initializing. We don't expect interrupts
598 * until after UART_ATTACH(), though.
599 */
600 sc->sc_leaving = 1;
601
602 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
603 if (sc->sc_hwmtx == NULL)
604 sc->sc_hwmtx = &sc->sc_hwmtx_s;
605
606 /*
607 * Re-allocate. We expect that the softc contains the information
608 * collected by uart_bus_probe() intact.
609 */
610 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
611 RF_ACTIVE);
612 if (sc->sc_rres == NULL) {
613 mtx_destroy(&sc->sc_hwmtx_s);
614 return (ENXIO);
615 }
616 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
617 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
618
619 /*
620 * Ensure there is room for at least three full FIFOs of data in the
621 * receive buffer (handles the case of low-level drivers with huge
622 * FIFOs), and also ensure that there is no less than the historical
623 * size of 384 bytes (handles the typical small-FIFO case).
624 */
625 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
626 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
627 M_UART, M_WAITOK);
628 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
629 M_UART, M_WAITOK);
630
631 error = UART_ATTACH(sc);
632 if (error)
633 goto fail;
634
635 if (sc->sc_hwiflow || sc->sc_hwoflow) {
636 sep = "";
637 device_print_prettyname(dev);
638 if (sc->sc_hwiflow) {
639 printf("%sRTS iflow", sep);
640 sep = ", ";
641 }
642 if (sc->sc_hwoflow) {
643 printf("%sCTS oflow", sep);
644 sep = ", ";
645 }
646 printf("\n");
647 }
648
649 if (sc->sc_sysdev != NULL) {
650 if (sc->sc_sysdev->baudrate == 0) {
651 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
652 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
653 sc->sc_sysdev->baudrate = -1;
654 }
655 switch (sc->sc_sysdev->type) {
656 case UART_DEV_CONSOLE:
657 device_printf(dev, "console");
658 break;
659 case UART_DEV_DBGPORT:
660 device_printf(dev, "debug port");
661 break;
662 case UART_DEV_KEYBOARD:
663 device_printf(dev, "keyboard");
664 break;
665 default:
666 device_printf(dev, "unknown system device");
667 break;
668 }
669 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
670 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
671 sc->sc_sysdev->stopbits);
672 }
673
674 sc->sc_leaving = 0;
675 sc->sc_testintr = 1;
676 filt = uart_intr(sc);
677 sc->sc_testintr = 0;
678
679 /*
680 * Don't use interrupts if we couldn't clear any pending interrupt
681 * conditions. We may have broken H/W and polling is probably the
682 * safest thing to do.
683 */
684 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
685 sc->sc_irid = 0;
686 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
687 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
688 }
689 if (sc->sc_ires != NULL) {
690 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
691 uart_intr, NULL, sc, &sc->sc_icookie);
692 sc->sc_fastintr = (error == 0) ? 1 : 0;
693
694 if (!sc->sc_fastintr)
695 error = bus_setup_intr(dev, sc->sc_ires,
696 INTR_TYPE_TTY | INTR_MPSAFE, NULL,
697 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
698
699 if (error) {
700 device_printf(dev, "could not activate interrupt\n");
701 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
702 sc->sc_ires);
703 sc->sc_ires = NULL;
704 }
705 }
706 if (sc->sc_ires == NULL) {
707 /* No interrupt resource. Force polled mode. */
708 sc->sc_polled = 1;
709 callout_init(&sc->sc_timer, 1);
710 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
711 (timeout_t *)uart_intr, sc);
712 }
713
714 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
715 sep = "";
716 device_print_prettyname(dev);
717 if (sc->sc_fastintr) {
718 printf("%sfast interrupt", sep);
719 sep = ", ";
720 }
721 if (sc->sc_polled) {
722 printf("%spolled mode (%dHz)", sep, uart_poll_freq);
723 sep = ", ";
724 }
725 printf("\n");
726 }
727
728 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
729 if ((error = sc->sc_sysdev->attach(sc)) != 0)
730 goto fail;
731 } else {
732 if ((error = uart_tty_attach(sc)) != 0)
733 goto fail;
734 uart_pps_init(sc);
735 }
736
737 if (sc->sc_sysdev != NULL)
738 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
739
740 if (sc->sc_rxfifosz > 1)
741 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
742 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
743 "rx_overruns", CTLFLAG_RD, &sc->sc_rxoverruns, 0,
744 "Receive overruns");
745
746 return (0);
747
748 fail:
749 free(sc->sc_txbuf, M_UART);
750 free(sc->sc_rxbuf, M_UART);
751
752 if (sc->sc_ires != NULL) {
753 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
754 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
755 sc->sc_ires);
756 }
757 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
758
759 mtx_destroy(&sc->sc_hwmtx_s);
760
761 return (error);
762 }
763
764 int
uart_bus_detach(device_t dev)765 uart_bus_detach(device_t dev)
766 {
767 struct uart_softc *sc;
768
769 sc = device_get_softc(dev);
770
771 sc->sc_leaving = 1;
772
773 if (sc->sc_sysdev != NULL)
774 sc->sc_sysdev->hwmtx = NULL;
775
776 UART_DETACH(sc);
777
778 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
779 (*sc->sc_sysdev->detach)(sc);
780 else
781 uart_tty_detach(sc);
782
783 free(sc->sc_txbuf, M_UART);
784 free(sc->sc_rxbuf, M_UART);
785
786 if (sc->sc_ires != NULL) {
787 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
788 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
789 sc->sc_ires);
790 }
791 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
792
793 mtx_destroy(&sc->sc_hwmtx_s);
794
795 if (sc->sc_class->size > sizeof(*sc)) {
796 device_set_softc(dev, NULL);
797 free(sc, M_UART);
798 } else
799 device_set_softc(dev, NULL);
800
801 return (0);
802 }
803
804 int
uart_bus_resume(device_t dev)805 uart_bus_resume(device_t dev)
806 {
807 struct uart_softc *sc;
808
809 sc = device_get_softc(dev);
810 return (UART_ATTACH(sc));
811 }
812
813 void
uart_grab(struct uart_devinfo * di)814 uart_grab(struct uart_devinfo *di)
815 {
816
817 if (di->sc)
818 UART_GRAB(di->sc);
819 }
820
821 void
uart_ungrab(struct uart_devinfo * di)822 uart_ungrab(struct uart_devinfo *di)
823 {
824
825 if (di->sc)
826 UART_UNGRAB(di->sc);
827 }
828