1 /*-
2  * Copyright (c) 2003 Marcel Moolenaar
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: stable/10/sys/dev/uart/uart_core.c 294229 2016-01-17 18:18:01Z ian $");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <sys/rman.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
47 
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51 #include <dev/uart/uart_ppstypes.h>
52 
53 #include "uart_if.h"
54 
55 devclass_t uart_devclass;
56 const char uart_driver_name[] = "uart";
57 
58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
59     SLIST_HEAD_INITIALIZER(uart_sysdevs);
60 
61 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
62 
63 #ifndef	UART_POLL_FREQ
64 #define	UART_POLL_FREQ		50
65 #endif
66 static int uart_poll_freq = UART_POLL_FREQ;
67 TUNABLE_INT("debug.uart_poll_freq", &uart_poll_freq);
68 
69 static inline int
uart_pps_mode_valid(int pps_mode)70 uart_pps_mode_valid(int pps_mode)
71 {
72 	int opt;
73 
74 	switch(pps_mode & UART_PPS_SIGNAL_MASK) {
75 	case UART_PPS_DISABLED:
76 	case UART_PPS_CTS:
77 	case UART_PPS_DCD:
78 		break;
79 	default:
80 		return (false);
81 	}
82 
83 	opt = pps_mode & UART_PPS_OPTION_MASK;
84 	if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
85 		return (false);
86 
87 	return (true);
88 }
89 
90 static void
uart_pps_print_mode(struct uart_softc * sc)91 uart_pps_print_mode(struct uart_softc *sc)
92 {
93 
94 	device_printf(sc->sc_dev, "PPS capture mode: ");
95 	switch(sc->sc_pps_mode) {
96 	case UART_PPS_DISABLED:
97 		printf("disabled");
98 	case UART_PPS_CTS:
99 		printf("CTS");
100 	case UART_PPS_DCD:
101 		printf("DCD");
102 	default:
103 		printf("invalid");
104 	}
105 	if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
106 		printf("-Inverted");
107 	if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
108 		printf("-NarrowPulse");
109 	printf("\n");
110 }
111 
112 static int
uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)113 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
114 {
115 	struct uart_softc *sc;
116 	int err, tmp;
117 
118 	sc = arg1;
119 	tmp = sc->sc_pps_mode;
120 	err = sysctl_handle_int(oidp, &tmp, 0, req);
121 	if (err != 0 || req->newptr == NULL)
122 		return (err);
123 	if (!uart_pps_mode_valid(tmp))
124 		return (EINVAL);
125 	sc->sc_pps_mode = tmp;
126 	return(0);
127 }
128 
129 static void
uart_pps_process(struct uart_softc * sc,int ser_sig)130 uart_pps_process(struct uart_softc *sc, int ser_sig)
131 {
132 	sbintime_t now;
133 	int is_assert, pps_sig;
134 
135 	/* Which signal is configured as PPS?  Early out if none. */
136 	switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
137 	case UART_PPS_CTS:
138 		pps_sig = SER_CTS;
139 		break;
140 	case UART_PPS_DCD:
141 		pps_sig = SER_DCD;
142 		break;
143 	default:
144 		return;
145 	}
146 
147 	/* Early out if there is no change in the signal configured as PPS. */
148 	if ((ser_sig & SER_DELTA(pps_sig)) == 0)
149 		return;
150 
151 	/*
152 	 * In narrow-pulse mode we need to synthesize both capture and clear
153 	 * events from a single "delta occurred" indication from the uart
154 	 * hardware because the pulse width is too narrow to reliably detect
155 	 * both edges.  However, when the pulse width is close to our interrupt
156 	 * processing latency we might intermittantly catch both edges.  To
157 	 * guard against generating spurious events when that happens, we use a
158 	 * separate timer to ensure at least half a second elapses before we
159 	 * generate another event.
160 	 */
161 	pps_capture(&sc->sc_pps);
162 	if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
163 		now = getsbinuptime();
164 		if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
165 			sc->sc_pps_captime = now;
166 			pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
167 			pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
168 		}
169 	} else  {
170 		is_assert = ser_sig & pps_sig;
171 		if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
172 			is_assert = !is_assert;
173 		pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
174 		    PPS_CAPTURECLEAR);
175 	}
176 }
177 
178 static void
uart_pps_init(struct uart_softc * sc)179 uart_pps_init(struct uart_softc *sc)
180 {
181 	struct sysctl_ctx_list *ctx;
182 	struct sysctl_oid *tree;
183 
184 	ctx = device_get_sysctl_ctx(sc->sc_dev);
185 	tree = device_get_sysctl_tree(sc->sc_dev);
186 
187 	/*
188 	 * The historical default for pps capture mode is either DCD or CTS,
189 	 * depending on the UART_PPS_ON_CTS kernel option.  Start with that,
190 	 * then try to fetch the tunable that overrides the mode for all uart
191 	 * devices, then try to fetch the sysctl-tunable that overrides the mode
192 	 * for one specific device.
193 	 */
194 #ifdef UART_PPS_ON_CTS
195 	sc->sc_pps_mode = UART_PPS_CTS;
196 #else
197 	sc->sc_pps_mode = UART_PPS_DCD;
198 #endif
199 	TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
200 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
201 	    CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I",
202 	    "pulse mode: 0/1/2=disabled/CTS/DCD; "
203 	    "add 0x10 to invert, 0x20 for narrow pulse");
204 
205 	if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
206 		device_printf(sc->sc_dev,
207 		    "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
208 		    sc->sc_pps_mode);
209 		sc->sc_pps_mode = UART_PPS_DISABLED;
210 	} else if (bootverbose) {
211 		uart_pps_print_mode(sc);
212 	}
213 
214 	sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
215 	sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
216 	sc->sc_pps.driver_abi = PPS_ABI_VERSION;
217 	pps_init_abi(&sc->sc_pps);
218 }
219 
220 void
uart_add_sysdev(struct uart_devinfo * di)221 uart_add_sysdev(struct uart_devinfo *di)
222 {
223 	SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
224 }
225 
226 const char *
uart_getname(struct uart_class * uc)227 uart_getname(struct uart_class *uc)
228 {
229 	return ((uc != NULL) ? uc->name : NULL);
230 }
231 
232 struct uart_ops *
uart_getops(struct uart_class * uc)233 uart_getops(struct uart_class *uc)
234 {
235 	return ((uc != NULL) ? uc->uc_ops : NULL);
236 }
237 
238 int
uart_getrange(struct uart_class * uc)239 uart_getrange(struct uart_class *uc)
240 {
241 	return ((uc != NULL) ? uc->uc_range : 0);
242 }
243 
244 /*
245  * Schedule a soft interrupt. We do this on the 0 to !0 transition
246  * of the TTY pending interrupt status.
247  */
248 void
uart_sched_softih(struct uart_softc * sc,uint32_t ipend)249 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
250 {
251 	uint32_t new, old;
252 
253 	do {
254 		old = sc->sc_ttypend;
255 		new = old | ipend;
256 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
257 
258 	if ((old & SER_INT_MASK) == 0)
259 		swi_sched(sc->sc_softih, 0);
260 }
261 
262 /*
263  * A break condition has been detected. We treat the break condition as
264  * a special case that should not happen during normal operation. When
265  * the break condition is to be passed to higher levels in the form of
266  * a NUL character, we really want the break to be in the right place in
267  * the input stream. The overhead to achieve that is not in relation to
268  * the exceptional nature of the break condition, so we permit ourselves
269  * to be sloppy.
270  */
271 static __inline int
uart_intr_break(void * arg)272 uart_intr_break(void *arg)
273 {
274 	struct uart_softc *sc = arg;
275 
276 #if defined(KDB)
277 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
278 		if (kdb_break())
279 			return (0);
280 	}
281 #endif
282 	if (sc->sc_opened)
283 		uart_sched_softih(sc, SER_INT_BREAK);
284 	return (0);
285 }
286 
287 /*
288  * Handle a receiver overrun situation. We lost at least 1 byte in the
289  * input stream and it's our job to contain the situation. We grab as
290  * much of the data we can, but otherwise flush the receiver FIFO to
291  * create some breathing room. The net effect is that we avoid the
292  * overrun condition to happen for the next X characters, where X is
293  * related to the FIFO size at the cost of losing data right away.
294  * So, instead of having multiple overrun interrupts in close proximity
295  * to each other and possibly pessimizing UART interrupt latency for
296  * other UARTs in a multiport configuration, we create a longer segment
297  * of missing characters by freeing up the FIFO.
298  * Each overrun condition is marked in the input buffer by a token. The
299  * token represents the loss of at least one, but possible more bytes in
300  * the input stream.
301  */
302 static __inline int
uart_intr_overrun(void * arg)303 uart_intr_overrun(void *arg)
304 {
305 	struct uart_softc *sc = arg;
306 
307 	if (sc->sc_opened) {
308 		UART_RECEIVE(sc);
309 		if (uart_rx_put(sc, UART_STAT_OVERRUN))
310 			sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
311 		uart_sched_softih(sc, SER_INT_RXREADY);
312 	}
313 	UART_FLUSH(sc, UART_FLUSH_RECEIVER);
314 	return (0);
315 }
316 
317 /*
318  * Received data ready.
319  */
320 static __inline int
uart_intr_rxready(void * arg)321 uart_intr_rxready(void *arg)
322 {
323 	struct uart_softc *sc = arg;
324 	int rxp;
325 
326 	rxp = sc->sc_rxput;
327 	UART_RECEIVE(sc);
328 #if defined(KDB)
329 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
330 		while (rxp != sc->sc_rxput) {
331 			kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
332 			if (rxp == sc->sc_rxbufsz)
333 				rxp = 0;
334 		}
335 	}
336 #endif
337 	if (sc->sc_opened)
338 		uart_sched_softih(sc, SER_INT_RXREADY);
339 	else
340 		sc->sc_rxput = sc->sc_rxget;	/* Ignore received data. */
341 	return (1);
342 }
343 
344 /*
345  * Line or modem status change (OOB signalling).
346  * We pass the signals to the software interrupt handler for further
347  * processing. Note that we merge the delta bits, but set the state
348  * bits. This is to avoid losing state transitions due to having more
349  * than 1 hardware interrupt between software interrupts.
350  */
351 static __inline int
uart_intr_sigchg(void * arg)352 uart_intr_sigchg(void *arg)
353 {
354 	struct uart_softc *sc = arg;
355 	int new, old, sig;
356 
357 	sig = UART_GETSIG(sc);
358 
359 	/*
360 	 * Time pulse counting support, invoked whenever the PPS parameters are
361 	 * currently set to capture either edge of the signal.
362 	 */
363 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
364 		uart_pps_process(sc, sig);
365 	}
366 
367 	/*
368 	 * Keep track of signal changes, even when the device is not
369 	 * opened. This allows us to inform upper layers about a
370 	 * possible loss of DCD and thus the existence of a (possibly)
371 	 * different connection when we have DCD back, during the time
372 	 * that the device was closed.
373 	 */
374 	do {
375 		old = sc->sc_ttypend;
376 		new = old & ~SER_MASK_STATE;
377 		new |= sig & SER_INT_SIGMASK;
378 	} while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
379 
380 	if (sc->sc_opened)
381 		uart_sched_softih(sc, SER_INT_SIGCHG);
382 	return (1);
383 }
384 
385 /*
386  * The transmitter can accept more data.
387  */
388 static __inline int
uart_intr_txidle(void * arg)389 uart_intr_txidle(void *arg)
390 {
391 	struct uart_softc *sc = arg;
392 
393 	if (sc->sc_txbusy) {
394 		sc->sc_txbusy = 0;
395 		uart_sched_softih(sc, SER_INT_TXIDLE);
396 	}
397 	return (0);
398 }
399 
400 static int
uart_intr(void * arg)401 uart_intr(void *arg)
402 {
403 	struct uart_softc *sc = arg;
404 	int cnt, ipend, testintr;
405 
406 	if (sc->sc_leaving)
407 		return (FILTER_STRAY);
408 
409 	cnt = 0;
410 	testintr = sc->sc_testintr;
411 	while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
412 		cnt++;
413 		if (ipend & SER_INT_OVERRUN)
414 			uart_intr_overrun(sc);
415 		if (ipend & SER_INT_BREAK)
416 			uart_intr_break(sc);
417 		if (ipend & SER_INT_RXREADY)
418 			uart_intr_rxready(sc);
419 		if (ipend & SER_INT_SIGCHG)
420 			uart_intr_sigchg(sc);
421 		if (ipend & SER_INT_TXIDLE)
422 			uart_intr_txidle(sc);
423 	}
424 
425 	if (sc->sc_polled) {
426 		callout_reset(&sc->sc_timer, hz / uart_poll_freq,
427 		    (timeout_t *)uart_intr, sc);
428 	}
429 
430 	return ((cnt == 0) ? FILTER_STRAY :
431 	    ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
432 	    FILTER_HANDLED));
433 }
434 
435 serdev_intr_t *
uart_bus_ihand(device_t dev,int ipend)436 uart_bus_ihand(device_t dev, int ipend)
437 {
438 
439 	switch (ipend) {
440 	case SER_INT_BREAK:
441 		return (uart_intr_break);
442 	case SER_INT_OVERRUN:
443 		return (uart_intr_overrun);
444 	case SER_INT_RXREADY:
445 		return (uart_intr_rxready);
446 	case SER_INT_SIGCHG:
447 		return (uart_intr_sigchg);
448 	case SER_INT_TXIDLE:
449 		return (uart_intr_txidle);
450 	}
451 	return (NULL);
452 }
453 
454 int
uart_bus_ipend(device_t dev)455 uart_bus_ipend(device_t dev)
456 {
457 	struct uart_softc *sc;
458 
459 	sc = device_get_softc(dev);
460 	return (UART_IPEND(sc));
461 }
462 
463 int
uart_bus_sysdev(device_t dev)464 uart_bus_sysdev(device_t dev)
465 {
466 	struct uart_softc *sc;
467 
468 	sc = device_get_softc(dev);
469 	return ((sc->sc_sysdev != NULL) ? 1 : 0);
470 }
471 
472 int
uart_bus_probe(device_t dev,int regshft,int rclk,int rid,int chan)473 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
474 {
475 	struct uart_softc *sc;
476 	struct uart_devinfo *sysdev;
477 	int error;
478 
479 	sc = device_get_softc(dev);
480 
481 	/*
482 	 * All uart_class references are weak. Check that the needed
483 	 * class has been compiled-in. Fail if not.
484 	 */
485 	if (sc->sc_class == NULL)
486 		return (ENXIO);
487 
488 	/*
489 	 * Initialize the instance. Note that the instance (=softc) does
490 	 * not necessarily match the hardware specific softc. We can't do
491 	 * anything about it now, because we may not attach to the device.
492 	 * Hardware drivers cannot use any of the class specific fields
493 	 * while probing.
494 	 */
495 	kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
496 	sc->sc_dev = dev;
497 	if (device_get_desc(dev) == NULL)
498 		device_set_desc(dev, uart_getname(sc->sc_class));
499 
500 	/*
501 	 * Allocate the register resource. We assume that all UARTs have
502 	 * a single register window in either I/O port space or memory
503 	 * mapped I/O space. Any UART that needs multiple windows will
504 	 * consequently not be supported by this driver as-is. We try I/O
505 	 * port space first because that's the common case.
506 	 */
507 	sc->sc_rrid = rid;
508 	sc->sc_rtype = SYS_RES_IOPORT;
509 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
510 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
511 	if (sc->sc_rres == NULL) {
512 		sc->sc_rrid = rid;
513 		sc->sc_rtype = SYS_RES_MEMORY;
514 		sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype,
515 		    &sc->sc_rrid, 0, ~0, uart_getrange(sc->sc_class),
516 		    RF_ACTIVE);
517 		if (sc->sc_rres == NULL)
518 			return (ENXIO);
519 	}
520 
521 	/*
522 	 * Fill in the bus access structure and compare this device with
523 	 * a possible console device and/or a debug port. We set the flags
524 	 * in the softc so that the hardware dependent probe can adjust
525 	 * accordingly. In general, you don't want to permanently disrupt
526 	 * console I/O.
527 	 */
528 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
529 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
530 	sc->sc_bas.chan = chan;
531 	sc->sc_bas.regshft = regshft;
532 	sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
533 
534 	SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
535 		if (chan == sysdev->bas.chan &&
536 		    uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
537 			/* XXX check if ops matches class. */
538 			sc->sc_sysdev = sysdev;
539 			sysdev->bas.rclk = sc->sc_bas.rclk;
540 		}
541 	}
542 
543 	error = UART_PROBE(sc);
544 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
545 	return ((error) ? error : BUS_PROBE_DEFAULT);
546 }
547 
548 int
uart_bus_attach(device_t dev)549 uart_bus_attach(device_t dev)
550 {
551 	struct uart_softc *sc, *sc0;
552 	const char *sep;
553 	int error, filt;
554 
555 	/*
556 	 * The sc_class field defines the type of UART we're going to work
557 	 * with and thus the size of the softc. Replace the generic softc
558 	 * with one that matches the UART now that we're certain we handle
559 	 * the device.
560 	 */
561 	sc0 = device_get_softc(dev);
562 	if (sc0->sc_class->size > sizeof(*sc)) {
563 		sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
564 		bcopy(sc0, sc, sizeof(*sc));
565 		device_set_softc(dev, sc);
566 	} else
567 		sc = sc0;
568 
569 	/*
570 	 * Now that we know the softc for this device, connect the back
571 	 * pointer from the sysdev for this device, if any
572 	 */
573 	if (sc->sc_sysdev != NULL)
574 		sc->sc_sysdev->sc = sc;
575 
576 	/*
577 	 * Protect ourselves against interrupts while we're not completely
578 	 * finished attaching and initializing. We don't expect interrupts
579 	 * until after UART_ATTACH(), though.
580 	 */
581 	sc->sc_leaving = 1;
582 
583 	mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
584 	if (sc->sc_hwmtx == NULL)
585 		sc->sc_hwmtx = &sc->sc_hwmtx_s;
586 
587 	/*
588 	 * Re-allocate. We expect that the softc contains the information
589 	 * collected by uart_bus_probe() intact.
590 	 */
591 	sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid,
592 	    0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
593 	if (sc->sc_rres == NULL) {
594 		mtx_destroy(&sc->sc_hwmtx_s);
595 		return (ENXIO);
596 	}
597 	sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
598 	sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
599 
600 	/*
601 	 * Ensure there is room for at least three full FIFOs of data in the
602 	 * receive buffer (handles the case of low-level drivers with huge
603 	 * FIFOs), and also ensure that there is no less than the historical
604 	 * size of 384 bytes (handles the typical small-FIFO case).
605 	 */
606 	sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
607 	sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
608 	    M_UART, M_WAITOK);
609 	sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
610 	    M_UART, M_WAITOK);
611 
612 	error = UART_ATTACH(sc);
613 	if (error)
614 		goto fail;
615 
616 	if (sc->sc_hwiflow || sc->sc_hwoflow) {
617 		sep = "";
618 		device_print_prettyname(dev);
619 		if (sc->sc_hwiflow) {
620 			printf("%sRTS iflow", sep);
621 			sep = ", ";
622 		}
623 		if (sc->sc_hwoflow) {
624 			printf("%sCTS oflow", sep);
625 			sep = ", ";
626 		}
627 		printf("\n");
628 	}
629 
630 	if (sc->sc_sysdev != NULL) {
631 		if (sc->sc_sysdev->baudrate == 0) {
632 			if (UART_IOCTL(sc, UART_IOCTL_BAUD,
633 			    (intptr_t)&sc->sc_sysdev->baudrate) != 0)
634 				sc->sc_sysdev->baudrate = -1;
635 		}
636 		switch (sc->sc_sysdev->type) {
637 		case UART_DEV_CONSOLE:
638 			device_printf(dev, "console");
639 			break;
640 		case UART_DEV_DBGPORT:
641 			device_printf(dev, "debug port");
642 			break;
643 		case UART_DEV_KEYBOARD:
644 			device_printf(dev, "keyboard");
645 			break;
646 		default:
647 			device_printf(dev, "unknown system device");
648 			break;
649 		}
650 		printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
651 		    "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
652 		    sc->sc_sysdev->stopbits);
653 	}
654 
655 	sc->sc_leaving = 0;
656 	sc->sc_testintr = 1;
657 	filt = uart_intr(sc);
658 	sc->sc_testintr = 0;
659 
660 	/*
661 	 * Don't use interrupts if we couldn't clear any pending interrupt
662 	 * conditions. We may have broken H/W and polling is probably the
663 	 * safest thing to do.
664 	 */
665 	if (filt != FILTER_SCHEDULE_THREAD) {
666 		sc->sc_irid = 0;
667 		sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
668 		    &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
669 	}
670 	if (sc->sc_ires != NULL) {
671 		error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
672 		    uart_intr, NULL, sc, &sc->sc_icookie);
673 		sc->sc_fastintr = (error == 0) ? 1 : 0;
674 
675 		if (!sc->sc_fastintr)
676 			error = bus_setup_intr(dev, sc->sc_ires,
677 			    INTR_TYPE_TTY | INTR_MPSAFE, NULL,
678 			    (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
679 
680 		if (error) {
681 			device_printf(dev, "could not activate interrupt\n");
682 			bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
683 			    sc->sc_ires);
684 			sc->sc_ires = NULL;
685 		}
686 	}
687 	if (sc->sc_ires == NULL) {
688 		/* No interrupt resource. Force polled mode. */
689 		sc->sc_polled = 1;
690 		callout_init(&sc->sc_timer, 1);
691 	}
692 
693 	if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
694 		sep = "";
695 		device_print_prettyname(dev);
696 		if (sc->sc_fastintr) {
697 			printf("%sfast interrupt", sep);
698 			sep = ", ";
699 		}
700 		if (sc->sc_polled) {
701 			printf("%spolled mode (%dHz)", sep, uart_poll_freq);
702 			sep = ", ";
703 		}
704 		printf("\n");
705 	}
706 
707 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
708 		if ((error = sc->sc_sysdev->attach(sc)) != 0)
709 			goto fail;
710 	} else {
711 		if ((error = uart_tty_attach(sc)) != 0)
712 			goto fail;
713 		uart_pps_init(sc);
714 	}
715 
716 	if (sc->sc_sysdev != NULL)
717 		sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
718 
719 	return (0);
720 
721  fail:
722 	free(sc->sc_txbuf, M_UART);
723 	free(sc->sc_rxbuf, M_UART);
724 
725 	if (sc->sc_ires != NULL) {
726 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
727 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
728 		    sc->sc_ires);
729 	}
730 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
731 
732 	mtx_destroy(&sc->sc_hwmtx_s);
733 
734 	return (error);
735 }
736 
737 int
uart_bus_detach(device_t dev)738 uart_bus_detach(device_t dev)
739 {
740 	struct uart_softc *sc;
741 
742 	sc = device_get_softc(dev);
743 
744 	sc->sc_leaving = 1;
745 
746 	if (sc->sc_sysdev != NULL)
747 		sc->sc_sysdev->hwmtx = NULL;
748 
749 	UART_DETACH(sc);
750 
751 	if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
752 		(*sc->sc_sysdev->detach)(sc);
753 	else
754 		uart_tty_detach(sc);
755 
756 	free(sc->sc_txbuf, M_UART);
757 	free(sc->sc_rxbuf, M_UART);
758 
759 	if (sc->sc_ires != NULL) {
760 		bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
761 		bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
762 		    sc->sc_ires);
763 	}
764 	bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
765 
766 	mtx_destroy(&sc->sc_hwmtx_s);
767 
768 	if (sc->sc_class->size > sizeof(*sc)) {
769 		device_set_softc(dev, NULL);
770 		free(sc, M_UART);
771 	} else
772 		device_set_softc(dev, NULL);
773 
774 	return (0);
775 }
776 
777 int
uart_bus_resume(device_t dev)778 uart_bus_resume(device_t dev)
779 {
780 	struct uart_softc *sc;
781 
782 	sc = device_get_softc(dev);
783 	return (UART_ATTACH(sc));
784 }
785 
786 void
uart_grab(struct uart_devinfo * di)787 uart_grab(struct uart_devinfo *di)
788 {
789 
790 	if (di->sc)
791 		UART_GRAB(di->sc);
792 }
793 
794 void
uart_ungrab(struct uart_devinfo * di)795 uart_ungrab(struct uart_devinfo *di)
796 {
797 
798 	if (di->sc)
799 		UART_UNGRAB(di->sc);
800 }
801