1 /*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <sys/rman.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
47
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51
52 #include "uart_if.h"
53
54 devclass_t uart_devclass;
55 const char uart_driver_name[] = "uart";
56
57 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
58 SLIST_HEAD_INITIALIZER(uart_sysdevs);
59
60 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
61
62 #ifndef UART_POLL_FREQ
63 #define UART_POLL_FREQ 50
64 #endif
65 static int uart_poll_freq = UART_POLL_FREQ;
66 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
67 0, "UART poll frequency");
68
69 static int uart_force_poll;
70 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
71 0, "Force UART polling");
72
73 #define PPS_MODE_DISABLED 0
74 #define PPS_MODE_CTS 1
75 #define PPS_MODE_DCD 2
76
77 static inline int
uart_pps_signal(int pps_mode)78 uart_pps_signal(int pps_mode)
79 {
80
81 switch(pps_mode) {
82 case PPS_MODE_CTS:
83 return (SER_CTS);
84 case PPS_MODE_DCD:
85 return (SER_DCD);
86 }
87 return (0);
88 }
89 static inline int
uart_pps_mode_valid(int pps_mode)90 uart_pps_mode_valid(int pps_mode)
91 {
92
93 switch(pps_mode) {
94 case PPS_MODE_DISABLED:
95 case PPS_MODE_CTS:
96 case PPS_MODE_DCD:
97 return (true);
98 }
99 return (false);
100 }
101
102 static const char *
uart_pps_mode_name(int pps_mode)103 uart_pps_mode_name(int pps_mode)
104 {
105 switch(pps_mode) {
106 case PPS_MODE_DISABLED:
107 return ("disabled");
108 case PPS_MODE_CTS:
109 return ("CTS");
110 case PPS_MODE_DCD:
111 return ("DCD");
112 }
113 return ("invalid");
114 }
115
116 static int
uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)117 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
118 {
119 struct uart_softc *sc;
120 int err, tmp;
121
122 sc = arg1;
123 tmp = sc->sc_pps_mode;
124 err = sysctl_handle_int(oidp, &tmp, 0, req);
125 if (err != 0 || req->newptr == NULL)
126 return (err);
127 if (!uart_pps_mode_valid(tmp))
128 return (EINVAL);
129 sc->sc_pps_mode = tmp;
130 return(0);
131 }
132
133 static void
uart_pps_init(struct uart_softc * sc)134 uart_pps_init(struct uart_softc *sc)
135 {
136 struct sysctl_ctx_list *ctx;
137 struct sysctl_oid *tree;
138
139 ctx = device_get_sysctl_ctx(sc->sc_dev);
140 tree = device_get_sysctl_tree(sc->sc_dev);
141
142 /*
143 * The historical default for pps capture mode is either DCD or CTS,
144 * depending on the UART_PPS_ON_CTS kernel option. Start with that,
145 * then try to fetch the tunable that overrides the mode for all uart
146 * devices, then try to fetch the sysctl-tunable that overrides the mode
147 * for one specific device.
148 */
149 #ifdef UART_PPS_ON_CTS
150 sc->sc_pps_mode = PPS_MODE_CTS;
151 #else
152 sc->sc_pps_mode = PPS_MODE_DCD;
153 #endif
154 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
155 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
156 CTLTYPE_INT | CTLFLAG_RWTUN, sc, 0, uart_pps_mode_sysctl, "I",
157 "pulse capturing mode - 0/1/2 - disabled/CTS/DCD");
158
159 if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
160 device_printf(sc->sc_dev,
161 "Invalid pps_mode %d configured; disabling PPS capture\n",
162 sc->sc_pps_mode);
163 sc->sc_pps_mode = PPS_MODE_DISABLED;
164 } else if (bootverbose) {
165 device_printf(sc->sc_dev, "PPS capture mode %d (%s)\n",
166 sc->sc_pps_mode, uart_pps_mode_name(sc->sc_pps_mode));
167 }
168
169 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
170 sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
171 sc->sc_pps.driver_abi = PPS_ABI_VERSION;
172 pps_init_abi(&sc->sc_pps);
173 }
174
175 void
uart_add_sysdev(struct uart_devinfo * di)176 uart_add_sysdev(struct uart_devinfo *di)
177 {
178 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
179 }
180
181 const char *
uart_getname(struct uart_class * uc)182 uart_getname(struct uart_class *uc)
183 {
184 return ((uc != NULL) ? uc->name : NULL);
185 }
186
187 struct uart_ops *
uart_getops(struct uart_class * uc)188 uart_getops(struct uart_class *uc)
189 {
190 return ((uc != NULL) ? uc->uc_ops : NULL);
191 }
192
193 int
uart_getrange(struct uart_class * uc)194 uart_getrange(struct uart_class *uc)
195 {
196 return ((uc != NULL) ? uc->uc_range : 0);
197 }
198
199 u_int
uart_getregshift(struct uart_class * uc)200 uart_getregshift(struct uart_class *uc)
201 {
202 return ((uc != NULL) ? uc->uc_rshift : 0);
203 }
204
205 /*
206 * Schedule a soft interrupt. We do this on the 0 to !0 transition
207 * of the TTY pending interrupt status.
208 */
209 void
uart_sched_softih(struct uart_softc * sc,uint32_t ipend)210 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
211 {
212 uint32_t new, old;
213
214 do {
215 old = sc->sc_ttypend;
216 new = old | ipend;
217 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
218
219 if ((old & SER_INT_MASK) == 0)
220 swi_sched(sc->sc_softih, 0);
221 }
222
223 /*
224 * A break condition has been detected. We treat the break condition as
225 * a special case that should not happen during normal operation. When
226 * the break condition is to be passed to higher levels in the form of
227 * a NUL character, we really want the break to be in the right place in
228 * the input stream. The overhead to achieve that is not in relation to
229 * the exceptional nature of the break condition, so we permit ourselves
230 * to be sloppy.
231 */
232 static __inline int
uart_intr_break(void * arg)233 uart_intr_break(void *arg)
234 {
235 struct uart_softc *sc = arg;
236
237 #if defined(KDB)
238 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
239 if (kdb_break())
240 return (0);
241 }
242 #endif
243 if (sc->sc_opened)
244 uart_sched_softih(sc, SER_INT_BREAK);
245 return (0);
246 }
247
248 /*
249 * Handle a receiver overrun situation. We lost at least 1 byte in the
250 * input stream and it's our job to contain the situation. We grab as
251 * much of the data we can, but otherwise flush the receiver FIFO to
252 * create some breathing room. The net effect is that we avoid the
253 * overrun condition to happen for the next X characters, where X is
254 * related to the FIFO size at the cost of losing data right away.
255 * So, instead of having multiple overrun interrupts in close proximity
256 * to each other and possibly pessimizing UART interrupt latency for
257 * other UARTs in a multiport configuration, we create a longer segment
258 * of missing characters by freeing up the FIFO.
259 * Each overrun condition is marked in the input buffer by a token. The
260 * token represents the loss of at least one, but possible more bytes in
261 * the input stream.
262 */
263 static __inline int
uart_intr_overrun(void * arg)264 uart_intr_overrun(void *arg)
265 {
266 struct uart_softc *sc = arg;
267
268 if (sc->sc_opened) {
269 UART_RECEIVE(sc);
270 if (uart_rx_put(sc, UART_STAT_OVERRUN))
271 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
272 uart_sched_softih(sc, SER_INT_RXREADY);
273 }
274 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
275 return (0);
276 }
277
278 /*
279 * Received data ready.
280 */
281 static __inline int
uart_intr_rxready(void * arg)282 uart_intr_rxready(void *arg)
283 {
284 struct uart_softc *sc = arg;
285 int rxp;
286
287 rxp = sc->sc_rxput;
288 UART_RECEIVE(sc);
289 #if defined(KDB)
290 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
291 while (rxp != sc->sc_rxput) {
292 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
293 if (rxp == sc->sc_rxbufsz)
294 rxp = 0;
295 }
296 }
297 #endif
298 if (sc->sc_opened)
299 uart_sched_softih(sc, SER_INT_RXREADY);
300 else
301 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
302 return (1);
303 }
304
305 /*
306 * Line or modem status change (OOB signalling).
307 * We pass the signals to the software interrupt handler for further
308 * processing. Note that we merge the delta bits, but set the state
309 * bits. This is to avoid losing state transitions due to having more
310 * than 1 hardware interrupt between software interrupts.
311 */
312 static __inline int
uart_intr_sigchg(void * arg)313 uart_intr_sigchg(void *arg)
314 {
315 struct uart_softc *sc = arg;
316 int new, old, pps_sig, sig;
317
318 sig = UART_GETSIG(sc);
319
320 /*
321 * Time pulse counting support. Note that both CTS and DCD are
322 * active-low signals. The status bit is high to indicate that
323 * the signal on the line is low, which corresponds to a PPS
324 * clear event.
325 */
326 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
327 pps_sig = uart_pps_signal(sc->sc_pps_mode);
328 if (sig & SER_DELTA(pps_sig)) {
329 pps_capture(&sc->sc_pps);
330 pps_event(&sc->sc_pps, (sig & pps_sig) ?
331 PPS_CAPTURECLEAR : PPS_CAPTUREASSERT);
332 }
333 }
334
335 /*
336 * Keep track of signal changes, even when the device is not
337 * opened. This allows us to inform upper layers about a
338 * possible loss of DCD and thus the existence of a (possibly)
339 * different connection when we have DCD back, during the time
340 * that the device was closed.
341 */
342 do {
343 old = sc->sc_ttypend;
344 new = old & ~SER_MASK_STATE;
345 new |= sig & SER_INT_SIGMASK;
346 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
347
348 if (sc->sc_opened)
349 uart_sched_softih(sc, SER_INT_SIGCHG);
350 return (1);
351 }
352
353 /*
354 * The transmitter can accept more data.
355 */
356 static __inline int
uart_intr_txidle(void * arg)357 uart_intr_txidle(void *arg)
358 {
359 struct uart_softc *sc = arg;
360
361 if (sc->sc_txbusy) {
362 sc->sc_txbusy = 0;
363 uart_sched_softih(sc, SER_INT_TXIDLE);
364 }
365 return (0);
366 }
367
368 static int
uart_intr(void * arg)369 uart_intr(void *arg)
370 {
371 struct uart_softc *sc = arg;
372 int cnt, ipend, testintr;
373
374 if (sc->sc_leaving)
375 return (FILTER_STRAY);
376
377 cnt = 0;
378 testintr = sc->sc_testintr;
379 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
380 cnt++;
381 if (ipend & SER_INT_OVERRUN)
382 uart_intr_overrun(sc);
383 if (ipend & SER_INT_BREAK)
384 uart_intr_break(sc);
385 if (ipend & SER_INT_RXREADY)
386 uart_intr_rxready(sc);
387 if (ipend & SER_INT_SIGCHG)
388 uart_intr_sigchg(sc);
389 if (ipend & SER_INT_TXIDLE)
390 uart_intr_txidle(sc);
391 }
392
393 if (sc->sc_polled) {
394 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
395 (timeout_t *)uart_intr, sc);
396 }
397
398 return ((cnt == 0) ? FILTER_STRAY :
399 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
400 FILTER_HANDLED));
401 }
402
403 serdev_intr_t *
uart_bus_ihand(device_t dev,int ipend)404 uart_bus_ihand(device_t dev, int ipend)
405 {
406
407 switch (ipend) {
408 case SER_INT_BREAK:
409 return (uart_intr_break);
410 case SER_INT_OVERRUN:
411 return (uart_intr_overrun);
412 case SER_INT_RXREADY:
413 return (uart_intr_rxready);
414 case SER_INT_SIGCHG:
415 return (uart_intr_sigchg);
416 case SER_INT_TXIDLE:
417 return (uart_intr_txidle);
418 }
419 return (NULL);
420 }
421
422 int
uart_bus_ipend(device_t dev)423 uart_bus_ipend(device_t dev)
424 {
425 struct uart_softc *sc;
426
427 sc = device_get_softc(dev);
428 return (UART_IPEND(sc));
429 }
430
431 int
uart_bus_sysdev(device_t dev)432 uart_bus_sysdev(device_t dev)
433 {
434 struct uart_softc *sc;
435
436 sc = device_get_softc(dev);
437 return ((sc->sc_sysdev != NULL) ? 1 : 0);
438 }
439
440 int
uart_bus_probe(device_t dev,int regshft,int rclk,int rid,int chan)441 uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan)
442 {
443 struct uart_softc *sc;
444 struct uart_devinfo *sysdev;
445 int error;
446
447 sc = device_get_softc(dev);
448
449 /*
450 * All uart_class references are weak. Check that the needed
451 * class has been compiled-in. Fail if not.
452 */
453 if (sc->sc_class == NULL)
454 return (ENXIO);
455
456 /*
457 * Initialize the instance. Note that the instance (=softc) does
458 * not necessarily match the hardware specific softc. We can't do
459 * anything about it now, because we may not attach to the device.
460 * Hardware drivers cannot use any of the class specific fields
461 * while probing.
462 */
463 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
464 sc->sc_dev = dev;
465 if (device_get_desc(dev) == NULL)
466 device_set_desc(dev, uart_getname(sc->sc_class));
467
468 /*
469 * Allocate the register resource. We assume that all UARTs have
470 * a single register window in either I/O port space or memory
471 * mapped I/O space. Any UART that needs multiple windows will
472 * consequently not be supported by this driver as-is. We try I/O
473 * port space first because that's the common case.
474 */
475 sc->sc_rrid = rid;
476 sc->sc_rtype = SYS_RES_IOPORT;
477 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
478 RF_ACTIVE);
479 if (sc->sc_rres == NULL) {
480 sc->sc_rrid = rid;
481 sc->sc_rtype = SYS_RES_MEMORY;
482 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
483 &sc->sc_rrid, RF_ACTIVE);
484 if (sc->sc_rres == NULL)
485 return (ENXIO);
486 }
487
488 /*
489 * Fill in the bus access structure and compare this device with
490 * a possible console device and/or a debug port. We set the flags
491 * in the softc so that the hardware dependent probe can adjust
492 * accordingly. In general, you don't want to permanently disrupt
493 * console I/O.
494 */
495 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
496 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
497 sc->sc_bas.chan = chan;
498 sc->sc_bas.regshft = regshft;
499 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
500
501 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
502 if (chan == sysdev->bas.chan &&
503 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
504 /* XXX check if ops matches class. */
505 sc->sc_sysdev = sysdev;
506 sysdev->bas.rclk = sc->sc_bas.rclk;
507 }
508 }
509
510 error = UART_PROBE(sc);
511 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
512 return ((error) ? error : BUS_PROBE_DEFAULT);
513 }
514
515 int
uart_bus_attach(device_t dev)516 uart_bus_attach(device_t dev)
517 {
518 struct uart_softc *sc, *sc0;
519 const char *sep;
520 int error, filt;
521
522 /*
523 * The sc_class field defines the type of UART we're going to work
524 * with and thus the size of the softc. Replace the generic softc
525 * with one that matches the UART now that we're certain we handle
526 * the device.
527 */
528 sc0 = device_get_softc(dev);
529 if (sc0->sc_class->size > sizeof(*sc)) {
530 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
531 bcopy(sc0, sc, sizeof(*sc));
532 device_set_softc(dev, sc);
533 } else
534 sc = sc0;
535
536 /*
537 * Now that we know the softc for this device, connect the back
538 * pointer from the sysdev for this device, if any
539 */
540 if (sc->sc_sysdev != NULL)
541 sc->sc_sysdev->sc = sc;
542
543 /*
544 * Protect ourselves against interrupts while we're not completely
545 * finished attaching and initializing. We don't expect interrupts
546 * until after UART_ATTACH(), though.
547 */
548 sc->sc_leaving = 1;
549
550 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
551 if (sc->sc_hwmtx == NULL)
552 sc->sc_hwmtx = &sc->sc_hwmtx_s;
553
554 /*
555 * Re-allocate. We expect that the softc contains the information
556 * collected by uart_bus_probe() intact.
557 */
558 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
559 RF_ACTIVE);
560 if (sc->sc_rres == NULL) {
561 mtx_destroy(&sc->sc_hwmtx_s);
562 return (ENXIO);
563 }
564 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
565 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
566
567 /*
568 * Ensure there is room for at least three full FIFOs of data in the
569 * receive buffer (handles the case of low-level drivers with huge
570 * FIFOs), and also ensure that there is no less than the historical
571 * size of 384 bytes (handles the typical small-FIFO case).
572 */
573 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
574 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
575 M_UART, M_WAITOK);
576 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
577 M_UART, M_WAITOK);
578
579 error = UART_ATTACH(sc);
580 if (error)
581 goto fail;
582
583 if (sc->sc_hwiflow || sc->sc_hwoflow) {
584 sep = "";
585 device_print_prettyname(dev);
586 if (sc->sc_hwiflow) {
587 printf("%sRTS iflow", sep);
588 sep = ", ";
589 }
590 if (sc->sc_hwoflow) {
591 printf("%sCTS oflow", sep);
592 sep = ", ";
593 }
594 printf("\n");
595 }
596
597 if (sc->sc_sysdev != NULL) {
598 if (sc->sc_sysdev->baudrate == 0) {
599 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
600 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
601 sc->sc_sysdev->baudrate = -1;
602 }
603 switch (sc->sc_sysdev->type) {
604 case UART_DEV_CONSOLE:
605 device_printf(dev, "console");
606 break;
607 case UART_DEV_DBGPORT:
608 device_printf(dev, "debug port");
609 break;
610 case UART_DEV_KEYBOARD:
611 device_printf(dev, "keyboard");
612 break;
613 default:
614 device_printf(dev, "unknown system device");
615 break;
616 }
617 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
618 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
619 sc->sc_sysdev->stopbits);
620 }
621
622 sc->sc_leaving = 0;
623 sc->sc_testintr = 1;
624 filt = uart_intr(sc);
625 sc->sc_testintr = 0;
626
627 /*
628 * Don't use interrupts if we couldn't clear any pending interrupt
629 * conditions. We may have broken H/W and polling is probably the
630 * safest thing to do.
631 */
632 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
633 sc->sc_irid = 0;
634 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
635 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
636 }
637 if (sc->sc_ires != NULL) {
638 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
639 uart_intr, NULL, sc, &sc->sc_icookie);
640 sc->sc_fastintr = (error == 0) ? 1 : 0;
641
642 if (!sc->sc_fastintr)
643 error = bus_setup_intr(dev, sc->sc_ires,
644 INTR_TYPE_TTY | INTR_MPSAFE, NULL,
645 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
646
647 if (error) {
648 device_printf(dev, "could not activate interrupt\n");
649 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
650 sc->sc_ires);
651 sc->sc_ires = NULL;
652 }
653 }
654 if (sc->sc_ires == NULL) {
655 /* No interrupt resource. Force polled mode. */
656 sc->sc_polled = 1;
657 callout_init(&sc->sc_timer, 1);
658 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
659 (timeout_t *)uart_intr, sc);
660 }
661
662 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
663 sep = "";
664 device_print_prettyname(dev);
665 if (sc->sc_fastintr) {
666 printf("%sfast interrupt", sep);
667 sep = ", ";
668 }
669 if (sc->sc_polled) {
670 printf("%spolled mode (%dHz)", sep, uart_poll_freq);
671 sep = ", ";
672 }
673 printf("\n");
674 }
675
676 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
677 if ((error = sc->sc_sysdev->attach(sc)) != 0)
678 goto fail;
679 } else {
680 if ((error = uart_tty_attach(sc)) != 0)
681 goto fail;
682 uart_pps_init(sc);
683 }
684
685 if (sc->sc_sysdev != NULL)
686 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
687
688 return (0);
689
690 fail:
691 free(sc->sc_txbuf, M_UART);
692 free(sc->sc_rxbuf, M_UART);
693
694 if (sc->sc_ires != NULL) {
695 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
696 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
697 sc->sc_ires);
698 }
699 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
700
701 mtx_destroy(&sc->sc_hwmtx_s);
702
703 return (error);
704 }
705
706 int
uart_bus_detach(device_t dev)707 uart_bus_detach(device_t dev)
708 {
709 struct uart_softc *sc;
710
711 sc = device_get_softc(dev);
712
713 sc->sc_leaving = 1;
714
715 if (sc->sc_sysdev != NULL)
716 sc->sc_sysdev->hwmtx = NULL;
717
718 UART_DETACH(sc);
719
720 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
721 (*sc->sc_sysdev->detach)(sc);
722 else
723 uart_tty_detach(sc);
724
725 free(sc->sc_txbuf, M_UART);
726 free(sc->sc_rxbuf, M_UART);
727
728 if (sc->sc_ires != NULL) {
729 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
730 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
731 sc->sc_ires);
732 }
733 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
734
735 mtx_destroy(&sc->sc_hwmtx_s);
736
737 if (sc->sc_class->size > sizeof(*sc)) {
738 device_set_softc(dev, NULL);
739 free(sc, M_UART);
740 } else
741 device_set_softc(dev, NULL);
742
743 return (0);
744 }
745
746 int
uart_bus_resume(device_t dev)747 uart_bus_resume(device_t dev)
748 {
749 struct uart_softc *sc;
750
751 sc = device_get_softc(dev);
752 return (UART_ATTACH(sc));
753 }
754
755 void
uart_grab(struct uart_devinfo * di)756 uart_grab(struct uart_devinfo *di)
757 {
758
759 if (di->sc)
760 UART_GRAB(di->sc);
761 }
762
763 void
uart_ungrab(struct uart_devinfo * di)764 uart_ungrab(struct uart_devinfo *di)
765 {
766
767 if (di->sc)
768 UART_UNGRAB(di->sc);
769 }
770