1 /*-
2  * Copyright (c) 1996, Javier Mart^mn Rueda (jmrueda@diatel.upm.es)
3  * All rights reserved.
4  *
5  * Copyright (c) 2000 Matthew N. Dodd
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  *	$FreeBSD: stable/10/sys/dev/ex/if_exvar.h 182088 2008-08-24 00:22:42Z imp $
30  */
31 
32 struct ex_softc {
33   	struct ifnet	*ifp;
34 	struct ifmedia	ifmedia;
35 	u_char		enaddr[6];
36 
37 	device_t	dev;
38 	struct resource *ioport;
39 	int		ioport_rid;
40 	struct resource *irq;
41 	int		irq_rid;
42 	void *		ih;
43 
44 	u_short		irq_no;		/* IRQ number. */
45 
46 	char *		irq2ee;		/* irq <-> internal		*/
47 	u_char *	ee2irq;		/* representation conversion	*/
48 
49 	u_int		mem_size;	/* Total memory size, in bytes. */
50 	u_int		rx_mem_size;	/* Rx memory size (by default,	*/
51 					/* first 3/4 of total memory).	*/
52 
53 	u_int		rx_lower_limit;	/* Lower and upper limits of	*/
54 	u_int		rx_upper_limit;	/* receive buffer.		*/
55 
56 	u_int		rx_head;	/* Head of receive ring buffer. */
57 	u_int		tx_mem_size;	/* Tx memory size (by default,	*/
58 					/* last quarter of total memory).*/
59 
60 	u_int		tx_lower_limit;	/* Lower and upper limits of	*/
61 	u_int		tx_upper_limit;	/* transmit buffer.		*/
62 
63 	u_int		tx_head;	/* Head and tail of 		*/
64 	u_int		tx_tail;	/* transmit ring buffer.	*/
65 
66 	u_int		tx_last;	/* Pointer to beginning of last	*/
67 					/* frame in the chain.		*/
68 	struct mtx	lock;
69 	struct callout	timer;
70 	int		tx_timeout;
71 	int		flags;
72 #define	HAS_INT_NO_REG	1
73 };
74 
75 extern devclass_t ex_devclass;
76 
77 extern char	irq2eemap[];
78 extern u_char	ee2irqmap[];
79 extern char	plus_irq2eemap[];
80 extern u_char	plus_ee2irqmap[];
81 
82 int		ex_alloc_resources(device_t);
83 void		ex_release_resources(device_t);
84 int		ex_attach(device_t);
85 int		ex_detach(device_t);
86 
87 driver_intr_t	ex_intr;
88 
89 u_int16_t	ex_eeprom_read(struct ex_softc *, int);
90 void		ex_get_address(struct ex_softc *, u_char *);
91 int		ex_card_type(u_char *);
92 
93 void		ex_stop(struct ex_softc *);
94 
95 #define CSR_READ_1(sc, off) (bus_read_1((sc)->ioport, off))
96 #define CSR_READ_2(sc, off) (bus_read_2((sc)->ioport, off))
97 #define CSR_WRITE_1(sc, off, val) \
98 	bus_write_1((sc)->ioport, off, val)
99 #define CSR_WRITE_2(sc, off, val) \
100 	bus_write_2((sc)->ioport, off, val)
101 #define CSR_WRITE_MULTI_1(sc, off, addr, count) \
102 	bus_write_multi_1((sc)->ioport, off, addr, count)
103 #define CSR_WRITE_MULTI_2(sc, off, addr, count) \
104 	bus_write_multi_2((sc)->ioport, off, addr, count)
105 #define CSR_WRITE_MULTI_4(sc, off, addr, count) \
106 	bus_write_multi_4((sc)->ioport, off, addr, count)
107 #define CSR_READ_MULTI_1(sc, off, addr, count) \
108 	bus_read_multi_1((sc)->ioport, off, addr, count)
109 #define CSR_READ_MULTI_2(sc, off, addr, count) \
110 	bus_read_multi_2((sc)->ioport, off, addr, count)
111 #define CSR_READ_MULTI_4(sc, off, addr, count) \
112 	bus_read_multi_4((sc)->ioport, off, addr, count)
113 
114 #define	EX_LOCK(sc)		mtx_lock(&(sc)->lock)
115 #define	EX_UNLOCK(sc)		mtx_unlock(&(sc)->lock)
116 #define	EX_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->lock, MA_OWNED)
117