1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2001 Jake Burkholder.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: stable/12/sys/sparc64/sparc64/tlb.c 326262 2017-11-27 15:10:39Z pfg $");
31 
32 #include "opt_pmap.h"
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/ktr.h>
37 #include <sys/pcpu.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/smp.h>
41 #include <sys/sysctl.h>
42 
43 #include <vm/vm.h>
44 #include <vm/pmap.h>
45 
46 #include <machine/smp.h>
47 #include <machine/tlb.h>
48 #include <machine/vmparam.h>
49 
50 PMAP_STATS_VAR(tlb_ncontext_demap);
51 PMAP_STATS_VAR(tlb_npage_demap);
52 PMAP_STATS_VAR(tlb_nrange_demap);
53 
54 tlb_flush_nonlocked_t *tlb_flush_nonlocked;
55 tlb_flush_user_t *tlb_flush_user;
56 
57 /*
58  * Some tlb operations must be atomic, so no interrupt or trap can be allowed
59  * while they are in progress. Traps should not happen, but interrupts need to
60  * be explicitely disabled. critical_enter() cannot be used here, since it only
61  * disables soft interrupts.
62  */
63 
64 void
tlb_context_demap(struct pmap * pm)65 tlb_context_demap(struct pmap *pm)
66 {
67 	void *cookie;
68 	register_t s;
69 
70 	/*
71 	 * It is important that we are not interrupted or preempted while
72 	 * doing the IPIs. The interrupted CPU may hold locks, and since
73 	 * it will wait for the CPU that sent the IPI, this can lead
74 	 * to a deadlock when an interrupt comes in on that CPU and it's
75 	 * handler tries to grab one of that locks. This will only happen for
76 	 * spin locks, but these IPI types are delivered even if normal
77 	 * interrupts are disabled, so the lock critical section will not
78 	 * protect the target processor from entering the IPI handler with
79 	 * the lock held.
80 	 */
81 	PMAP_STATS_INC(tlb_ncontext_demap);
82 	cookie = ipi_tlb_context_demap(pm);
83 	s = intr_disable();
84 	if (CPU_ISSET(PCPU_GET(cpuid), &pm->pm_active)) {
85 		KASSERT(pm->pm_context[curcpu] != -1,
86 		    ("tlb_context_demap: inactive pmap?"));
87 		stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0);
88 		stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0);
89 		flush(KERNBASE);
90 	}
91 	intr_restore(s);
92 	ipi_wait(cookie);
93 }
94 
95 void
tlb_page_demap(struct pmap * pm,vm_offset_t va)96 tlb_page_demap(struct pmap *pm, vm_offset_t va)
97 {
98 	u_long flags;
99 	void *cookie;
100 	register_t s;
101 
102 	PMAP_STATS_INC(tlb_npage_demap);
103 	cookie = ipi_tlb_page_demap(pm, va);
104 	s = intr_disable();
105 	if (CPU_ISSET(PCPU_GET(cpuid), &pm->pm_active)) {
106 		KASSERT(pm->pm_context[curcpu] != -1,
107 		    ("tlb_page_demap: inactive pmap?"));
108 		if (pm == kernel_pmap)
109 			flags = TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE;
110 		else
111 			flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
112 
113 		stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
114 		stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
115 		flush(KERNBASE);
116 	}
117 	intr_restore(s);
118 	ipi_wait(cookie);
119 }
120 
121 void
tlb_range_demap(struct pmap * pm,vm_offset_t start,vm_offset_t end)122 tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
123 {
124 	vm_offset_t va;
125 	void *cookie;
126 	u_long flags;
127 	register_t s;
128 
129 	PMAP_STATS_INC(tlb_nrange_demap);
130 	cookie = ipi_tlb_range_demap(pm, start, end);
131 	s = intr_disable();
132 	if (CPU_ISSET(PCPU_GET(cpuid), &pm->pm_active)) {
133 		KASSERT(pm->pm_context[curcpu] != -1,
134 		    ("tlb_range_demap: inactive pmap?"));
135 		if (pm == kernel_pmap)
136 			flags = TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE;
137 		else
138 			flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
139 
140 		for (va = start; va < end; va += PAGE_SIZE) {
141 			stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
142 			stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
143 			flush(KERNBASE);
144 		}
145 	}
146 	intr_restore(s);
147 	ipi_wait(cookie);
148 }
149