1 /* $NetBSD $ */
2 /* $OpenBSD: sti_sgc.c,v 1.14 2007/05/26 00:36:03 krw Exp $ */
3
4 /*
5 * Copyright (c) 2005, Miodrag Vallat
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29 /*-
30 * Copyright (c) 2020, 2025 Izumi Tsutsui. All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
42 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
43 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
44 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
47 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
48 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
49 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
50 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 */
52
53 #include <sys/cdefs.h>
54 __KERNEL_RCSID(0, "$NetBSD: sti_machdep.c,v 1.1 2025/05/01 06:11:21 tsutsui Exp $");
55
56 #include <sys/param.h>
57 #include <sys/device.h>
58 #include <sys/bus.h>
59
60 #include <dev/wscons/wsconsio.h>
61
62 #include <hp300/dev/sgcvar.h>
63 #include <hp300/dev/sti_machdep.h>
64
65 /*
66 * 425e EVRX specific hardware
67 */
68 /*
69 * EVRX RAMDAC (Bt458) is found at offset 0x060000 from SGC bus PA and
70 * offset 0x040000 length 0x1c0000 is mapped in MI sti via ROM region 2
71 */
72 #define STI_EVRX_REGNO2OFFSET 0x020000
73 #define STI_EVRX_FBOFFSET 0x200000
74
75 #define EVRX_BT458_ADDR (STI_EVRX_REGNO2OFFSET + 0x200 + 2)
76 #define EVRX_BT458_CMAP (STI_EVRX_REGNO2OFFSET + 0x204 + 2)
77 #define EVRX_BT458_CTRL (STI_EVRX_REGNO2OFFSET + 0x208 + 2)
78 #define EVRX_BT458_OMAP (STI_EVRX_REGNO2OFFSET + 0x20C + 2)
79
80 /* from HP-UX /usr/lib/libddevrx.a */
81 #define EVRX_MAGIC00 (STI_EVRX_REGNO2OFFSET + 0x600)
82 #define EVRX_MAGIC04 (STI_EVRX_REGNO2OFFSET + 0x604)
83 #define EVRX_MAGIC08 (STI_EVRX_REGNO2OFFSET + 0x608)
84 #define EVRX_MAGIC0C (STI_EVRX_REGNO2OFFSET + 0x60c)
85 #define EVRX_MAGIC10 (STI_EVRX_REGNO2OFFSET + 0x610)
86 #define EVRX_MAGIC10_BSY 0x00010000
87 #define EVRX_MAGIC18 (STI_EVRX_REGNO2OFFSET + 0x618)
88 #define EVRX_MAGIC1C (STI_EVRX_REGNO2OFFSET + 0x61c)
89
90 /*
91 * HP A1659A CRX specific hardware
92 */
93 #define STI_CRX_FBOFFSET 0x01000000
94
95 /* 425e EVRX/CRX specific access functions */
96 static int sti_evrx_putcmap(struct sti_screen *, u_int, u_int);
97 static void sti_evrx_resetramdac(struct sti_screen *);
98 static void sti_evrx_resetcmap(struct sti_screen *);
99 static void sti_evrx_setupfb(struct sti_screen *);
100 static paddr_t sti_m68k_mmap(void *, void *, off_t, int);
101
102 static struct bus_space_tag sticn_tag;
103 static struct sti_rom sticn_rom;
104 static struct sti_screen sticn_scr;
105 static bus_addr_t sticn_bases[STI_REGION_MAX];
106
107 static const struct wsdisplay_accessops sti_m68k_accessops = {
108 sti_ioctl,
109 sti_m68k_mmap,
110 sti_alloc_screen,
111 sti_free_screen,
112 sti_show_screen,
113 sti_load_font
114 };
115
116 void
sti_machdep_attach_console(struct sti_machdep_softc * sc)117 sti_machdep_attach_console(struct sti_machdep_softc *sc)
118 {
119 struct sti_softc *ssc = &sc->sc_sti;
120
121 ssc->sc_flags |= STI_CONSOLE | STI_ATTACHED;
122 ssc->sc_rom = &sticn_rom;
123 ssc->sc_rom->rom_softc = ssc;
124 ssc->sc_scr = &sticn_scr;
125 ssc->sc_scr->scr_rom = ssc->sc_rom;
126 memcpy(ssc->bases, sticn_bases, sizeof(ssc->bases));
127
128 sti_describe(ssc);
129 }
130
131 void
sti_machdep_attach(struct sti_machdep_softc * sc)132 sti_machdep_attach(struct sti_machdep_softc *sc)
133 {
134 struct sti_softc *ssc = &sc->sc_sti;
135 struct sti_screen *scr;
136 paddr_t base = sc->sc_base;
137 struct wsemuldisplaydev_attach_args waa;
138 struct sti_dd *rom_dd;
139 uint32_t grid0;
140
141 /* Identify the board model by dd_grid */
142 rom_dd = &ssc->sc_rom->rom_dd;
143 grid0 = rom_dd->dd_grid[0];
144 scr = ssc->sc_scr;
145
146 switch (grid0) {
147 case STI_DD_EVRX:
148 /*
149 * 425e on-board EVRX framebuffer.
150 * bitmap memory can be accessed at offset +0x200000.
151 */
152 sc->sc_bitmap = base + STI_EVRX_FBOFFSET;
153
154 aprint_normal_dev(ssc->sc_dev, "Enable mmap support\n");
155
156 /*
157 * initialize Bt458 RAMDAC and preserve initial color map
158 */
159 sti_evrx_resetramdac(scr);
160 sti_evrx_resetcmap(scr);
161
162 scr->setupfb = sti_evrx_setupfb;
163 scr->putcmap = sti_evrx_putcmap;
164
165 scr->scr_wsmode = WSDISPLAYIO_MODE_EMUL;
166 waa.console = ssc->sc_flags & STI_CONSOLE ? 1 : 0;
167 waa.scrdata = &scr->scr_screenlist;
168 waa.accessops = &sti_m68k_accessops;
169 waa.accesscookie = scr;
170
171 config_found(ssc->sc_dev, &waa, wsemuldisplaydevprint,
172 CFARGS_NONE);
173 break;
174
175 case STI_DD_CRX:
176 /*
177 * HP A1659A CRX on some 425t variants.
178 * bitmap memory can be accessed at offset +0x1000000.
179 */
180 sc->sc_bitmap = base + STI_CRX_FBOFFSET;
181
182 aprint_normal_dev(ssc->sc_dev, "Enable mmap support\n");
183
184 scr->scr_wsmode = WSDISPLAYIO_MODE_EMUL;
185 waa.console = ssc->sc_flags & STI_CONSOLE ? 1 : 0;
186 waa.scrdata = &scr->scr_screenlist;
187 waa.accessops = &sti_m68k_accessops;
188 waa.accesscookie = scr;
189
190 config_found(ssc->sc_dev, &waa, wsemuldisplaydevprint,
191 CFARGS_NONE);
192 break;
193 default:
194 /*
195 * Unsupported variants.
196 * Use default common sti(4) attachment (no bitmap support).
197 */
198 sti_end_attach(ssc);
199 break;
200 }
201 }
202
203 static int
sti_evrx_putcmap(struct sti_screen * scr,u_int index,u_int count)204 sti_evrx_putcmap(struct sti_screen *scr, u_int index, u_int count)
205 {
206 struct sti_rom *rom = scr->scr_rom;
207 bus_space_tag_t bst = rom->memt;
208 bus_space_handle_t bsh = rom->regh[2];
209 int i;
210
211 /* magic setup from HP-UX */
212 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001);
213 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001);
214 for (i = index; i < index + count; i++) {
215 /* this is what HP-UX woodDownloadCmap() does */
216 while ((bus_space_read_4(bst, bsh, EVRX_MAGIC10) &
217 EVRX_MAGIC10_BSY) != 0)
218 continue;
219 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, i);
220 bus_space_write_1(bst, bsh, EVRX_BT458_CMAP, scr->scr_rcmap[i]);
221 bus_space_write_1(bst, bsh, EVRX_BT458_CMAP, scr->scr_gcmap[i]);
222 bus_space_write_4(bst, bsh, EVRX_MAGIC10, scr->scr_bcmap[i]);
223 }
224 return 0;
225 }
226
227 static void
sti_evrx_resetramdac(struct sti_screen * scr)228 sti_evrx_resetramdac(struct sti_screen *scr)
229 {
230 struct sti_rom *rom = scr->scr_rom;
231 bus_space_tag_t bst = rom->memt;
232 bus_space_handle_t bsh = rom->regh[2];
233 #if 0
234 int i;
235 #endif
236
237 /*
238 * Initialize the Bt458. When we write to control registers,
239 * the address is not incremented automatically. So we specify
240 * it ourselves for each control register.
241 */
242
243 /* all planes will be read */
244 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x04);
245 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0xff);
246
247 /* all planes have non-blink */
248 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x05);
249 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x00);
250
251 /* palette enabled, ovly plane disabled */
252 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x06);
253 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x40);
254
255 /* no test mode */
256 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x07);
257 bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x00);
258
259 /* magic initialization from HP-UX woodInitializeHardware() */
260 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001);
261 bus_space_write_4(bst, bsh, EVRX_MAGIC04, 0x00000001);
262 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001);
263 bus_space_write_4(bst, bsh, EVRX_MAGIC0C, 0x00000001);
264 bus_space_write_4(bst, bsh, EVRX_MAGIC18, 0xFFFFFFFF);
265 bus_space_write_4(bst, bsh, EVRX_MAGIC1C, 0x00000000);
266
267 #if 0
268 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x00);
269 for (i = 0; i < 4; i++) {
270 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00);
271 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00);
272 bus_space_write_1(bst, bsh, EVRX_BT458_OMAP, 0x00);
273 }
274 #endif
275 }
276
277 static void
sti_evrx_resetcmap(struct sti_screen * scr)278 sti_evrx_resetcmap(struct sti_screen *scr)
279 {
280 struct sti_rom *rom = scr->scr_rom;
281 bus_space_tag_t bst = rom->memt;
282 bus_space_handle_t bsh = rom->regh[2];
283 int i;
284
285 /* magic setup from HP-UX */
286 bus_space_write_4(bst, bsh, EVRX_MAGIC08, 0x00000001);
287 bus_space_write_4(bst, bsh, EVRX_MAGIC00, 0x00000001);
288
289 /* preserve palette values initialized by STI firmware */
290 for (i = 0; i < STI_NCMAP; i++) {
291 /* this is what HP-UX woodUploadCmap() does */
292 while ((bus_space_read_4(bst, bsh, EVRX_MAGIC10) &
293 EVRX_MAGIC10_BSY) != 0)
294 continue;
295 bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, i);
296 scr->scr_rcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT458_CMAP);
297 scr->scr_gcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT458_CMAP);
298 scr->scr_bcmap[i] = bus_space_read_1(bst, bsh, EVRX_BT458_CMAP);
299 }
300 }
301
302 static void
sti_evrx_setupfb(struct sti_screen * scr)303 sti_evrx_setupfb(struct sti_screen *scr)
304 {
305
306 sti_init(scr, 0);
307 sti_evrx_resetramdac(scr);
308 }
309
310 static paddr_t
sti_m68k_mmap(void * v,void * vs,off_t offset,int prot)311 sti_m68k_mmap(void *v, void *vs, off_t offset, int prot)
312 {
313 struct sti_screen *scr = (struct sti_screen *)v;
314 struct sti_rom *rom = scr->scr_rom;
315 struct sti_softc *ssc = rom->rom_softc;
316 struct sti_machdep_softc *sc = device_private(ssc->sc_dev);
317 paddr_t cookie = -1;
318
319 if ((offset & PAGE_MASK) != 0)
320 return -1;
321
322 switch (scr->scr_wsmode) {
323 case WSDISPLAYIO_MODE_MAPPED:
324 /* not implemented yet; what should be shown? */
325 break;
326 case WSDISPLAYIO_MODE_DUMBFB:
327 if (offset >= 0 && offset < (scr->fbwidth * scr->fbheight))
328 cookie = m68k_btop(sc->sc_bitmap + offset);
329 break;
330 default:
331 break;
332 }
333
334 return cookie;
335 }
336
337 void
sti_machdep_cnattach(bus_space_tag_t bst,paddr_t base)338 sti_machdep_cnattach(bus_space_tag_t bst, paddr_t base)
339 {
340 int i;
341
342 sticn_tag = *bst;
343
344 /* sticn_bases[0] will be fixed in sti_cnattach() */
345 for (i = 0; i < STI_REGION_MAX; i++)
346 sticn_bases[i] = (bus_addr_t)base;
347
348 sti_cnattach(&sticn_rom, &sticn_scr, &sticn_tag, sticn_bases,
349 STI_CODEBASE_ALT);
350 }
351