1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 */
40
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
43
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
47 #include "opt_cpu.h"
48 #include "opt_ddb.h"
49 #include "opt_inet.h"
50 #include "opt_ipx.h"
51 #include "opt_isa.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_perfmon.h"
56 #include "opt_platform.h"
57 #include "opt_sched.h"
58 #include "opt_kdtrace.h"
59
60 #include <sys/param.h>
61 #include <sys/proc.h>
62 #include <sys/systm.h>
63 #include <sys/bio.h>
64 #include <sys/buf.h>
65 #include <sys/bus.h>
66 #include <sys/callout.h>
67 #include <sys/cons.h>
68 #include <sys/cpu.h>
69 #include <sys/efi.h>
70 #include <sys/eventhandler.h>
71 #include <sys/exec.h>
72 #include <sys/imgact.h>
73 #include <sys/kdb.h>
74 #include <sys/kernel.h>
75 #include <sys/ktr.h>
76 #include <sys/linker.h>
77 #include <sys/lock.h>
78 #include <sys/malloc.h>
79 #include <sys/memrange.h>
80 #include <sys/msgbuf.h>
81 #include <sys/mutex.h>
82 #include <sys/pcpu.h>
83 #include <sys/ptrace.h>
84 #include <sys/reboot.h>
85 #include <sys/rwlock.h>
86 #include <sys/sched.h>
87 #include <sys/signalvar.h>
88 #ifdef SMP
89 #include <sys/smp.h>
90 #endif
91 #include <sys/syscallsubr.h>
92 #include <sys/sysctl.h>
93 #include <sys/sysent.h>
94 #include <sys/sysproto.h>
95 #include <sys/ucontext.h>
96 #include <sys/vmmeter.h>
97
98 #include <vm/vm.h>
99 #include <vm/vm_extern.h>
100 #include <vm/vm_kern.h>
101 #include <vm/vm_page.h>
102 #include <vm/vm_map.h>
103 #include <vm/vm_object.h>
104 #include <vm/vm_pager.h>
105 #include <vm/vm_param.h>
106
107 #ifdef DDB
108 #ifndef KDB
109 #error KDB must be enabled in order for DDB to work!
110 #endif
111 #include <ddb/ddb.h>
112 #include <ddb/db_sym.h>
113 #endif
114
115 #include <net/netisr.h>
116
117 #include <machine/clock.h>
118 #include <machine/cpu.h>
119 #include <machine/cputypes.h>
120 #include <machine/intr_machdep.h>
121 #include <x86/mca.h>
122 #include <machine/md_var.h>
123 #include <machine/metadata.h>
124 #include <machine/mp_watchdog.h>
125 #include <machine/pc/bios.h>
126 #include <machine/pcb.h>
127 #include <machine/proc.h>
128 #include <machine/reg.h>
129 #include <machine/sigframe.h>
130 #include <machine/specialreg.h>
131 #ifdef PERFMON
132 #include <machine/perfmon.h>
133 #endif
134 #include <machine/tss.h>
135 #ifdef SMP
136 #include <machine/smp.h>
137 #endif
138 #ifdef FDT
139 #include <x86/fdt.h>
140 #endif
141
142 #ifdef DEV_ATPIC
143 #include <x86/isa/icu.h>
144 #else
145 #include <machine/apicvar.h>
146 #endif
147
148 #include <isa/isareg.h>
149 #include <isa/rtc.h>
150
151 /* Sanity check for __curthread() */
152 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
153
154 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
155
156 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
157 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
158
159 static void cpu_startup(void *);
160 static void get_fpcontext(struct thread *td, mcontext_t *mcp,
161 char *xfpusave, size_t xfpusave_len);
162 static int set_fpcontext(struct thread *td, mcontext_t *mcp,
163 char *xfpustate, size_t xfpustate_len);
164 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
165
166 /*
167 * The file "conf/ldscript.amd64" defines the symbol "kernphys". Its value is
168 * the physical address at which the kernel is loaded.
169 */
170 extern char kernphys[];
171 #ifdef DDB
172 extern vm_offset_t ksym_start, ksym_end;
173 #endif
174
175 struct msgbuf *msgbufp;
176
177 /* Intel ICH registers */
178 #define ICH_PMBASE 0x400
179 #define ICH_SMI_EN ICH_PMBASE + 0x30
180
181 int _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
182
183 int cold = 1;
184
185 long Maxmem = 0;
186 long realmem = 0;
187
188 /*
189 * The number of PHYSMAP entries must be one less than the number of
190 * PHYSSEG entries because the PHYSMAP entry that spans the largest
191 * physical address that is accessible by ISA DMA is split into two
192 * PHYSSEG entries.
193 */
194 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
195
196 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
197 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
198
199 /* must be 2 less so 0 0 can signal end of chunks */
200 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
201 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
202
203 struct kva_md_info kmi;
204
205 static struct trapframe proc0_tf;
206 struct region_descriptor r_gdt, r_idt;
207
208 struct pcpu __pcpu[MAXCPU];
209
210 struct mtx icu_lock;
211
212 struct mem_range_softc mem_range_softc;
213
214 struct mtx dt_lock; /* lock for GDT and LDT */
215
216 void (*vmm_resume_p)(void);
217
218 static void
cpu_startup(dummy)219 cpu_startup(dummy)
220 void *dummy;
221 {
222 uintmax_t memsize;
223 char *sysenv;
224
225 /*
226 * On MacBooks, we need to disallow the legacy USB circuit to
227 * generate an SMI# because this can cause several problems,
228 * namely: incorrect CPU frequency detection and failure to
229 * start the APs.
230 * We do this by disabling a bit in the SMI_EN (SMI Control and
231 * Enable register) of the Intel ICH LPC Interface Bridge.
232 */
233 sysenv = getenv("smbios.system.product");
234 if (sysenv != NULL) {
235 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
236 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
237 strncmp(sysenv, "MacBook4,1", 10) == 0 ||
238 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
239 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
240 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
241 strncmp(sysenv, "MacBookPro4,1", 13) == 0 ||
242 strncmp(sysenv, "Macmini1,1", 10) == 0) {
243 if (bootverbose)
244 printf("Disabling LEGACY_USB_EN bit on "
245 "Intel ICH.\n");
246 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
247 }
248 freeenv(sysenv);
249 }
250
251 /*
252 * Good {morning,afternoon,evening,night}.
253 */
254 startrtclock();
255 printcpuinfo();
256 panicifcpuunsupported();
257 #ifdef PERFMON
258 perfmon_init();
259 #endif
260
261 /*
262 * Display physical memory if SMBIOS reports reasonable amount.
263 */
264 memsize = 0;
265 sysenv = getenv("smbios.memory.enabled");
266 if (sysenv != NULL) {
267 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
268 freeenv(sysenv);
269 }
270 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
271 memsize = ptoa((uintmax_t)Maxmem);
272 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
273 realmem = atop(memsize);
274
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 vm_paddr_t size;
284
285 size = phys_avail[indx + 1] - phys_avail[indx];
286 printf(
287 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
288 (uintmax_t)phys_avail[indx],
289 (uintmax_t)phys_avail[indx + 1] - 1,
290 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
291 }
292 }
293
294 vm_ksubmap_init(&kmi);
295
296 printf("avail memory = %ju (%ju MB)\n",
297 ptoa((uintmax_t)cnt.v_free_count),
298 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
299
300 /*
301 * Set up buffers, so they can be used to read disk labels.
302 */
303 bufinit();
304 vm_pager_bufferinit();
305
306 cpu_setregs();
307 }
308
309 /*
310 * Send an interrupt to process.
311 *
312 * Stack is set up to allow sigcode stored
313 * at top to call routine, followed by call
314 * to sigreturn routine below. After sigreturn
315 * resets the signal mask, the stack, and the
316 * frame pointer, it returns to the user
317 * specified pc, psl.
318 */
319 void
sendsig(sig_t catcher,ksiginfo_t * ksi,sigset_t * mask)320 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
321 {
322 struct sigframe sf, *sfp;
323 struct pcb *pcb;
324 struct proc *p;
325 struct thread *td;
326 struct sigacts *psp;
327 char *sp;
328 struct trapframe *regs;
329 char *xfpusave;
330 size_t xfpusave_len;
331 int sig;
332 int oonstack;
333
334 td = curthread;
335 pcb = td->td_pcb;
336 p = td->td_proc;
337 PROC_LOCK_ASSERT(p, MA_OWNED);
338 sig = ksi->ksi_signo;
339 psp = p->p_sigacts;
340 mtx_assert(&psp->ps_mtx, MA_OWNED);
341 regs = td->td_frame;
342 oonstack = sigonstack(regs->tf_rsp);
343
344 if (cpu_max_ext_state_size > sizeof(struct savefpu) && use_xsave) {
345 xfpusave_len = cpu_max_ext_state_size - sizeof(struct savefpu);
346 xfpusave = __builtin_alloca(xfpusave_len);
347 } else {
348 xfpusave_len = 0;
349 xfpusave = NULL;
350 }
351
352 /* Save user context. */
353 bzero(&sf, sizeof(sf));
354 sf.sf_uc.uc_sigmask = *mask;
355 sf.sf_uc.uc_stack = td->td_sigstk;
356 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
357 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
358 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
359 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
360 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
361 get_fpcontext(td, &sf.sf_uc.uc_mcontext, xfpusave, xfpusave_len);
362 fpstate_drop(td);
363 sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
364 sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
365 bzero(sf.sf_uc.uc_mcontext.mc_spare,
366 sizeof(sf.sf_uc.uc_mcontext.mc_spare));
367 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
368
369 /* Allocate space for the signal handler context. */
370 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
371 SIGISMEMBER(psp->ps_sigonstack, sig)) {
372 sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size;
373 #if defined(COMPAT_43)
374 td->td_sigstk.ss_flags |= SS_ONSTACK;
375 #endif
376 } else
377 sp = (char *)regs->tf_rsp - 128;
378 if (xfpusave != NULL) {
379 sp -= xfpusave_len;
380 sp = (char *)((unsigned long)sp & ~0x3Ful);
381 sf.sf_uc.uc_mcontext.mc_xfpustate = (register_t)sp;
382 }
383 sp -= sizeof(struct sigframe);
384 /* Align to 16 bytes. */
385 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
386
387 /* Translate the signal if appropriate. */
388 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
389 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
390
391 /* Build the argument list for the signal handler. */
392 regs->tf_rdi = sig; /* arg 1 in %rdi */
393 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
394 bzero(&sf.sf_si, sizeof(sf.sf_si));
395 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
396 /* Signal handler installed with SA_SIGINFO. */
397 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
398 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
399
400 /* Fill in POSIX parts */
401 sf.sf_si = ksi->ksi_info;
402 sf.sf_si.si_signo = sig; /* maybe a translated signal */
403 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
404 } else {
405 /* Old FreeBSD-style arguments. */
406 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
407 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
408 sf.sf_ahu.sf_handler = catcher;
409 }
410 mtx_unlock(&psp->ps_mtx);
411 PROC_UNLOCK(p);
412
413 /*
414 * Copy the sigframe out to the user's stack.
415 */
416 if (copyout(&sf, sfp, sizeof(*sfp)) != 0 ||
417 (xfpusave != NULL && copyout(xfpusave,
418 (void *)sf.sf_uc.uc_mcontext.mc_xfpustate, xfpusave_len)
419 != 0)) {
420 #ifdef DEBUG
421 printf("process %ld has trashed its stack\n", (long)p->p_pid);
422 #endif
423 PROC_LOCK(p);
424 sigexit(td, SIGILL);
425 }
426
427 regs->tf_rsp = (long)sfp;
428 regs->tf_rip = p->p_sysent->sv_sigcode_base;
429 regs->tf_rflags &= ~(PSL_T | PSL_D);
430 regs->tf_cs = _ucodesel;
431 regs->tf_ds = _udatasel;
432 regs->tf_ss = _udatasel;
433 regs->tf_es = _udatasel;
434 regs->tf_fs = _ufssel;
435 regs->tf_gs = _ugssel;
436 regs->tf_flags = TF_HASSEGS;
437 set_pcb_flags(pcb, PCB_FULL_IRET);
438 PROC_LOCK(p);
439 mtx_lock(&psp->ps_mtx);
440 }
441
442 /*
443 * System call to cleanup state after a signal
444 * has been taken. Reset signal mask and
445 * stack state from context left by sendsig (above).
446 * Return to previous pc and psl as specified by
447 * context left by sendsig. Check carefully to
448 * make sure that the user has not modified the
449 * state to gain improper privileges.
450 *
451 * MPSAFE
452 */
453 int
sys_sigreturn(td,uap)454 sys_sigreturn(td, uap)
455 struct thread *td;
456 struct sigreturn_args /* {
457 const struct __ucontext *sigcntxp;
458 } */ *uap;
459 {
460 ucontext_t uc;
461 struct pcb *pcb;
462 struct proc *p;
463 struct trapframe *regs;
464 ucontext_t *ucp;
465 char *xfpustate;
466 size_t xfpustate_len;
467 long rflags;
468 int cs, error, ret;
469 ksiginfo_t ksi;
470
471 pcb = td->td_pcb;
472 p = td->td_proc;
473
474 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
475 if (error != 0) {
476 uprintf("pid %d (%s): sigreturn copyin failed\n",
477 p->p_pid, td->td_name);
478 return (error);
479 }
480 ucp = &uc;
481 if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
482 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
483 td->td_name, ucp->uc_mcontext.mc_flags);
484 return (EINVAL);
485 }
486 regs = td->td_frame;
487 rflags = ucp->uc_mcontext.mc_rflags;
488 /*
489 * Don't allow users to change privileged or reserved flags.
490 */
491 if (!EFL_SECURE(rflags, regs->tf_rflags)) {
492 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
493 td->td_name, rflags);
494 return (EINVAL);
495 }
496
497 /*
498 * Don't allow users to load a valid privileged %cs. Let the
499 * hardware check for invalid selectors, excess privilege in
500 * other selectors, invalid %eip's and invalid %esp's.
501 */
502 cs = ucp->uc_mcontext.mc_cs;
503 if (!CS_SECURE(cs)) {
504 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
505 td->td_name, cs);
506 ksiginfo_init_trap(&ksi);
507 ksi.ksi_signo = SIGBUS;
508 ksi.ksi_code = BUS_OBJERR;
509 ksi.ksi_trapno = T_PROTFLT;
510 ksi.ksi_addr = (void *)regs->tf_rip;
511 trapsignal(td, &ksi);
512 return (EINVAL);
513 }
514
515 if ((uc.uc_mcontext.mc_flags & _MC_HASFPXSTATE) != 0) {
516 xfpustate_len = uc.uc_mcontext.mc_xfpustate_len;
517 if (xfpustate_len > cpu_max_ext_state_size -
518 sizeof(struct savefpu)) {
519 uprintf("pid %d (%s): sigreturn xfpusave_len = 0x%zx\n",
520 p->p_pid, td->td_name, xfpustate_len);
521 return (EINVAL);
522 }
523 xfpustate = __builtin_alloca(xfpustate_len);
524 error = copyin((const void *)uc.uc_mcontext.mc_xfpustate,
525 xfpustate, xfpustate_len);
526 if (error != 0) {
527 uprintf(
528 "pid %d (%s): sigreturn copying xfpustate failed\n",
529 p->p_pid, td->td_name);
530 return (error);
531 }
532 } else {
533 xfpustate = NULL;
534 xfpustate_len = 0;
535 }
536 ret = set_fpcontext(td, &ucp->uc_mcontext, xfpustate, xfpustate_len);
537 if (ret != 0) {
538 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
539 p->p_pid, td->td_name, ret);
540 return (ret);
541 }
542 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
543 pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
544 pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
545
546 #if defined(COMPAT_43)
547 if (ucp->uc_mcontext.mc_onstack & 1)
548 td->td_sigstk.ss_flags |= SS_ONSTACK;
549 else
550 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
551 #endif
552
553 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
554 set_pcb_flags(pcb, PCB_FULL_IRET);
555 return (EJUSTRETURN);
556 }
557
558 #ifdef COMPAT_FREEBSD4
559 int
freebsd4_sigreturn(struct thread * td,struct freebsd4_sigreturn_args * uap)560 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
561 {
562
563 return sys_sigreturn(td, (struct sigreturn_args *)uap);
564 }
565 #endif
566
567
568 /*
569 * Machine dependent boot() routine
570 *
571 * I haven't seen anything to put here yet
572 * Possibly some stuff might be grafted back here from boot()
573 */
574 void
cpu_boot(int howto)575 cpu_boot(int howto)
576 {
577 }
578
579 /*
580 * Flush the D-cache for non-DMA I/O so that the I-cache can
581 * be made coherent later.
582 */
583 void
cpu_flush_dcache(void * ptr,size_t len)584 cpu_flush_dcache(void *ptr, size_t len)
585 {
586 /* Not applicable */
587 }
588
589 /* Get current clock frequency for the given cpu id. */
590 int
cpu_est_clockrate(int cpu_id,uint64_t * rate)591 cpu_est_clockrate(int cpu_id, uint64_t *rate)
592 {
593 uint64_t tsc1, tsc2;
594 uint64_t acnt, mcnt, perf;
595 register_t reg;
596
597 if (pcpu_find(cpu_id) == NULL || rate == NULL)
598 return (EINVAL);
599
600 /*
601 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
602 * DELAY(9) based logic fails.
603 */
604 if (tsc_is_invariant && !tsc_perf_stat)
605 return (EOPNOTSUPP);
606
607 #ifdef SMP
608 if (smp_cpus > 1) {
609 /* Schedule ourselves on the indicated cpu. */
610 thread_lock(curthread);
611 sched_bind(curthread, cpu_id);
612 thread_unlock(curthread);
613 }
614 #endif
615
616 /* Calibrate by measuring a short delay. */
617 reg = intr_disable();
618 if (tsc_is_invariant) {
619 wrmsr(MSR_MPERF, 0);
620 wrmsr(MSR_APERF, 0);
621 tsc1 = rdtsc();
622 DELAY(1000);
623 mcnt = rdmsr(MSR_MPERF);
624 acnt = rdmsr(MSR_APERF);
625 tsc2 = rdtsc();
626 intr_restore(reg);
627 perf = 1000 * acnt / mcnt;
628 *rate = (tsc2 - tsc1) * perf;
629 } else {
630 tsc1 = rdtsc();
631 DELAY(1000);
632 tsc2 = rdtsc();
633 intr_restore(reg);
634 *rate = (tsc2 - tsc1) * 1000;
635 }
636
637 #ifdef SMP
638 if (smp_cpus > 1) {
639 thread_lock(curthread);
640 sched_unbind(curthread);
641 thread_unlock(curthread);
642 }
643 #endif
644
645 return (0);
646 }
647
648 /*
649 * Shutdown the CPU as much as possible
650 */
651 void
cpu_halt(void)652 cpu_halt(void)
653 {
654 for (;;)
655 halt();
656 }
657
658 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
659 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
660 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
661 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
662 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
663 0, "Use MONITOR/MWAIT for short idle");
664
665 #define STATE_RUNNING 0x0
666 #define STATE_MWAIT 0x1
667 #define STATE_SLEEPING 0x2
668
669 static void
cpu_idle_acpi(sbintime_t sbt)670 cpu_idle_acpi(sbintime_t sbt)
671 {
672 int *state;
673
674 state = (int *)PCPU_PTR(monitorbuf);
675 *state = STATE_SLEEPING;
676
677 /* See comments in cpu_idle_hlt(). */
678 disable_intr();
679 if (sched_runnable())
680 enable_intr();
681 else if (cpu_idle_hook)
682 cpu_idle_hook(sbt);
683 else
684 __asm __volatile("sti; hlt");
685 *state = STATE_RUNNING;
686 }
687
688 static void
cpu_idle_hlt(sbintime_t sbt)689 cpu_idle_hlt(sbintime_t sbt)
690 {
691 int *state;
692
693 state = (int *)PCPU_PTR(monitorbuf);
694 *state = STATE_SLEEPING;
695
696 /*
697 * Since we may be in a critical section from cpu_idle(), if
698 * an interrupt fires during that critical section we may have
699 * a pending preemption. If the CPU halts, then that thread
700 * may not execute until a later interrupt awakens the CPU.
701 * To handle this race, check for a runnable thread after
702 * disabling interrupts and immediately return if one is
703 * found. Also, we must absolutely guarentee that hlt is
704 * the next instruction after sti. This ensures that any
705 * interrupt that fires after the call to disable_intr() will
706 * immediately awaken the CPU from hlt. Finally, please note
707 * that on x86 this works fine because of interrupts enabled only
708 * after the instruction following sti takes place, while IF is set
709 * to 1 immediately, allowing hlt instruction to acknowledge the
710 * interrupt.
711 */
712 disable_intr();
713 if (sched_runnable())
714 enable_intr();
715 else
716 __asm __volatile("sti; hlt");
717 *state = STATE_RUNNING;
718 }
719
720 static void
cpu_idle_mwait(sbintime_t sbt)721 cpu_idle_mwait(sbintime_t sbt)
722 {
723 int *state;
724
725 state = (int *)PCPU_PTR(monitorbuf);
726 *state = STATE_MWAIT;
727
728 /* See comments in cpu_idle_hlt(). */
729 disable_intr();
730 if (sched_runnable()) {
731 enable_intr();
732 *state = STATE_RUNNING;
733 return;
734 }
735 cpu_monitor(state, 0, 0);
736 if (*state == STATE_MWAIT)
737 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
738 else
739 enable_intr();
740 *state = STATE_RUNNING;
741 }
742
743 static void
cpu_idle_spin(sbintime_t sbt)744 cpu_idle_spin(sbintime_t sbt)
745 {
746 int *state;
747 int i;
748
749 state = (int *)PCPU_PTR(monitorbuf);
750 *state = STATE_RUNNING;
751
752 /*
753 * The sched_runnable() call is racy but as long as there is
754 * a loop missing it one time will have just a little impact if any
755 * (and it is much better than missing the check at all).
756 */
757 for (i = 0; i < 1000; i++) {
758 if (sched_runnable())
759 return;
760 cpu_spinwait();
761 }
762 }
763
764 /*
765 * C1E renders the local APIC timer dead, so we disable it by
766 * reading the Interrupt Pending Message register and clearing
767 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
768 *
769 * Reference:
770 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
771 * #32559 revision 3.00+
772 */
773 #define MSR_AMDK8_IPM 0xc0010055
774 #define AMDK8_SMIONCMPHALT (1ULL << 27)
775 #define AMDK8_C1EONCMPHALT (1ULL << 28)
776 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
777
778 static void
cpu_probe_amdc1e(void)779 cpu_probe_amdc1e(void)
780 {
781
782 /*
783 * Detect the presence of C1E capability mostly on latest
784 * dual-cores (or future) k8 family.
785 */
786 if (cpu_vendor_id == CPU_VENDOR_AMD &&
787 (cpu_id & 0x00000f00) == 0x00000f00 &&
788 (cpu_id & 0x0fff0000) >= 0x00040000) {
789 cpu_ident_amdc1e = 1;
790 }
791 }
792
793 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
794
795 void
cpu_idle(int busy)796 cpu_idle(int busy)
797 {
798 uint64_t msr;
799 sbintime_t sbt = -1;
800
801 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
802 busy, curcpu);
803 #ifdef MP_WATCHDOG
804 ap_watchdog(PCPU_GET(cpuid));
805 #endif
806 /* If we are busy - try to use fast methods. */
807 if (busy) {
808 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
809 cpu_idle_mwait(busy);
810 goto out;
811 }
812 }
813
814 /* If we have time - switch timers into idle mode. */
815 if (!busy) {
816 critical_enter();
817 sbt = cpu_idleclock();
818 }
819
820 /* Apply AMD APIC timer C1E workaround. */
821 if (cpu_ident_amdc1e && cpu_disable_c3_sleep) {
822 msr = rdmsr(MSR_AMDK8_IPM);
823 if (msr & AMDK8_CMPHALT)
824 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
825 }
826
827 /* Call main idle method. */
828 cpu_idle_fn(sbt);
829
830 /* Switch timers mack into active mode. */
831 if (!busy) {
832 cpu_activeclock();
833 critical_exit();
834 }
835 out:
836 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
837 busy, curcpu);
838 }
839
840 int
cpu_idle_wakeup(int cpu)841 cpu_idle_wakeup(int cpu)
842 {
843 struct pcpu *pcpu;
844 int *state;
845
846 pcpu = pcpu_find(cpu);
847 state = (int *)pcpu->pc_monitorbuf;
848 /*
849 * This doesn't need to be atomic since missing the race will
850 * simply result in unnecessary IPIs.
851 */
852 if (*state == STATE_SLEEPING)
853 return (0);
854 if (*state == STATE_MWAIT)
855 *state = STATE_RUNNING;
856 return (1);
857 }
858
859 /*
860 * Ordered by speed/power consumption.
861 */
862 struct {
863 void *id_fn;
864 char *id_name;
865 } idle_tbl[] = {
866 { cpu_idle_spin, "spin" },
867 { cpu_idle_mwait, "mwait" },
868 { cpu_idle_hlt, "hlt" },
869 { cpu_idle_acpi, "acpi" },
870 { NULL, NULL }
871 };
872
873 static int
idle_sysctl_available(SYSCTL_HANDLER_ARGS)874 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
875 {
876 char *avail, *p;
877 int error;
878 int i;
879
880 avail = malloc(256, M_TEMP, M_WAITOK);
881 p = avail;
882 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
883 if (strstr(idle_tbl[i].id_name, "mwait") &&
884 (cpu_feature2 & CPUID2_MON) == 0)
885 continue;
886 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
887 cpu_idle_hook == NULL)
888 continue;
889 p += sprintf(p, "%s%s", p != avail ? ", " : "",
890 idle_tbl[i].id_name);
891 }
892 error = sysctl_handle_string(oidp, avail, 0, req);
893 free(avail, M_TEMP);
894 return (error);
895 }
896
897 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
898 0, 0, idle_sysctl_available, "A", "list of available idle functions");
899
900 static int
idle_sysctl(SYSCTL_HANDLER_ARGS)901 idle_sysctl(SYSCTL_HANDLER_ARGS)
902 {
903 char buf[16];
904 int error;
905 char *p;
906 int i;
907
908 p = "unknown";
909 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
910 if (idle_tbl[i].id_fn == cpu_idle_fn) {
911 p = idle_tbl[i].id_name;
912 break;
913 }
914 }
915 strncpy(buf, p, sizeof(buf));
916 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
917 if (error != 0 || req->newptr == NULL)
918 return (error);
919 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
920 if (strstr(idle_tbl[i].id_name, "mwait") &&
921 (cpu_feature2 & CPUID2_MON) == 0)
922 continue;
923 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
924 cpu_idle_hook == NULL)
925 continue;
926 if (strcmp(idle_tbl[i].id_name, buf))
927 continue;
928 cpu_idle_fn = idle_tbl[i].id_fn;
929 return (0);
930 }
931 return (EINVAL);
932 }
933
934 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
935 idle_sysctl, "A", "currently selected idle function");
936
937 /*
938 * Reset registers to default values on exec.
939 */
940 void
exec_setregs(struct thread * td,struct image_params * imgp,u_long stack)941 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
942 {
943 struct trapframe *regs = td->td_frame;
944 struct pcb *pcb = td->td_pcb;
945
946 mtx_lock(&dt_lock);
947 if (td->td_proc->p_md.md_ldt != NULL)
948 user_ldt_free(td);
949 else
950 mtx_unlock(&dt_lock);
951
952 pcb->pcb_fsbase = 0;
953 pcb->pcb_gsbase = 0;
954 clear_pcb_flags(pcb, PCB_32BIT);
955 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
956 set_pcb_flags(pcb, PCB_FULL_IRET);
957
958 bzero((char *)regs, sizeof(struct trapframe));
959 regs->tf_rip = imgp->entry_addr;
960 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
961 regs->tf_rdi = stack; /* argv */
962 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
963 regs->tf_ss = _udatasel;
964 regs->tf_cs = _ucodesel;
965 regs->tf_ds = _udatasel;
966 regs->tf_es = _udatasel;
967 regs->tf_fs = _ufssel;
968 regs->tf_gs = _ugssel;
969 regs->tf_flags = TF_HASSEGS;
970 td->td_retval[1] = 0;
971
972 /*
973 * Reset the hardware debug registers if they were in use.
974 * They won't have any meaning for the newly exec'd process.
975 */
976 if (pcb->pcb_flags & PCB_DBREGS) {
977 pcb->pcb_dr0 = 0;
978 pcb->pcb_dr1 = 0;
979 pcb->pcb_dr2 = 0;
980 pcb->pcb_dr3 = 0;
981 pcb->pcb_dr6 = 0;
982 pcb->pcb_dr7 = 0;
983 if (pcb == curpcb) {
984 /*
985 * Clear the debug registers on the running
986 * CPU, otherwise they will end up affecting
987 * the next process we switch to.
988 */
989 reset_dbregs();
990 }
991 clear_pcb_flags(pcb, PCB_DBREGS);
992 }
993
994 /*
995 * Drop the FP state if we hold it, so that the process gets a
996 * clean FP state if it uses the FPU again.
997 */
998 fpstate_drop(td);
999 }
1000
1001 void
cpu_setregs(void)1002 cpu_setregs(void)
1003 {
1004 register_t cr0;
1005
1006 cr0 = rcr0();
1007 /*
1008 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
1009 * BSP. See the comments there about why we set them.
1010 */
1011 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1012 load_cr0(cr0);
1013 }
1014
1015 /*
1016 * Initialize amd64 and configure to run kernel
1017 */
1018
1019 /*
1020 * Initialize segments & interrupt table
1021 */
1022
1023 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
1024 static struct gate_descriptor idt0[NIDT];
1025 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1026
1027 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1028
1029 static char nmi0_stack[PAGE_SIZE] __aligned(16);
1030 CTASSERT(sizeof(struct nmi_pcpu) == 16);
1031
1032 struct amd64tss common_tss[MAXCPU];
1033
1034 /*
1035 * Software prototypes -- in more palatable form.
1036 *
1037 * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
1038 * slots as corresponding segments for i386 kernel.
1039 */
1040 struct soft_segment_descriptor gdt_segs[] = {
1041 /* GNULL_SEL 0 Null Descriptor */
1042 { .ssd_base = 0x0,
1043 .ssd_limit = 0x0,
1044 .ssd_type = 0,
1045 .ssd_dpl = 0,
1046 .ssd_p = 0,
1047 .ssd_long = 0,
1048 .ssd_def32 = 0,
1049 .ssd_gran = 0 },
1050 /* GNULL2_SEL 1 Null Descriptor */
1051 { .ssd_base = 0x0,
1052 .ssd_limit = 0x0,
1053 .ssd_type = 0,
1054 .ssd_dpl = 0,
1055 .ssd_p = 0,
1056 .ssd_long = 0,
1057 .ssd_def32 = 0,
1058 .ssd_gran = 0 },
1059 /* GUFS32_SEL 2 32 bit %gs Descriptor for user */
1060 { .ssd_base = 0x0,
1061 .ssd_limit = 0xfffff,
1062 .ssd_type = SDT_MEMRWA,
1063 .ssd_dpl = SEL_UPL,
1064 .ssd_p = 1,
1065 .ssd_long = 0,
1066 .ssd_def32 = 1,
1067 .ssd_gran = 1 },
1068 /* GUGS32_SEL 3 32 bit %fs Descriptor for user */
1069 { .ssd_base = 0x0,
1070 .ssd_limit = 0xfffff,
1071 .ssd_type = SDT_MEMRWA,
1072 .ssd_dpl = SEL_UPL,
1073 .ssd_p = 1,
1074 .ssd_long = 0,
1075 .ssd_def32 = 1,
1076 .ssd_gran = 1 },
1077 /* GCODE_SEL 4 Code Descriptor for kernel */
1078 { .ssd_base = 0x0,
1079 .ssd_limit = 0xfffff,
1080 .ssd_type = SDT_MEMERA,
1081 .ssd_dpl = SEL_KPL,
1082 .ssd_p = 1,
1083 .ssd_long = 1,
1084 .ssd_def32 = 0,
1085 .ssd_gran = 1 },
1086 /* GDATA_SEL 5 Data Descriptor for kernel */
1087 { .ssd_base = 0x0,
1088 .ssd_limit = 0xfffff,
1089 .ssd_type = SDT_MEMRWA,
1090 .ssd_dpl = SEL_KPL,
1091 .ssd_p = 1,
1092 .ssd_long = 1,
1093 .ssd_def32 = 0,
1094 .ssd_gran = 1 },
1095 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
1096 { .ssd_base = 0x0,
1097 .ssd_limit = 0xfffff,
1098 .ssd_type = SDT_MEMERA,
1099 .ssd_dpl = SEL_UPL,
1100 .ssd_p = 1,
1101 .ssd_long = 0,
1102 .ssd_def32 = 1,
1103 .ssd_gran = 1 },
1104 /* GUDATA_SEL 7 32/64 bit Data Descriptor for user */
1105 { .ssd_base = 0x0,
1106 .ssd_limit = 0xfffff,
1107 .ssd_type = SDT_MEMRWA,
1108 .ssd_dpl = SEL_UPL,
1109 .ssd_p = 1,
1110 .ssd_long = 0,
1111 .ssd_def32 = 1,
1112 .ssd_gran = 1 },
1113 /* GUCODE_SEL 8 64 bit Code Descriptor for user */
1114 { .ssd_base = 0x0,
1115 .ssd_limit = 0xfffff,
1116 .ssd_type = SDT_MEMERA,
1117 .ssd_dpl = SEL_UPL,
1118 .ssd_p = 1,
1119 .ssd_long = 1,
1120 .ssd_def32 = 0,
1121 .ssd_gran = 1 },
1122 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1123 { .ssd_base = 0x0,
1124 .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
1125 .ssd_type = SDT_SYSTSS,
1126 .ssd_dpl = SEL_KPL,
1127 .ssd_p = 1,
1128 .ssd_long = 0,
1129 .ssd_def32 = 0,
1130 .ssd_gran = 0 },
1131 /* Actually, the TSS is a system descriptor which is double size */
1132 { .ssd_base = 0x0,
1133 .ssd_limit = 0x0,
1134 .ssd_type = 0,
1135 .ssd_dpl = 0,
1136 .ssd_p = 0,
1137 .ssd_long = 0,
1138 .ssd_def32 = 0,
1139 .ssd_gran = 0 },
1140 /* GUSERLDT_SEL 11 LDT Descriptor */
1141 { .ssd_base = 0x0,
1142 .ssd_limit = 0x0,
1143 .ssd_type = 0,
1144 .ssd_dpl = 0,
1145 .ssd_p = 0,
1146 .ssd_long = 0,
1147 .ssd_def32 = 0,
1148 .ssd_gran = 0 },
1149 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
1150 { .ssd_base = 0x0,
1151 .ssd_limit = 0x0,
1152 .ssd_type = 0,
1153 .ssd_dpl = 0,
1154 .ssd_p = 0,
1155 .ssd_long = 0,
1156 .ssd_def32 = 0,
1157 .ssd_gran = 0 },
1158 };
1159
1160 void
setidt(idx,func,typ,dpl,ist)1161 setidt(idx, func, typ, dpl, ist)
1162 int idx;
1163 inthand_t *func;
1164 int typ;
1165 int dpl;
1166 int ist;
1167 {
1168 struct gate_descriptor *ip;
1169
1170 ip = idt + idx;
1171 ip->gd_looffset = (uintptr_t)func;
1172 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1173 ip->gd_ist = ist;
1174 ip->gd_xx = 0;
1175 ip->gd_type = typ;
1176 ip->gd_dpl = dpl;
1177 ip->gd_p = 1;
1178 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1179 }
1180
1181 extern inthand_t
1182 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1183 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1184 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1185 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1186 IDTVEC(xmm), IDTVEC(dblfault),
1187 #ifdef KDTRACE_HOOKS
1188 IDTVEC(dtrace_ret),
1189 #endif
1190 #ifdef XENHVM
1191 IDTVEC(xen_intr_upcall),
1192 #endif
1193 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1194
1195 #ifdef DDB
1196 /*
1197 * Display the index and function name of any IDT entries that don't use
1198 * the default 'rsvd' entry point.
1199 */
DB_SHOW_COMMAND(idt,db_show_idt)1200 DB_SHOW_COMMAND(idt, db_show_idt)
1201 {
1202 struct gate_descriptor *ip;
1203 int idx;
1204 uintptr_t func;
1205
1206 ip = idt;
1207 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1208 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
1209 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1210 db_printf("%3d\t", idx);
1211 db_printsym(func, DB_STGY_PROC);
1212 db_printf("\n");
1213 }
1214 ip++;
1215 }
1216 }
1217
1218 /* Show privileged registers. */
DB_SHOW_COMMAND(sysregs,db_show_sysregs)1219 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1220 {
1221 struct {
1222 uint16_t limit;
1223 uint64_t base;
1224 } __packed idtr, gdtr;
1225 uint16_t ldt, tr;
1226
1227 __asm __volatile("sidt %0" : "=m" (idtr));
1228 db_printf("idtr\t0x%016lx/%04x\n",
1229 (u_long)idtr.base, (u_int)idtr.limit);
1230 __asm __volatile("sgdt %0" : "=m" (gdtr));
1231 db_printf("gdtr\t0x%016lx/%04x\n",
1232 (u_long)gdtr.base, (u_int)gdtr.limit);
1233 __asm __volatile("sldt %0" : "=r" (ldt));
1234 db_printf("ldtr\t0x%04x\n", ldt);
1235 __asm __volatile("str %0" : "=r" (tr));
1236 db_printf("tr\t0x%04x\n", tr);
1237 db_printf("cr0\t0x%016lx\n", rcr0());
1238 db_printf("cr2\t0x%016lx\n", rcr2());
1239 db_printf("cr3\t0x%016lx\n", rcr3());
1240 db_printf("cr4\t0x%016lx\n", rcr4());
1241 db_printf("EFER\t%016lx\n", rdmsr(MSR_EFER));
1242 db_printf("FEATURES_CTL\t%016lx\n", rdmsr(MSR_IA32_FEATURE_CONTROL));
1243 db_printf("DEBUG_CTL\t%016lx\n", rdmsr(MSR_DEBUGCTLMSR));
1244 db_printf("PAT\t%016lx\n", rdmsr(MSR_PAT));
1245 db_printf("GSBASE\t%016lx\n", rdmsr(MSR_GSBASE));
1246 }
1247 #endif
1248
1249 void
sdtossd(sd,ssd)1250 sdtossd(sd, ssd)
1251 struct user_segment_descriptor *sd;
1252 struct soft_segment_descriptor *ssd;
1253 {
1254
1255 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1256 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1257 ssd->ssd_type = sd->sd_type;
1258 ssd->ssd_dpl = sd->sd_dpl;
1259 ssd->ssd_p = sd->sd_p;
1260 ssd->ssd_long = sd->sd_long;
1261 ssd->ssd_def32 = sd->sd_def32;
1262 ssd->ssd_gran = sd->sd_gran;
1263 }
1264
1265 void
ssdtosd(ssd,sd)1266 ssdtosd(ssd, sd)
1267 struct soft_segment_descriptor *ssd;
1268 struct user_segment_descriptor *sd;
1269 {
1270
1271 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1272 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1273 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1274 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1275 sd->sd_type = ssd->ssd_type;
1276 sd->sd_dpl = ssd->ssd_dpl;
1277 sd->sd_p = ssd->ssd_p;
1278 sd->sd_long = ssd->ssd_long;
1279 sd->sd_def32 = ssd->ssd_def32;
1280 sd->sd_gran = ssd->ssd_gran;
1281 }
1282
1283 void
ssdtosyssd(ssd,sd)1284 ssdtosyssd(ssd, sd)
1285 struct soft_segment_descriptor *ssd;
1286 struct system_segment_descriptor *sd;
1287 {
1288
1289 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1290 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1291 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1292 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1293 sd->sd_type = ssd->ssd_type;
1294 sd->sd_dpl = ssd->ssd_dpl;
1295 sd->sd_p = ssd->ssd_p;
1296 sd->sd_gran = ssd->ssd_gran;
1297 }
1298
1299 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
1300 #include <isa/isavar.h>
1301 #include <isa/isareg.h>
1302 /*
1303 * Return a bitmap of the current interrupt requests. This is 8259-specific
1304 * and is only suitable for use at probe time.
1305 * This is only here to pacify sio. It is NOT FATAL if this doesn't work.
1306 * It shouldn't be here. There should probably be an APIC centric
1307 * implementation in the apic driver code, if at all.
1308 */
1309 intrmask_t
isa_irq_pending(void)1310 isa_irq_pending(void)
1311 {
1312 u_char irr1;
1313 u_char irr2;
1314
1315 irr1 = inb(IO_ICU1);
1316 irr2 = inb(IO_ICU2);
1317 return ((irr2 << 8) | irr1);
1318 }
1319 #endif
1320
1321 u_int basemem;
1322
1323 static int
add_physmap_entry(uint64_t base,uint64_t length,vm_paddr_t * physmap,int * physmap_idxp)1324 add_physmap_entry(uint64_t base, uint64_t length, vm_paddr_t *physmap,
1325 int *physmap_idxp)
1326 {
1327 int i, insert_idx, physmap_idx;
1328
1329 physmap_idx = *physmap_idxp;
1330
1331 if (length == 0)
1332 return (1);
1333
1334 /*
1335 * Find insertion point while checking for overlap. Start off by
1336 * assuming the new entry will be added to the end.
1337 */
1338 insert_idx = physmap_idx + 2;
1339 for (i = 0; i <= physmap_idx; i += 2) {
1340 if (base < physmap[i + 1]) {
1341 if (base + length <= physmap[i]) {
1342 insert_idx = i;
1343 break;
1344 }
1345 if (boothowto & RB_VERBOSE)
1346 printf(
1347 "Overlapping memory regions, ignoring second region\n");
1348 return (1);
1349 }
1350 }
1351
1352 /* See if we can prepend to the next entry. */
1353 if (insert_idx <= physmap_idx && base + length == physmap[insert_idx]) {
1354 physmap[insert_idx] = base;
1355 return (1);
1356 }
1357
1358 /* See if we can append to the previous entry. */
1359 if (insert_idx > 0 && base == physmap[insert_idx - 1]) {
1360 physmap[insert_idx - 1] += length;
1361 return (1);
1362 }
1363
1364 physmap_idx += 2;
1365 *physmap_idxp = physmap_idx;
1366 if (physmap_idx == PHYSMAP_SIZE) {
1367 printf(
1368 "Too many segments in the physical address map, giving up\n");
1369 return (0);
1370 }
1371
1372 /*
1373 * Move the last 'N' entries down to make room for the new
1374 * entry if needed.
1375 */
1376 for (i = physmap_idx; i > insert_idx; i -= 2) {
1377 physmap[i] = physmap[i - 2];
1378 physmap[i + 1] = physmap[i - 1];
1379 }
1380
1381 /* Insert the new entry. */
1382 physmap[insert_idx] = base;
1383 physmap[insert_idx + 1] = base + length;
1384 return (1);
1385 }
1386
1387 static void
add_smap_entries(struct bios_smap * smapbase,vm_paddr_t * physmap,int * physmap_idx)1388 add_smap_entries(struct bios_smap *smapbase, vm_paddr_t *physmap,
1389 int *physmap_idx)
1390 {
1391 struct bios_smap *smap, *smapend;
1392 u_int32_t smapsize;
1393
1394 /*
1395 * Memory map from INT 15:E820.
1396 *
1397 * subr_module.c says:
1398 * "Consumer may safely assume that size value precedes data."
1399 * ie: an int32_t immediately precedes smap.
1400 */
1401 smapsize = *((u_int32_t *)smapbase - 1);
1402 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1403
1404 for (smap = smapbase; smap < smapend; smap++) {
1405 if (boothowto & RB_VERBOSE)
1406 printf("SMAP type=%02x base=%016lx len=%016lx\n",
1407 smap->type, smap->base, smap->length);
1408
1409 if (smap->type != SMAP_TYPE_MEMORY)
1410 continue;
1411
1412 if (!add_physmap_entry(smap->base, smap->length, physmap,
1413 physmap_idx))
1414 break;
1415 }
1416 }
1417
1418 #define efi_next_descriptor(ptr, size) \
1419 ((struct efi_md *)(((uint8_t *) ptr) + size))
1420
1421 static void
add_efi_map_entries(struct efi_map_header * efihdr,vm_paddr_t * physmap,int * physmap_idx)1422 add_efi_map_entries(struct efi_map_header *efihdr, vm_paddr_t *physmap,
1423 int *physmap_idx)
1424 {
1425 struct efi_md *map, *p;
1426 const char *type;
1427 size_t efisz;
1428 int ndesc, i;
1429
1430 static const char *types[] = {
1431 "Reserved",
1432 "LoaderCode",
1433 "LoaderData",
1434 "BootServicesCode",
1435 "BootServicesData",
1436 "RuntimeServicesCode",
1437 "RuntimeServicesData",
1438 "ConventionalMemory",
1439 "UnusableMemory",
1440 "ACPIReclaimMemory",
1441 "ACPIMemoryNVS",
1442 "MemoryMappedIO",
1443 "MemoryMappedIOPortSpace",
1444 "PalCode"
1445 };
1446
1447 /*
1448 * Memory map data provided by UEFI via the GetMemoryMap
1449 * Boot Services API.
1450 */
1451 efisz = (sizeof(struct efi_map_header) + 0xf) & ~0xf;
1452 map = (struct efi_md *)((uint8_t *)efihdr + efisz);
1453
1454 if (efihdr->descriptor_size == 0)
1455 return;
1456 ndesc = efihdr->memory_size / efihdr->descriptor_size;
1457
1458 if (boothowto & RB_VERBOSE)
1459 printf("%23s %12s %12s %8s %4s\n",
1460 "Type", "Physical", "Virtual", "#Pages", "Attr");
1461
1462 for (i = 0, p = map; i < ndesc; i++,
1463 p = efi_next_descriptor(p, efihdr->descriptor_size)) {
1464 if (boothowto & RB_VERBOSE) {
1465 if (p->md_type <= EFI_MD_TYPE_PALCODE)
1466 type = types[p->md_type];
1467 else
1468 type = "<INVALID>";
1469 printf("%23s %012lx %12p %08lx ", type, p->md_phys,
1470 p->md_virt, p->md_pages);
1471 if (p->md_attr & EFI_MD_ATTR_UC)
1472 printf("UC ");
1473 if (p->md_attr & EFI_MD_ATTR_WC)
1474 printf("WC ");
1475 if (p->md_attr & EFI_MD_ATTR_WT)
1476 printf("WT ");
1477 if (p->md_attr & EFI_MD_ATTR_WB)
1478 printf("WB ");
1479 if (p->md_attr & EFI_MD_ATTR_UCE)
1480 printf("UCE ");
1481 if (p->md_attr & EFI_MD_ATTR_WP)
1482 printf("WP ");
1483 if (p->md_attr & EFI_MD_ATTR_RP)
1484 printf("RP ");
1485 if (p->md_attr & EFI_MD_ATTR_XP)
1486 printf("XP ");
1487 if (p->md_attr & EFI_MD_ATTR_RT)
1488 printf("RUNTIME");
1489 printf("\n");
1490 }
1491
1492 switch (p->md_type) {
1493 case EFI_MD_TYPE_CODE:
1494 case EFI_MD_TYPE_DATA:
1495 case EFI_MD_TYPE_BS_CODE:
1496 case EFI_MD_TYPE_BS_DATA:
1497 case EFI_MD_TYPE_FREE:
1498 /*
1499 * We're allowed to use any entry with these types.
1500 */
1501 break;
1502 default:
1503 continue;
1504 }
1505
1506 if (!add_physmap_entry(p->md_phys, (p->md_pages * PAGE_SIZE),
1507 physmap, physmap_idx))
1508 break;
1509 }
1510 }
1511
1512 static char bootmethod[16] = "";
1513 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1514 "System firmware boot method");
1515
1516 #define PAGES_PER_GB (1024 * 1024 * 1024 / PAGE_SIZE)
1517
1518 /*
1519 * Populate the (physmap) array with base/bound pairs describing the
1520 * available physical memory in the system, then test this memory and
1521 * build the phys_avail array describing the actually-available memory.
1522 *
1523 * Total memory size may be set by the kernel environment variable
1524 * hw.physmem or the compile-time define MAXMEM.
1525 *
1526 * XXX first should be vm_paddr_t.
1527 */
1528 static void
getmemsize(caddr_t kmdp,u_int64_t first)1529 getmemsize(caddr_t kmdp, u_int64_t first)
1530 {
1531 int i, physmap_idx, pa_indx, da_indx;
1532 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1533 u_long physmem_start, physmem_tunable, memtest;
1534 pt_entry_t *pte;
1535 struct bios_smap *smapbase;
1536 struct efi_map_header *efihdr;
1537 quad_t dcons_addr, dcons_size;
1538 int page_counter;
1539
1540 bzero(physmap, sizeof(physmap));
1541 basemem = 0;
1542 physmap_idx = 0;
1543
1544 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
1545 MODINFO_METADATA | MODINFOMD_EFI_MAP);
1546 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1547 MODINFO_METADATA | MODINFOMD_SMAP);
1548
1549 if (efihdr != NULL) {
1550 add_efi_map_entries(efihdr, physmap, &physmap_idx);
1551 strlcpy(bootmethod, "UEFI", sizeof(bootmethod));
1552 } else if (smapbase != NULL) {
1553 add_smap_entries(smapbase, physmap, &physmap_idx);
1554 strlcpy(bootmethod, "BIOS", sizeof(bootmethod));
1555 } else {
1556 panic("No BIOS smap or EFI map info from loader!");
1557 }
1558
1559 /*
1560 * Find the 'base memory' segment for SMP
1561 */
1562 basemem = 0;
1563 for (i = 0; i <= physmap_idx; i += 2) {
1564 if (physmap[i] == 0x00000000) {
1565 basemem = physmap[i + 1] / 1024;
1566 break;
1567 }
1568 }
1569 if (basemem == 0)
1570 panic("BIOS smap did not include a basemem segment!");
1571
1572 #ifdef SMP
1573 /* make hole for AP bootstrap code */
1574 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1575 #endif
1576
1577 /*
1578 * Maxmem isn't the "maximum memory", it's one larger than the
1579 * highest page of the physical address space. It should be
1580 * called something like "Maxphyspage". We may adjust this
1581 * based on ``hw.physmem'' and the results of the memory test.
1582 */
1583 Maxmem = atop(physmap[physmap_idx + 1]);
1584
1585 #ifdef MAXMEM
1586 Maxmem = MAXMEM / 4;
1587 #endif
1588
1589 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1590 Maxmem = atop(physmem_tunable);
1591
1592 /*
1593 * The boot memory test is disabled by default, as it takes a
1594 * significant amount of time on large-memory systems, and is
1595 * unfriendly to virtual machines as it unnecessarily touches all
1596 * pages.
1597 *
1598 * A general name is used as the code may be extended to support
1599 * additional tests beyond the current "page present" test.
1600 */
1601 memtest = 0;
1602 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1603
1604 /*
1605 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1606 * in the system.
1607 */
1608 if (Maxmem > atop(physmap[physmap_idx + 1]))
1609 Maxmem = atop(physmap[physmap_idx + 1]);
1610
1611 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1612 (boothowto & RB_VERBOSE))
1613 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1614
1615 /* call pmap initialization to make new kernel address space */
1616 pmap_bootstrap(&first);
1617
1618 /*
1619 * Size up each available chunk of physical memory.
1620 *
1621 * XXX Some BIOSes corrupt low 64KB between suspend and resume.
1622 * By default, mask off the first 16 pages unless we appear to be
1623 * running in a VM.
1624 */
1625 physmem_start = (vm_guest > VM_GUEST_NO ? 1 : 16) << PAGE_SHIFT;
1626 TUNABLE_ULONG_FETCH("hw.physmem.start", &physmem_start);
1627 if (physmem_start < PAGE_SIZE)
1628 physmap[0] = PAGE_SIZE;
1629 else if (physmem_start >= physmap[1])
1630 physmap[0] = round_page(physmap[1] - PAGE_SIZE);
1631 else
1632 physmap[0] = round_page(physmem_start);
1633 pa_indx = 0;
1634 da_indx = 1;
1635 phys_avail[pa_indx++] = physmap[0];
1636 phys_avail[pa_indx] = physmap[0];
1637 dump_avail[da_indx] = physmap[0];
1638 pte = CMAP1;
1639
1640 /*
1641 * Get dcons buffer address
1642 */
1643 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1644 getenv_quad("dcons.size", &dcons_size) == 0)
1645 dcons_addr = 0;
1646
1647 /*
1648 * physmap is in bytes, so when converting to page boundaries,
1649 * round up the start address and round down the end address.
1650 */
1651 page_counter = 0;
1652 if (memtest != 0)
1653 printf("Testing system memory");
1654 for (i = 0; i <= physmap_idx; i += 2) {
1655 vm_paddr_t end;
1656
1657 end = ptoa((vm_paddr_t)Maxmem);
1658 if (physmap[i + 1] < end)
1659 end = trunc_page(physmap[i + 1]);
1660 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1661 int tmp, page_bad, full;
1662 int *ptr = (int *)CADDR1;
1663
1664 full = FALSE;
1665 /*
1666 * block out kernel memory as not available.
1667 */
1668 if (pa >= (vm_paddr_t)kernphys && pa < first)
1669 goto do_dump_avail;
1670
1671 /*
1672 * block out dcons buffer
1673 */
1674 if (dcons_addr > 0
1675 && pa >= trunc_page(dcons_addr)
1676 && pa < dcons_addr + dcons_size)
1677 goto do_dump_avail;
1678
1679 page_bad = FALSE;
1680 if (memtest == 0)
1681 goto skip_memtest;
1682
1683 /*
1684 * Print a "." every GB to show we're making
1685 * progress.
1686 */
1687 page_counter++;
1688 if ((page_counter % PAGES_PER_GB) == 0)
1689 printf(".");
1690
1691 /*
1692 * map page into kernel: valid, read/write,non-cacheable
1693 */
1694 *pte = pa | PG_V | PG_RW | PG_NC_PWT | PG_NC_PCD;
1695 invltlb();
1696
1697 tmp = *(int *)ptr;
1698 /*
1699 * Test for alternating 1's and 0's
1700 */
1701 *(volatile int *)ptr = 0xaaaaaaaa;
1702 if (*(volatile int *)ptr != 0xaaaaaaaa)
1703 page_bad = TRUE;
1704 /*
1705 * Test for alternating 0's and 1's
1706 */
1707 *(volatile int *)ptr = 0x55555555;
1708 if (*(volatile int *)ptr != 0x55555555)
1709 page_bad = TRUE;
1710 /*
1711 * Test for all 1's
1712 */
1713 *(volatile int *)ptr = 0xffffffff;
1714 if (*(volatile int *)ptr != 0xffffffff)
1715 page_bad = TRUE;
1716 /*
1717 * Test for all 0's
1718 */
1719 *(volatile int *)ptr = 0x0;
1720 if (*(volatile int *)ptr != 0x0)
1721 page_bad = TRUE;
1722 /*
1723 * Restore original value.
1724 */
1725 *(int *)ptr = tmp;
1726
1727 skip_memtest:
1728 /*
1729 * Adjust array of valid/good pages.
1730 */
1731 if (page_bad == TRUE)
1732 continue;
1733 /*
1734 * If this good page is a continuation of the
1735 * previous set of good pages, then just increase
1736 * the end pointer. Otherwise start a new chunk.
1737 * Note that "end" points one higher than end,
1738 * making the range >= start and < end.
1739 * If we're also doing a speculative memory
1740 * test and we at or past the end, bump up Maxmem
1741 * so that we keep going. The first bad page
1742 * will terminate the loop.
1743 */
1744 if (phys_avail[pa_indx] == pa) {
1745 phys_avail[pa_indx] += PAGE_SIZE;
1746 } else {
1747 pa_indx++;
1748 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1749 printf(
1750 "Too many holes in the physical address space, giving up\n");
1751 pa_indx--;
1752 full = TRUE;
1753 goto do_dump_avail;
1754 }
1755 phys_avail[pa_indx++] = pa; /* start */
1756 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1757 }
1758 physmem++;
1759 do_dump_avail:
1760 if (dump_avail[da_indx] == pa) {
1761 dump_avail[da_indx] += PAGE_SIZE;
1762 } else {
1763 da_indx++;
1764 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1765 da_indx--;
1766 goto do_next;
1767 }
1768 dump_avail[da_indx++] = pa; /* start */
1769 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1770 }
1771 do_next:
1772 if (full)
1773 break;
1774 }
1775 }
1776 *pte = 0;
1777 invltlb();
1778 if (memtest != 0)
1779 printf("\n");
1780
1781 /*
1782 * XXX
1783 * The last chunk must contain at least one page plus the message
1784 * buffer to avoid complicating other code (message buffer address
1785 * calculation, etc.).
1786 */
1787 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1788 round_page(msgbufsize) >= phys_avail[pa_indx]) {
1789 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1790 phys_avail[pa_indx--] = 0;
1791 phys_avail[pa_indx--] = 0;
1792 }
1793
1794 Maxmem = atop(phys_avail[pa_indx]);
1795
1796 /* Trim off space for the message buffer. */
1797 phys_avail[pa_indx] -= round_page(msgbufsize);
1798
1799 /* Map the message buffer. */
1800 msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
1801 }
1802
1803 u_int64_t
hammer_time(u_int64_t modulep,u_int64_t physfree)1804 hammer_time(u_int64_t modulep, u_int64_t physfree)
1805 {
1806 caddr_t kmdp;
1807 int gsel_tss, x;
1808 struct pcpu *pc;
1809 struct nmi_pcpu *np;
1810 struct xstate_hdr *xhdr;
1811 u_int64_t msr;
1812 char *env;
1813 size_t kstack0_sz;
1814
1815 thread0.td_kstack = physfree + KERNBASE;
1816 thread0.td_kstack_pages = KSTACK_PAGES;
1817 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
1818 bzero((void *)thread0.td_kstack, kstack0_sz);
1819 physfree += kstack0_sz;
1820
1821 /*
1822 * This may be done better later if it gets more high level
1823 * components in it. If so just link td->td_proc here.
1824 */
1825 proc_linkup0(&proc0, &thread0);
1826
1827 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1828 preload_bootstrap_relocate(KERNBASE);
1829 kmdp = preload_search_by_type("elf kernel");
1830 if (kmdp == NULL)
1831 kmdp = preload_search_by_type("elf64 kernel");
1832 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1833 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1834 #ifdef DDB
1835 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1836 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1837 #endif
1838
1839 /* Init basic tunables, hz etc */
1840 init_param1();
1841
1842 /*
1843 * make gdt memory segments
1844 */
1845 for (x = 0; x < NGDT; x++) {
1846 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
1847 x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
1848 ssdtosd(&gdt_segs[x], &gdt[x]);
1849 }
1850 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1851 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1852 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1853
1854 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1855 r_gdt.rd_base = (long) gdt;
1856 lgdt(&r_gdt);
1857 pc = &__pcpu[0];
1858
1859 wrmsr(MSR_FSBASE, 0); /* User value */
1860 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1861 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1862
1863 pcpu_init(pc, 0, sizeof(struct pcpu));
1864 dpcpu_init((void *)(physfree + KERNBASE), 0);
1865 physfree += DPCPU_SIZE;
1866 PCPU_SET(prvspace, pc);
1867 PCPU_SET(curthread, &thread0);
1868 PCPU_SET(tssp, &common_tss[0]);
1869 PCPU_SET(commontssp, &common_tss[0]);
1870 PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1871 PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
1872 PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
1873 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1874
1875 /*
1876 * Initialize mutexes.
1877 *
1878 * icu_lock: in order to allow an interrupt to occur in a critical
1879 * section, to set pcpu->ipending (etc...) properly, we
1880 * must be able to get the icu lock, so it can't be
1881 * under witness.
1882 */
1883 mutex_init();
1884 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1885 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
1886
1887 /* exceptions */
1888 for (x = 0; x < NIDT; x++)
1889 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1890 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1891 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1892 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 2);
1893 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1894 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1895 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1896 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1897 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1898 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1899 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1900 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1901 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1902 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1903 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1904 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1905 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1906 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1907 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1908 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1909 #ifdef KDTRACE_HOOKS
1910 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
1911 #endif
1912 #ifdef XENHVM
1913 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYSIGT, SEL_UPL, 0);
1914 #endif
1915
1916 r_idt.rd_limit = sizeof(idt0) - 1;
1917 r_idt.rd_base = (long) idt;
1918 lidt(&r_idt);
1919
1920 /*
1921 * Initialize the i8254 before the console so that console
1922 * initialization can use DELAY().
1923 */
1924 i8254_init();
1925
1926 /*
1927 * Use vt(4) by default for UEFI boot (during the sc(4)/vt(4)
1928 * transition).
1929 */
1930 if (kmdp != NULL && preload_search_info(kmdp,
1931 MODINFO_METADATA | MODINFOMD_EFI_MAP) != NULL)
1932 vty_set_preferred(VTY_VT);
1933
1934 /*
1935 * Initialize the console before we print anything out.
1936 */
1937 cninit();
1938
1939 #ifdef DEV_ISA
1940 #ifdef DEV_ATPIC
1941 elcr_probe();
1942 atpic_startup();
1943 #else
1944 /* Reset and mask the atpics and leave them shut down. */
1945 atpic_reset();
1946
1947 /*
1948 * Point the ICU spurious interrupt vectors at the APIC spurious
1949 * interrupt handler.
1950 */
1951 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1952 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1953 #endif
1954 #else
1955 #error "have you forgotten the isa device?";
1956 #endif
1957
1958 kdb_init();
1959
1960 #ifdef KDB
1961 if (boothowto & RB_KDB)
1962 kdb_enter(KDB_WHY_BOOTFLAGS,
1963 "Boot flags requested debugger");
1964 #endif
1965
1966 identify_cpu(); /* Final stage of CPU initialization */
1967 initializecpu(); /* Initialize CPU registers */
1968 initializecpucache();
1969
1970 /* doublefault stack space, runs on ist1 */
1971 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1972
1973 /*
1974 * NMI stack, runs on ist2. The pcpu pointer is stored just
1975 * above the start of the ist2 stack.
1976 */
1977 np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
1978 np->np_pcpu = (register_t) pc;
1979 common_tss[0].tss_ist2 = (long) np;
1980
1981 /* Set the IO permission bitmap (empty due to tss seg limit) */
1982 common_tss[0].tss_iobase = sizeof(struct amd64tss) +
1983 IOPAGES * PAGE_SIZE;
1984
1985 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1986 ltr(gsel_tss);
1987
1988 /* Set up the fast syscall stuff */
1989 msr = rdmsr(MSR_EFER) | EFER_SCE;
1990 wrmsr(MSR_EFER, msr);
1991 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1992 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1993 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1994 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1995 wrmsr(MSR_STAR, msr);
1996 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1997
1998 getmemsize(kmdp, physfree);
1999 init_param2(physmem);
2000
2001 /* now running on new page tables, configured,and u/iom is accessible */
2002
2003 msgbufinit(msgbufp, msgbufsize);
2004 fpuinit();
2005
2006 /*
2007 * Set up thread0 pcb after fpuinit calculated pcb + fpu save
2008 * area size. Zero out the extended state header in fpu save
2009 * area.
2010 */
2011 thread0.td_pcb = get_pcb_td(&thread0);
2012 bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
2013 if (use_xsave) {
2014 xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
2015 1);
2016 xhdr->xstate_bv = xsave_mask;
2017 }
2018 /* make an initial tss so cpu can get interrupt stack on syscall! */
2019 common_tss[0].tss_rsp0 = (vm_offset_t)thread0.td_pcb;
2020 /* Ensure the stack is aligned to 16 bytes */
2021 common_tss[0].tss_rsp0 &= ~0xFul;
2022 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
2023 PCPU_SET(curpcb, thread0.td_pcb);
2024
2025 /* transfer to user mode */
2026
2027 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2028 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2029 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
2030 _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
2031 _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
2032
2033 load_ds(_udatasel);
2034 load_es(_udatasel);
2035 load_fs(_ufssel);
2036
2037 /* setup proc 0's pcb */
2038 thread0.td_pcb->pcb_flags = 0;
2039 thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */
2040 thread0.td_frame = &proc0_tf;
2041
2042 env = getenv("kernelname");
2043 if (env != NULL)
2044 strlcpy(kernelname, env, sizeof(kernelname));
2045
2046 cpu_probe_amdc1e();
2047
2048 #ifdef FDT
2049 x86_init_fdt();
2050 #endif
2051
2052 /* Location of kernel stack for locore */
2053 return ((u_int64_t)thread0.td_pcb);
2054 }
2055
2056 void
cpu_pcpu_init(struct pcpu * pcpu,int cpuid,size_t size)2057 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2058 {
2059
2060 pcpu->pc_acpi_id = 0xffffffff;
2061 }
2062
2063 static int
smap_sysctl_handler(SYSCTL_HANDLER_ARGS)2064 smap_sysctl_handler(SYSCTL_HANDLER_ARGS)
2065 {
2066 struct bios_smap *smapbase;
2067 struct bios_smap_xattr smap;
2068 caddr_t kmdp;
2069 uint32_t *smapattr;
2070 int count, error, i;
2071
2072 /* Retrieve the system memory map from the loader. */
2073 kmdp = preload_search_by_type("elf kernel");
2074 if (kmdp == NULL)
2075 kmdp = preload_search_by_type("elf64 kernel");
2076 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2077 MODINFO_METADATA | MODINFOMD_SMAP);
2078 if (smapbase == NULL)
2079 return (0);
2080 smapattr = (uint32_t *)preload_search_info(kmdp,
2081 MODINFO_METADATA | MODINFOMD_SMAP_XATTR);
2082 count = *((uint32_t *)smapbase - 1) / sizeof(*smapbase);
2083 error = 0;
2084 for (i = 0; i < count; i++) {
2085 smap.base = smapbase[i].base;
2086 smap.length = smapbase[i].length;
2087 smap.type = smapbase[i].type;
2088 if (smapattr != NULL)
2089 smap.xattr = smapattr[i];
2090 else
2091 smap.xattr = 0;
2092 error = SYSCTL_OUT(req, &smap, sizeof(smap));
2093 }
2094 return (error);
2095 }
2096 SYSCTL_PROC(_machdep, OID_AUTO, smap, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2097 smap_sysctl_handler, "S,bios_smap_xattr", "Raw BIOS SMAP data");
2098
2099 static int
efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)2100 efi_map_sysctl_handler(SYSCTL_HANDLER_ARGS)
2101 {
2102 struct efi_map_header *efihdr;
2103 caddr_t kmdp;
2104 uint32_t efisize;
2105
2106 kmdp = preload_search_by_type("elf kernel");
2107 if (kmdp == NULL)
2108 kmdp = preload_search_by_type("elf64 kernel");
2109 efihdr = (struct efi_map_header *)preload_search_info(kmdp,
2110 MODINFO_METADATA | MODINFOMD_EFI_MAP);
2111 if (efihdr == NULL)
2112 return (0);
2113 efisize = *((uint32_t *)efihdr - 1);
2114 return (SYSCTL_OUT(req, efihdr, efisize));
2115 }
2116 SYSCTL_PROC(_machdep, OID_AUTO, efi_map, CTLTYPE_OPAQUE|CTLFLAG_RD, NULL, 0,
2117 efi_map_sysctl_handler, "S,efi_map_header", "Raw EFI Memory Map");
2118
2119 void
spinlock_enter(void)2120 spinlock_enter(void)
2121 {
2122 struct thread *td;
2123 register_t flags;
2124
2125 td = curthread;
2126 if (td->td_md.md_spinlock_count == 0) {
2127 flags = intr_disable();
2128 td->td_md.md_spinlock_count = 1;
2129 td->td_md.md_saved_flags = flags;
2130 } else
2131 td->td_md.md_spinlock_count++;
2132 critical_enter();
2133 }
2134
2135 void
spinlock_exit(void)2136 spinlock_exit(void)
2137 {
2138 struct thread *td;
2139 register_t flags;
2140
2141 td = curthread;
2142 critical_exit();
2143 flags = td->td_md.md_saved_flags;
2144 td->td_md.md_spinlock_count--;
2145 if (td->td_md.md_spinlock_count == 0)
2146 intr_restore(flags);
2147 }
2148
2149 /*
2150 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2151 * we want to start a backtrace from the function that caused us to enter
2152 * the debugger. We have the context in the trapframe, but base the trace
2153 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2154 * enough for a backtrace.
2155 */
2156 void
makectx(struct trapframe * tf,struct pcb * pcb)2157 makectx(struct trapframe *tf, struct pcb *pcb)
2158 {
2159
2160 pcb->pcb_r12 = tf->tf_r12;
2161 pcb->pcb_r13 = tf->tf_r13;
2162 pcb->pcb_r14 = tf->tf_r14;
2163 pcb->pcb_r15 = tf->tf_r15;
2164 pcb->pcb_rbp = tf->tf_rbp;
2165 pcb->pcb_rbx = tf->tf_rbx;
2166 pcb->pcb_rip = tf->tf_rip;
2167 pcb->pcb_rsp = tf->tf_rsp;
2168 }
2169
2170 int
ptrace_set_pc(struct thread * td,unsigned long addr)2171 ptrace_set_pc(struct thread *td, unsigned long addr)
2172 {
2173
2174 td->td_frame->tf_rip = addr;
2175 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2176 return (0);
2177 }
2178
2179 int
ptrace_single_step(struct thread * td)2180 ptrace_single_step(struct thread *td)
2181 {
2182 td->td_frame->tf_rflags |= PSL_T;
2183 return (0);
2184 }
2185
2186 int
ptrace_clear_single_step(struct thread * td)2187 ptrace_clear_single_step(struct thread *td)
2188 {
2189 td->td_frame->tf_rflags &= ~PSL_T;
2190 return (0);
2191 }
2192
2193 int
fill_regs(struct thread * td,struct reg * regs)2194 fill_regs(struct thread *td, struct reg *regs)
2195 {
2196 struct trapframe *tp;
2197
2198 tp = td->td_frame;
2199 return (fill_frame_regs(tp, regs));
2200 }
2201
2202 int
fill_frame_regs(struct trapframe * tp,struct reg * regs)2203 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2204 {
2205 regs->r_r15 = tp->tf_r15;
2206 regs->r_r14 = tp->tf_r14;
2207 regs->r_r13 = tp->tf_r13;
2208 regs->r_r12 = tp->tf_r12;
2209 regs->r_r11 = tp->tf_r11;
2210 regs->r_r10 = tp->tf_r10;
2211 regs->r_r9 = tp->tf_r9;
2212 regs->r_r8 = tp->tf_r8;
2213 regs->r_rdi = tp->tf_rdi;
2214 regs->r_rsi = tp->tf_rsi;
2215 regs->r_rbp = tp->tf_rbp;
2216 regs->r_rbx = tp->tf_rbx;
2217 regs->r_rdx = tp->tf_rdx;
2218 regs->r_rcx = tp->tf_rcx;
2219 regs->r_rax = tp->tf_rax;
2220 regs->r_rip = tp->tf_rip;
2221 regs->r_cs = tp->tf_cs;
2222 regs->r_rflags = tp->tf_rflags;
2223 regs->r_rsp = tp->tf_rsp;
2224 regs->r_ss = tp->tf_ss;
2225 if (tp->tf_flags & TF_HASSEGS) {
2226 regs->r_ds = tp->tf_ds;
2227 regs->r_es = tp->tf_es;
2228 regs->r_fs = tp->tf_fs;
2229 regs->r_gs = tp->tf_gs;
2230 } else {
2231 regs->r_ds = 0;
2232 regs->r_es = 0;
2233 regs->r_fs = 0;
2234 regs->r_gs = 0;
2235 }
2236 return (0);
2237 }
2238
2239 int
set_regs(struct thread * td,struct reg * regs)2240 set_regs(struct thread *td, struct reg *regs)
2241 {
2242 struct trapframe *tp;
2243 register_t rflags;
2244
2245 tp = td->td_frame;
2246 rflags = regs->r_rflags & 0xffffffff;
2247 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
2248 return (EINVAL);
2249 tp->tf_r15 = regs->r_r15;
2250 tp->tf_r14 = regs->r_r14;
2251 tp->tf_r13 = regs->r_r13;
2252 tp->tf_r12 = regs->r_r12;
2253 tp->tf_r11 = regs->r_r11;
2254 tp->tf_r10 = regs->r_r10;
2255 tp->tf_r9 = regs->r_r9;
2256 tp->tf_r8 = regs->r_r8;
2257 tp->tf_rdi = regs->r_rdi;
2258 tp->tf_rsi = regs->r_rsi;
2259 tp->tf_rbp = regs->r_rbp;
2260 tp->tf_rbx = regs->r_rbx;
2261 tp->tf_rdx = regs->r_rdx;
2262 tp->tf_rcx = regs->r_rcx;
2263 tp->tf_rax = regs->r_rax;
2264 tp->tf_rip = regs->r_rip;
2265 tp->tf_cs = regs->r_cs;
2266 tp->tf_rflags = rflags;
2267 tp->tf_rsp = regs->r_rsp;
2268 tp->tf_ss = regs->r_ss;
2269 if (0) { /* XXXKIB */
2270 tp->tf_ds = regs->r_ds;
2271 tp->tf_es = regs->r_es;
2272 tp->tf_fs = regs->r_fs;
2273 tp->tf_gs = regs->r_gs;
2274 tp->tf_flags = TF_HASSEGS;
2275 }
2276 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
2277 return (0);
2278 }
2279
2280 /* XXX check all this stuff! */
2281 /* externalize from sv_xmm */
2282 static void
fill_fpregs_xmm(struct savefpu * sv_xmm,struct fpreg * fpregs)2283 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
2284 {
2285 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2286 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2287 int i;
2288
2289 /* pcb -> fpregs */
2290 bzero(fpregs, sizeof(*fpregs));
2291
2292 /* FPU control/status */
2293 penv_fpreg->en_cw = penv_xmm->en_cw;
2294 penv_fpreg->en_sw = penv_xmm->en_sw;
2295 penv_fpreg->en_tw = penv_xmm->en_tw;
2296 penv_fpreg->en_opcode = penv_xmm->en_opcode;
2297 penv_fpreg->en_rip = penv_xmm->en_rip;
2298 penv_fpreg->en_rdp = penv_xmm->en_rdp;
2299 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
2300 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
2301
2302 /* FPU registers */
2303 for (i = 0; i < 8; ++i)
2304 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
2305
2306 /* SSE registers */
2307 for (i = 0; i < 16; ++i)
2308 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
2309 }
2310
2311 /* internalize from fpregs into sv_xmm */
2312 static void
set_fpregs_xmm(struct fpreg * fpregs,struct savefpu * sv_xmm)2313 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
2314 {
2315 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2316 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
2317 int i;
2318
2319 /* fpregs -> pcb */
2320 /* FPU control/status */
2321 penv_xmm->en_cw = penv_fpreg->en_cw;
2322 penv_xmm->en_sw = penv_fpreg->en_sw;
2323 penv_xmm->en_tw = penv_fpreg->en_tw;
2324 penv_xmm->en_opcode = penv_fpreg->en_opcode;
2325 penv_xmm->en_rip = penv_fpreg->en_rip;
2326 penv_xmm->en_rdp = penv_fpreg->en_rdp;
2327 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
2328 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
2329
2330 /* FPU registers */
2331 for (i = 0; i < 8; ++i)
2332 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
2333
2334 /* SSE registers */
2335 for (i = 0; i < 16; ++i)
2336 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
2337 }
2338
2339 /* externalize from td->pcb */
2340 int
fill_fpregs(struct thread * td,struct fpreg * fpregs)2341 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2342 {
2343
2344 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2345 P_SHOULDSTOP(td->td_proc),
2346 ("not suspended thread %p", td));
2347 fpugetregs(td);
2348 fill_fpregs_xmm(get_pcb_user_save_td(td), fpregs);
2349 return (0);
2350 }
2351
2352 /* internalize to td->pcb */
2353 int
set_fpregs(struct thread * td,struct fpreg * fpregs)2354 set_fpregs(struct thread *td, struct fpreg *fpregs)
2355 {
2356
2357 set_fpregs_xmm(fpregs, get_pcb_user_save_td(td));
2358 fpuuserinited(td);
2359 return (0);
2360 }
2361
2362 /*
2363 * Get machine context.
2364 */
2365 int
get_mcontext(struct thread * td,mcontext_t * mcp,int flags)2366 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2367 {
2368 struct pcb *pcb;
2369 struct trapframe *tp;
2370
2371 pcb = td->td_pcb;
2372 tp = td->td_frame;
2373 PROC_LOCK(curthread->td_proc);
2374 mcp->mc_onstack = sigonstack(tp->tf_rsp);
2375 PROC_UNLOCK(curthread->td_proc);
2376 mcp->mc_r15 = tp->tf_r15;
2377 mcp->mc_r14 = tp->tf_r14;
2378 mcp->mc_r13 = tp->tf_r13;
2379 mcp->mc_r12 = tp->tf_r12;
2380 mcp->mc_r11 = tp->tf_r11;
2381 mcp->mc_r10 = tp->tf_r10;
2382 mcp->mc_r9 = tp->tf_r9;
2383 mcp->mc_r8 = tp->tf_r8;
2384 mcp->mc_rdi = tp->tf_rdi;
2385 mcp->mc_rsi = tp->tf_rsi;
2386 mcp->mc_rbp = tp->tf_rbp;
2387 mcp->mc_rbx = tp->tf_rbx;
2388 mcp->mc_rcx = tp->tf_rcx;
2389 mcp->mc_rflags = tp->tf_rflags;
2390 if (flags & GET_MC_CLEAR_RET) {
2391 mcp->mc_rax = 0;
2392 mcp->mc_rdx = 0;
2393 mcp->mc_rflags &= ~PSL_C;
2394 } else {
2395 mcp->mc_rax = tp->tf_rax;
2396 mcp->mc_rdx = tp->tf_rdx;
2397 }
2398 mcp->mc_rip = tp->tf_rip;
2399 mcp->mc_cs = tp->tf_cs;
2400 mcp->mc_rsp = tp->tf_rsp;
2401 mcp->mc_ss = tp->tf_ss;
2402 mcp->mc_ds = tp->tf_ds;
2403 mcp->mc_es = tp->tf_es;
2404 mcp->mc_fs = tp->tf_fs;
2405 mcp->mc_gs = tp->tf_gs;
2406 mcp->mc_flags = tp->tf_flags;
2407 mcp->mc_len = sizeof(*mcp);
2408 get_fpcontext(td, mcp, NULL, 0);
2409 mcp->mc_fsbase = pcb->pcb_fsbase;
2410 mcp->mc_gsbase = pcb->pcb_gsbase;
2411 mcp->mc_xfpustate = 0;
2412 mcp->mc_xfpustate_len = 0;
2413 bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
2414 return (0);
2415 }
2416
2417 /*
2418 * Set machine context.
2419 *
2420 * However, we don't set any but the user modifiable flags, and we won't
2421 * touch the cs selector.
2422 */
2423 int
set_mcontext(struct thread * td,mcontext_t * mcp)2424 set_mcontext(struct thread *td, mcontext_t *mcp)
2425 {
2426 struct pcb *pcb;
2427 struct trapframe *tp;
2428 char *xfpustate;
2429 long rflags;
2430 int ret;
2431
2432 pcb = td->td_pcb;
2433 tp = td->td_frame;
2434 if (mcp->mc_len != sizeof(*mcp) ||
2435 (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
2436 return (EINVAL);
2437 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
2438 (tp->tf_rflags & ~PSL_USERCHANGE);
2439 if (mcp->mc_flags & _MC_HASFPXSTATE) {
2440 if (mcp->mc_xfpustate_len > cpu_max_ext_state_size -
2441 sizeof(struct savefpu))
2442 return (EINVAL);
2443 xfpustate = __builtin_alloca(mcp->mc_xfpustate_len);
2444 ret = copyin((void *)mcp->mc_xfpustate, xfpustate,
2445 mcp->mc_xfpustate_len);
2446 if (ret != 0)
2447 return (ret);
2448 } else
2449 xfpustate = NULL;
2450 ret = set_fpcontext(td, mcp, xfpustate, mcp->mc_xfpustate_len);
2451 if (ret != 0)
2452 return (ret);
2453 tp->tf_r15 = mcp->mc_r15;
2454 tp->tf_r14 = mcp->mc_r14;
2455 tp->tf_r13 = mcp->mc_r13;
2456 tp->tf_r12 = mcp->mc_r12;
2457 tp->tf_r11 = mcp->mc_r11;
2458 tp->tf_r10 = mcp->mc_r10;
2459 tp->tf_r9 = mcp->mc_r9;
2460 tp->tf_r8 = mcp->mc_r8;
2461 tp->tf_rdi = mcp->mc_rdi;
2462 tp->tf_rsi = mcp->mc_rsi;
2463 tp->tf_rbp = mcp->mc_rbp;
2464 tp->tf_rbx = mcp->mc_rbx;
2465 tp->tf_rdx = mcp->mc_rdx;
2466 tp->tf_rcx = mcp->mc_rcx;
2467 tp->tf_rax = mcp->mc_rax;
2468 tp->tf_rip = mcp->mc_rip;
2469 tp->tf_rflags = rflags;
2470 tp->tf_rsp = mcp->mc_rsp;
2471 tp->tf_ss = mcp->mc_ss;
2472 tp->tf_flags = mcp->mc_flags;
2473 if (tp->tf_flags & TF_HASSEGS) {
2474 tp->tf_ds = mcp->mc_ds;
2475 tp->tf_es = mcp->mc_es;
2476 tp->tf_fs = mcp->mc_fs;
2477 tp->tf_gs = mcp->mc_gs;
2478 }
2479 if (mcp->mc_flags & _MC_HASBASES) {
2480 pcb->pcb_fsbase = mcp->mc_fsbase;
2481 pcb->pcb_gsbase = mcp->mc_gsbase;
2482 }
2483 set_pcb_flags(pcb, PCB_FULL_IRET);
2484 return (0);
2485 }
2486
2487 static void
get_fpcontext(struct thread * td,mcontext_t * mcp,char * xfpusave,size_t xfpusave_len)2488 get_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpusave,
2489 size_t xfpusave_len)
2490 {
2491 size_t max_len, len;
2492
2493 mcp->mc_ownedfp = fpugetregs(td);
2494 bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate[0],
2495 sizeof(mcp->mc_fpstate));
2496 mcp->mc_fpformat = fpuformat();
2497 if (!use_xsave || xfpusave_len == 0)
2498 return;
2499 max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
2500 len = xfpusave_len;
2501 if (len > max_len) {
2502 len = max_len;
2503 bzero(xfpusave + max_len, len - max_len);
2504 }
2505 mcp->mc_flags |= _MC_HASFPXSTATE;
2506 mcp->mc_xfpustate_len = len;
2507 bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
2508 }
2509
2510 static int
set_fpcontext(struct thread * td,mcontext_t * mcp,char * xfpustate,size_t xfpustate_len)2511 set_fpcontext(struct thread *td, mcontext_t *mcp, char *xfpustate,
2512 size_t xfpustate_len)
2513 {
2514 struct savefpu *fpstate;
2515 int error;
2516
2517 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2518 return (0);
2519 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
2520 return (EINVAL);
2521 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) {
2522 /* We don't care what state is left in the FPU or PCB. */
2523 fpstate_drop(td);
2524 error = 0;
2525 } else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2526 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2527 fpstate = (struct savefpu *)&mcp->mc_fpstate;
2528 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
2529 error = fpusetregs(td, fpstate, xfpustate, xfpustate_len);
2530 } else
2531 return (EINVAL);
2532 return (error);
2533 }
2534
2535 void
fpstate_drop(struct thread * td)2536 fpstate_drop(struct thread *td)
2537 {
2538
2539 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2540 critical_enter();
2541 if (PCPU_GET(fpcurthread) == td)
2542 fpudrop();
2543 /*
2544 * XXX force a full drop of the fpu. The above only drops it if we
2545 * owned it.
2546 *
2547 * XXX I don't much like fpugetuserregs()'s semantics of doing a full
2548 * drop. Dropping only to the pcb matches fnsave's behaviour.
2549 * We only need to drop to !PCB_INITDONE in sendsig(). But
2550 * sendsig() is the only caller of fpugetuserregs()... perhaps we just
2551 * have too many layers.
2552 */
2553 clear_pcb_flags(curthread->td_pcb,
2554 PCB_FPUINITDONE | PCB_USERFPUINITDONE);
2555 critical_exit();
2556 }
2557
2558 int
fill_dbregs(struct thread * td,struct dbreg * dbregs)2559 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2560 {
2561 struct pcb *pcb;
2562
2563 if (td == NULL) {
2564 dbregs->dr[0] = rdr0();
2565 dbregs->dr[1] = rdr1();
2566 dbregs->dr[2] = rdr2();
2567 dbregs->dr[3] = rdr3();
2568 dbregs->dr[6] = rdr6();
2569 dbregs->dr[7] = rdr7();
2570 } else {
2571 pcb = td->td_pcb;
2572 dbregs->dr[0] = pcb->pcb_dr0;
2573 dbregs->dr[1] = pcb->pcb_dr1;
2574 dbregs->dr[2] = pcb->pcb_dr2;
2575 dbregs->dr[3] = pcb->pcb_dr3;
2576 dbregs->dr[6] = pcb->pcb_dr6;
2577 dbregs->dr[7] = pcb->pcb_dr7;
2578 }
2579 dbregs->dr[4] = 0;
2580 dbregs->dr[5] = 0;
2581 dbregs->dr[8] = 0;
2582 dbregs->dr[9] = 0;
2583 dbregs->dr[10] = 0;
2584 dbregs->dr[11] = 0;
2585 dbregs->dr[12] = 0;
2586 dbregs->dr[13] = 0;
2587 dbregs->dr[14] = 0;
2588 dbregs->dr[15] = 0;
2589 return (0);
2590 }
2591
2592 int
set_dbregs(struct thread * td,struct dbreg * dbregs)2593 set_dbregs(struct thread *td, struct dbreg *dbregs)
2594 {
2595 struct pcb *pcb;
2596 int i;
2597
2598 if (td == NULL) {
2599 load_dr0(dbregs->dr[0]);
2600 load_dr1(dbregs->dr[1]);
2601 load_dr2(dbregs->dr[2]);
2602 load_dr3(dbregs->dr[3]);
2603 load_dr6(dbregs->dr[6]);
2604 load_dr7(dbregs->dr[7]);
2605 } else {
2606 /*
2607 * Don't let an illegal value for dr7 get set. Specifically,
2608 * check for undefined settings. Setting these bit patterns
2609 * result in undefined behaviour and can lead to an unexpected
2610 * TRCTRAP or a general protection fault right here.
2611 * Upper bits of dr6 and dr7 must not be set
2612 */
2613 for (i = 0; i < 4; i++) {
2614 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2615 return (EINVAL);
2616 if (td->td_frame->tf_cs == _ucode32sel &&
2617 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
2618 return (EINVAL);
2619 }
2620 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
2621 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
2622 return (EINVAL);
2623
2624 pcb = td->td_pcb;
2625
2626 /*
2627 * Don't let a process set a breakpoint that is not within the
2628 * process's address space. If a process could do this, it
2629 * could halt the system by setting a breakpoint in the kernel
2630 * (if ddb was enabled). Thus, we need to check to make sure
2631 * that no breakpoints are being enabled for addresses outside
2632 * process's address space.
2633 *
2634 * XXX - what about when the watched area of the user's
2635 * address space is written into from within the kernel
2636 * ... wouldn't that still cause a breakpoint to be generated
2637 * from within kernel mode?
2638 */
2639
2640 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2641 /* dr0 is enabled */
2642 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2643 return (EINVAL);
2644 }
2645 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2646 /* dr1 is enabled */
2647 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2648 return (EINVAL);
2649 }
2650 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2651 /* dr2 is enabled */
2652 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2653 return (EINVAL);
2654 }
2655 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2656 /* dr3 is enabled */
2657 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2658 return (EINVAL);
2659 }
2660
2661 pcb->pcb_dr0 = dbregs->dr[0];
2662 pcb->pcb_dr1 = dbregs->dr[1];
2663 pcb->pcb_dr2 = dbregs->dr[2];
2664 pcb->pcb_dr3 = dbregs->dr[3];
2665 pcb->pcb_dr6 = dbregs->dr[6];
2666 pcb->pcb_dr7 = dbregs->dr[7];
2667
2668 set_pcb_flags(pcb, PCB_DBREGS);
2669 }
2670
2671 return (0);
2672 }
2673
2674 void
reset_dbregs(void)2675 reset_dbregs(void)
2676 {
2677
2678 load_dr7(0); /* Turn off the control bits first */
2679 load_dr0(0);
2680 load_dr1(0);
2681 load_dr2(0);
2682 load_dr3(0);
2683 load_dr6(0);
2684 }
2685
2686 /*
2687 * Return > 0 if a hardware breakpoint has been hit, and the
2688 * breakpoint was in user space. Return 0, otherwise.
2689 */
2690 int
user_dbreg_trap(void)2691 user_dbreg_trap(void)
2692 {
2693 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2694 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2695 int nbp; /* number of breakpoints that triggered */
2696 caddr_t addr[4]; /* breakpoint addresses */
2697 int i;
2698
2699 dr7 = rdr7();
2700 if ((dr7 & 0x000000ff) == 0) {
2701 /*
2702 * all GE and LE bits in the dr7 register are zero,
2703 * thus the trap couldn't have been caused by the
2704 * hardware debug registers
2705 */
2706 return 0;
2707 }
2708
2709 nbp = 0;
2710 dr6 = rdr6();
2711 bp = dr6 & 0x0000000f;
2712
2713 if (!bp) {
2714 /*
2715 * None of the breakpoint bits are set meaning this
2716 * trap was not caused by any of the debug registers
2717 */
2718 return 0;
2719 }
2720
2721 /*
2722 * at least one of the breakpoints were hit, check to see
2723 * which ones and if any of them are user space addresses
2724 */
2725
2726 if (bp & 0x01) {
2727 addr[nbp++] = (caddr_t)rdr0();
2728 }
2729 if (bp & 0x02) {
2730 addr[nbp++] = (caddr_t)rdr1();
2731 }
2732 if (bp & 0x04) {
2733 addr[nbp++] = (caddr_t)rdr2();
2734 }
2735 if (bp & 0x08) {
2736 addr[nbp++] = (caddr_t)rdr3();
2737 }
2738
2739 for (i = 0; i < nbp; i++) {
2740 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2741 /*
2742 * addr[i] is in user space
2743 */
2744 return nbp;
2745 }
2746 }
2747
2748 /*
2749 * None of the breakpoints are in user space.
2750 */
2751 return 0;
2752 }
2753
2754 #ifdef KDB
2755
2756 /*
2757 * Provide inb() and outb() as functions. They are normally only available as
2758 * inline functions, thus cannot be called from the debugger.
2759 */
2760
2761 /* silence compiler warnings */
2762 u_char inb_(u_short);
2763 void outb_(u_short, u_char);
2764
2765 u_char
inb_(u_short port)2766 inb_(u_short port)
2767 {
2768 return inb(port);
2769 }
2770
2771 void
outb_(u_short port,u_char data)2772 outb_(u_short port, u_char data)
2773 {
2774 outb(port, data);
2775 }
2776
2777 #endif /* KDB */
2778