1 /* $NetBSD: spi.c,v 1.26 2022/05/17 05:05:20 andvar Exp $ */
2
3 /*-
4 * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5 * Copyright (c) 2006 Garrett D'Amore.
6 * All rights reserved.
7 *
8 * Portions of this code were written by Garrett D'Amore for the
9 * Champaign-Urbana Community Wireless Network Project.
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer in the documentation and/or other materials provided
19 * with the distribution.
20 * 3. All advertising materials mentioning features or use of this
21 * software must display the following acknowledgements:
22 * This product includes software developed by the Urbana-Champaign
23 * Independent Media Center.
24 * This product includes software developed by Garrett D'Amore.
25 * 4. Urbana-Champaign Independent Media Center's name and Garrett
26 * D'Amore's name may not be used to endorse or promote products
27 * derived from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30 * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34 * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 */
43
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.26 2022/05/17 05:05:20 andvar Exp $");
46
47 #include "locators.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/device.h>
52 #include <sys/conf.h>
53 #include <sys/malloc.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/errno.h>
57
58 #include <dev/spi/spivar.h>
59 #include <dev/spi/spi_io.h>
60
61 #include "ioconf.h"
62 #include "locators.h"
63
64 struct spi_softc {
65 device_t sc_dev;
66 struct spi_controller sc_controller;
67 int sc_mode;
68 int sc_speed;
69 int sc_slave;
70 int sc_nslaves;
71 struct spi_handle *sc_slaves;
72 kmutex_t sc_lock;
73 kcondvar_t sc_cv;
74 kmutex_t sc_dev_lock;
75 int sc_flags;
76 #define SPIC_BUSY 1
77 };
78
79 static dev_type_open(spi_open);
80 static dev_type_close(spi_close);
81 static dev_type_ioctl(spi_ioctl);
82
83 const struct cdevsw spi_cdevsw = {
84 .d_open = spi_open,
85 .d_close = spi_close,
86 .d_read = noread,
87 .d_write = nowrite,
88 .d_ioctl = spi_ioctl,
89 .d_stop = nostop,
90 .d_tty = notty,
91 .d_poll = nopoll,
92 .d_mmap = nommap,
93 .d_kqfilter = nokqfilter,
94 .d_discard = nodiscard,
95 .d_flag = D_OTHER | D_MPSAFE
96 };
97
98 /*
99 * SPI slave device. We have one of these per slave.
100 */
101 struct spi_handle {
102 struct spi_softc *sh_sc;
103 struct spi_controller *sh_controller;
104 int sh_slave;
105 int sh_mode;
106 int sh_speed;
107 int sh_flags;
108 #define SPIH_ATTACHED 1
109 };
110
111 #define SPI_MAXDATA 4096
112
113 /*
114 * API for bus drivers.
115 */
116
117 int
spibus_print(void * aux,const char * pnp)118 spibus_print(void *aux, const char *pnp)
119 {
120
121 if (pnp != NULL)
122 aprint_normal("spi at %s", pnp);
123
124 return (UNCONF);
125 }
126
127
128 static int
spi_match(device_t parent,cfdata_t cf,void * aux)129 spi_match(device_t parent, cfdata_t cf, void *aux)
130 {
131
132 return 1;
133 }
134
135 static int
spi_print(void * aux,const char * pnp)136 spi_print(void *aux, const char *pnp)
137 {
138 struct spi_attach_args *sa = aux;
139
140 if (sa->sa_handle->sh_slave != -1)
141 aprint_normal(" slave %d", sa->sa_handle->sh_slave);
142
143 return (UNCONF);
144 }
145
146 static int
spi_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)147 spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
148 {
149 struct spi_softc *sc = device_private(parent);
150 struct spi_attach_args sa;
151 int addr;
152
153 addr = cf->cf_loc[SPICF_SLAVE];
154 if ((addr < 0) || (addr >= sc->sc_controller.sct_nslaves)) {
155 return -1;
156 }
157
158 memset(&sa, 0, sizeof sa);
159 sa.sa_handle = &sc->sc_slaves[addr];
160 if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
161 return -1;
162
163 if (config_probe(parent, cf, &sa)) {
164 SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
165 config_attach(parent, cf, &sa, spi_print, CFARGS_NONE);
166 }
167
168 return 0;
169 }
170
171 /*
172 * XXX this is the same as i2c_fill_compat. It could be refactored into a
173 * common fill_compat function with pointers to compat & ncompat instead
174 * of attach_args as the first parameter.
175 */
176 static void
spi_fill_compat(struct spi_attach_args * sa,const char * compat,size_t len,char ** buffer)177 spi_fill_compat(struct spi_attach_args *sa, const char *compat, size_t len,
178 char **buffer)
179 {
180 int count, i;
181 const char *c, *start, **ptr;
182
183 *buffer = NULL;
184 for (i = count = 0, c = compat; i < len; i++, c++)
185 if (*c == 0)
186 count++;
187 count += 2;
188 ptr = malloc(sizeof(char*)*count, M_TEMP, M_WAITOK);
189 if (!ptr)
190 return;
191
192 for (i = count = 0, start = c = compat; i < len; i++, c++) {
193 if (*c == 0) {
194 ptr[count++] = start;
195 start = c + 1;
196 }
197 }
198 if (start < compat + len) {
199 /* last string not 0 terminated */
200 size_t l = c - start;
201 *buffer = malloc(l + 1, M_TEMP, M_WAITOK);
202 memcpy(*buffer, start, l);
203 (*buffer)[l] = 0;
204 ptr[count++] = *buffer;
205 }
206 ptr[count] = NULL;
207
208 sa->sa_compat = ptr;
209 sa->sa_ncompat = count;
210 }
211
212 static void
spi_direct_attach_child_devices(device_t parent,struct spi_softc * sc,prop_array_t child_devices)213 spi_direct_attach_child_devices(device_t parent, struct spi_softc *sc,
214 prop_array_t child_devices)
215 {
216 unsigned int count;
217 prop_dictionary_t child;
218 prop_data_t cdata;
219 uint32_t slave;
220 uint64_t cookie;
221 struct spi_attach_args sa;
222 int loc[SPICF_NLOCS];
223 char *buf;
224 int i;
225
226 memset(loc, 0, sizeof loc);
227 count = prop_array_count(child_devices);
228 for (i = 0; i < count; i++) {
229 child = prop_array_get(child_devices, i);
230 if (!child)
231 continue;
232 if (!prop_dictionary_get_uint32(child, "slave", &slave))
233 continue;
234 if(slave >= sc->sc_controller.sct_nslaves)
235 continue;
236 if (!prop_dictionary_get_uint64(child, "cookie", &cookie))
237 continue;
238 if (!(cdata = prop_dictionary_get(child, "compatible")))
239 continue;
240 loc[SPICF_SLAVE] = slave;
241
242 memset(&sa, 0, sizeof sa);
243 sa.sa_handle = &sc->sc_slaves[i];
244 sa.sa_prop = child;
245 sa.sa_cookie = cookie;
246 if (ISSET(sa.sa_handle->sh_flags, SPIH_ATTACHED))
247 continue;
248 SET(sa.sa_handle->sh_flags, SPIH_ATTACHED);
249
250 buf = NULL;
251 spi_fill_compat(&sa,
252 prop_data_value(cdata),
253 prop_data_size(cdata), &buf);
254 config_found(parent, &sa, spi_print,
255 CFARGS(.locators = loc));
256
257 if (sa.sa_compat)
258 free(sa.sa_compat, M_TEMP);
259 if (buf)
260 free(buf, M_TEMP);
261 }
262 }
263
264 int
spi_compatible_match(const struct spi_attach_args * sa,const cfdata_t cf,const struct device_compatible_entry * compats)265 spi_compatible_match(const struct spi_attach_args *sa, const cfdata_t cf,
266 const struct device_compatible_entry *compats)
267 {
268 if (sa->sa_ncompat > 0)
269 return device_compatible_match(sa->sa_compat, sa->sa_ncompat,
270 compats);
271
272 return 1;
273 }
274
275 const struct device_compatible_entry *
spi_compatible_lookup(const struct spi_attach_args * sa,const struct device_compatible_entry * compats)276 spi_compatible_lookup(const struct spi_attach_args *sa,
277 const struct device_compatible_entry *compats)
278 {
279 return device_compatible_lookup(sa->sa_compat, sa->sa_ncompat,
280 compats);
281 }
282
283 /*
284 * API for device drivers.
285 *
286 * We provide wrapper routines to decouple the ABI for the SPI
287 * device drivers from the ABI for the SPI bus drivers.
288 */
289 static void
spi_attach(device_t parent,device_t self,void * aux)290 spi_attach(device_t parent, device_t self, void *aux)
291 {
292 struct spi_softc *sc = device_private(self);
293 struct spibus_attach_args *sba = aux;
294 int i;
295
296 aprint_naive(": SPI bus\n");
297 aprint_normal(": SPI bus\n");
298
299 mutex_init(&sc->sc_dev_lock, MUTEX_DEFAULT, IPL_NONE);
300 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
301 cv_init(&sc->sc_cv, "spictl");
302
303 sc->sc_dev = self;
304 sc->sc_controller = *sba->sba_controller;
305 sc->sc_nslaves = sba->sba_controller->sct_nslaves;
306 /* allocate slave structures */
307 sc->sc_slaves = malloc(sizeof (struct spi_handle) * sc->sc_nslaves,
308 M_DEVBUF, M_WAITOK | M_ZERO);
309
310 sc->sc_speed = 0;
311 sc->sc_mode = -1;
312 sc->sc_slave = -1;
313
314 /*
315 * Initialize slave handles
316 */
317 for (i = 0; i < sc->sc_nslaves; i++) {
318 sc->sc_slaves[i].sh_slave = i;
319 sc->sc_slaves[i].sh_sc = sc;
320 sc->sc_slaves[i].sh_controller = &sc->sc_controller;
321 }
322
323 /* First attach devices known to be present via fdt */
324 if (sba->sba_child_devices) {
325 spi_direct_attach_child_devices(self, sc, sba->sba_child_devices);
326 }
327 /* Then do any other devices the user may have manually wired */
328 config_search(self, NULL,
329 CFARGS(.search = spi_search));
330 }
331
332 static int
spi_open(dev_t dev,int flag,int fmt,lwp_t * l)333 spi_open(dev_t dev, int flag, int fmt, lwp_t *l)
334 {
335 struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
336
337 if (sc == NULL)
338 return ENXIO;
339
340 return 0;
341 }
342
343 static int
spi_close(dev_t dev,int flag,int fmt,lwp_t * l)344 spi_close(dev_t dev, int flag, int fmt, lwp_t *l)
345 {
346
347 return 0;
348 }
349
350 static int
spi_ioctl(dev_t dev,u_long cmd,void * data,int flag,lwp_t * l)351 spi_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
352 {
353 struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
354 struct spi_handle *sh;
355 spi_ioctl_configure_t *sic;
356 spi_ioctl_transfer_t *sit;
357 uint8_t *sbuf, *rbuf;
358 int error;
359
360 if (sc == NULL)
361 return ENXIO;
362
363 mutex_enter(&sc->sc_dev_lock);
364
365 switch (cmd) {
366 case SPI_IOCTL_CONFIGURE:
367 sic = (spi_ioctl_configure_t *)data;
368 if (sic->sic_addr < 0 || sic->sic_addr >= sc->sc_nslaves) {
369 error = EINVAL;
370 break;
371 }
372 sh = &sc->sc_slaves[sic->sic_addr];
373 error = spi_configure(sc->sc_dev, sh, sic->sic_mode,
374 sic->sic_speed);
375 break;
376 case SPI_IOCTL_TRANSFER:
377 sit = (spi_ioctl_transfer_t *)data;
378 if (sit->sit_addr < 0 || sit->sit_addr >= sc->sc_nslaves) {
379 error = EINVAL;
380 break;
381 }
382 if ((sit->sit_send && sit->sit_sendlen == 0)
383 || (sit->sit_recv && sit->sit_recvlen == 0)) {
384 error = EINVAL;
385 break;
386 }
387 sh = &sc->sc_slaves[sit->sit_addr];
388 sbuf = rbuf = NULL;
389 error = 0;
390 if (sit->sit_send && sit->sit_sendlen <= SPI_MAXDATA) {
391 sbuf = malloc(sit->sit_sendlen, M_DEVBUF, M_WAITOK);
392 error = copyin(sit->sit_send, sbuf, sit->sit_sendlen);
393 }
394 if (sit->sit_recv && sit->sit_recvlen <= SPI_MAXDATA) {
395 rbuf = malloc(sit->sit_recvlen, M_DEVBUF, M_WAITOK);
396 }
397 if (error == 0) {
398 if (sbuf && rbuf)
399 error = spi_send_recv(sh,
400 sit->sit_sendlen, sbuf,
401 sit->sit_recvlen, rbuf);
402 else if (sbuf)
403 error = spi_send(sh,
404 sit->sit_sendlen, sbuf);
405 else if (rbuf)
406 error = spi_recv(sh,
407 sit->sit_recvlen, rbuf);
408 }
409 if (rbuf) {
410 if (error == 0)
411 error = copyout(rbuf, sit->sit_recv,
412 sit->sit_recvlen);
413 free(rbuf, M_DEVBUF);
414 }
415 if (sbuf) {
416 free(sbuf, M_DEVBUF);
417 }
418 break;
419 default:
420 error = ENODEV;
421 break;
422 }
423
424 mutex_exit(&sc->sc_dev_lock);
425
426 return error;
427 }
428
429 CFATTACH_DECL_NEW(spi, sizeof(struct spi_softc),
430 spi_match, spi_attach, NULL, NULL);
431
432 /*
433 * Configure. This should be the first thing that the SPI driver
434 * should do, to configure which mode (e.g. SPI_MODE_0, which is the
435 * same as Philips Microwire mode), and speed. If the bus driver
436 * cannot run fast enough, then it should just configure the fastest
437 * mode that it can support. If the bus driver cannot run slow
438 * enough, then the device is incompatible and an error should be
439 * returned.
440 */
441 int
spi_configure(device_t dev __unused,struct spi_handle * sh,int mode,int speed)442 spi_configure(device_t dev __unused, struct spi_handle *sh, int mode, int speed)
443 {
444
445 sh->sh_mode = mode;
446 sh->sh_speed = speed;
447
448 /* No need to report errors; no failures. */
449
450 return 0;
451 }
452
453 /*
454 * Acquire controller
455 */
456 static void
spi_acquire(struct spi_handle * sh)457 spi_acquire(struct spi_handle *sh)
458 {
459 struct spi_softc *sc = sh->sh_sc;
460
461 mutex_enter(&sc->sc_lock);
462 while ((sc->sc_flags & SPIC_BUSY) != 0)
463 cv_wait(&sc->sc_cv, &sc->sc_lock);
464 sc->sc_flags |= SPIC_BUSY;
465 mutex_exit(&sc->sc_lock);
466 }
467
468 /*
469 * Release controller
470 */
471 static void
spi_release(struct spi_handle * sh)472 spi_release(struct spi_handle *sh)
473 {
474 struct spi_softc *sc = sh->sh_sc;
475
476 mutex_enter(&sc->sc_lock);
477 sc->sc_flags &= ~SPIC_BUSY;
478 cv_broadcast(&sc->sc_cv);
479 mutex_exit(&sc->sc_lock);
480 }
481
482 void
spi_transfer_init(struct spi_transfer * st)483 spi_transfer_init(struct spi_transfer *st)
484 {
485
486 mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
487 cv_init(&st->st_cv, "spixfr");
488
489 st->st_flags = 0;
490 st->st_errno = 0;
491 st->st_done = NULL;
492 st->st_chunks = NULL;
493 st->st_private = NULL;
494 st->st_slave = -1;
495 }
496
497 void
spi_chunk_init(struct spi_chunk * chunk,int cnt,const uint8_t * wptr,uint8_t * rptr)498 spi_chunk_init(struct spi_chunk *chunk, int cnt, const uint8_t *wptr,
499 uint8_t *rptr)
500 {
501
502 chunk->chunk_write = chunk->chunk_wptr = wptr;
503 chunk->chunk_read = chunk->chunk_rptr = rptr;
504 chunk->chunk_rresid = chunk->chunk_wresid = chunk->chunk_count = cnt;
505 chunk->chunk_next = NULL;
506 }
507
508 void
spi_transfer_add(struct spi_transfer * st,struct spi_chunk * chunk)509 spi_transfer_add(struct spi_transfer *st, struct spi_chunk *chunk)
510 {
511 struct spi_chunk **cpp;
512
513 /* this is an O(n) insert -- perhaps we should use a simpleq? */
514 for (cpp = &st->st_chunks; *cpp; cpp = &(*cpp)->chunk_next);
515 *cpp = chunk;
516 }
517
518 int
spi_transfer(struct spi_handle * sh,struct spi_transfer * st)519 spi_transfer(struct spi_handle *sh, struct spi_transfer *st)
520 {
521 struct spi_softc *sc = sh->sh_sc;
522 struct spi_controller *tag = sh->sh_controller;
523 struct spi_chunk *chunk;
524 int error;
525
526 /*
527 * Initialize "resid" counters and pointers, so that callers
528 * and bus drivers don't have to.
529 */
530 for (chunk = st->st_chunks; chunk; chunk = chunk->chunk_next) {
531 chunk->chunk_wresid = chunk->chunk_rresid = chunk->chunk_count;
532 chunk->chunk_wptr = chunk->chunk_write;
533 chunk->chunk_rptr = chunk->chunk_read;
534 }
535
536 /*
537 * Match slave and parameters to handle
538 */
539 st->st_slave = sh->sh_slave;
540
541 /*
542 * Reserve controller during transaction
543 */
544 spi_acquire(sh);
545
546 st->st_spiprivate = (void *)sh;
547
548 /*
549 * Reconfigure controller
550 *
551 * XXX backends don't configure per-slave parameters
552 * Whenever we switch slaves or change mode or speed, we
553 * need to tell the backend.
554 */
555 if (sc->sc_slave != sh->sh_slave
556 || sc->sc_mode != sh->sh_mode
557 || sc->sc_speed != sh->sh_speed) {
558 error = (*tag->sct_configure)(tag->sct_cookie,
559 sh->sh_slave, sh->sh_mode, sh->sh_speed);
560 if (error)
561 return error;
562 }
563 sc->sc_mode = sh->sh_mode;
564 sc->sc_speed = sh->sh_speed;
565 sc->sc_slave = sh->sh_slave;
566
567 error = (*tag->sct_transfer)(tag->sct_cookie, st);
568
569 return error;
570 }
571
572 void
spi_wait(struct spi_transfer * st)573 spi_wait(struct spi_transfer *st)
574 {
575 struct spi_handle *sh = st->st_spiprivate;
576
577 mutex_enter(&st->st_lock);
578 while (!(st->st_flags & SPI_F_DONE)) {
579 cv_wait(&st->st_cv, &st->st_lock);
580 }
581 mutex_exit(&st->st_lock);
582 cv_destroy(&st->st_cv);
583 mutex_destroy(&st->st_lock);
584
585 /*
586 * End transaction
587 */
588 spi_release(sh);
589 }
590
591 void
spi_done(struct spi_transfer * st,int err)592 spi_done(struct spi_transfer *st, int err)
593 {
594
595 mutex_enter(&st->st_lock);
596 if ((st->st_errno = err) != 0) {
597 st->st_flags |= SPI_F_ERROR;
598 }
599 st->st_flags |= SPI_F_DONE;
600 if (st->st_done != NULL) {
601 (*st->st_done)(st);
602 } else {
603 cv_broadcast(&st->st_cv);
604 }
605 mutex_exit(&st->st_lock);
606 }
607
608 /*
609 * Some convenience routines. These routines block until the work
610 * is done.
611 *
612 * spi_recv - receives data from the bus
613 *
614 * spi_send - sends data to the bus
615 *
616 * spi_send_recv - sends data to the bus, and then receives. Note that this is
617 * done synchronously, i.e. send a command and get the response. This is
618 * not full duplex. If you want full duplex, you can't use these convenience
619 * wrappers.
620 */
621 int
spi_recv(struct spi_handle * sh,int cnt,uint8_t * data)622 spi_recv(struct spi_handle *sh, int cnt, uint8_t *data)
623 {
624 struct spi_transfer trans;
625 struct spi_chunk chunk;
626
627 spi_transfer_init(&trans);
628 spi_chunk_init(&chunk, cnt, NULL, data);
629 spi_transfer_add(&trans, &chunk);
630
631 /* enqueue it and wait for it to complete */
632 spi_transfer(sh, &trans);
633 spi_wait(&trans);
634
635 if (trans.st_flags & SPI_F_ERROR)
636 return trans.st_errno;
637
638 return 0;
639 }
640
641 int
spi_send(struct spi_handle * sh,int cnt,const uint8_t * data)642 spi_send(struct spi_handle *sh, int cnt, const uint8_t *data)
643 {
644 struct spi_transfer trans;
645 struct spi_chunk chunk;
646
647 spi_transfer_init(&trans);
648 spi_chunk_init(&chunk, cnt, data, NULL);
649 spi_transfer_add(&trans, &chunk);
650
651 /* enqueue it and wait for it to complete */
652 spi_transfer(sh, &trans);
653 spi_wait(&trans);
654
655 if (trans.st_flags & SPI_F_ERROR)
656 return trans.st_errno;
657
658 return 0;
659 }
660
661 int
spi_send_recv(struct spi_handle * sh,int scnt,const uint8_t * snd,int rcnt,uint8_t * rcv)662 spi_send_recv(struct spi_handle *sh, int scnt, const uint8_t *snd,
663 int rcnt, uint8_t *rcv)
664 {
665 struct spi_transfer trans;
666 struct spi_chunk chunk1, chunk2;
667
668 spi_transfer_init(&trans);
669 spi_chunk_init(&chunk1, scnt, snd, NULL);
670 spi_chunk_init(&chunk2, rcnt, NULL, rcv);
671 spi_transfer_add(&trans, &chunk1);
672 spi_transfer_add(&trans, &chunk2);
673
674 /* enqueue it and wait for it to complete */
675 spi_transfer(sh, &trans);
676 spi_wait(&trans);
677
678 if (trans.st_flags & SPI_F_ERROR)
679 return trans.st_errno;
680
681 return 0;
682 }
683