1 /* $NetBSD: schizovar.h,v 1.7 2015/11/23 21:40:14 jdc Exp $ */ 2 /* $OpenBSD: schizovar.h,v 1.10 2007/01/14 16:19:49 kettenis Exp $ */ 3 4 /* 5 * Copyright (c) 2002 Jason L. Wright (jason@thought.net) 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 struct schizo_pbm { 31 struct schizo_softc *sp_sc; 32 33 struct schizo_range *sp_range; 34 pci_chipset_tag_t sp_pc; 35 int sp_nreg; 36 int sp_nrange; 37 int sp_nintmap; 38 39 bus_space_tag_t sp_memt; 40 bus_space_tag_t sp_iot; 41 bus_space_tag_t sp_regt; 42 bus_space_handle_t sp_regh; 43 bus_space_handle_t sp_intrh; 44 bus_space_tag_t sp_cfgt; 45 bus_space_handle_t sp_cfgh; 46 bus_dma_tag_t sp_dmat; 47 int sp_bus; 48 int sp_flags; 49 int sp_bus_a; 50 struct iommu_state sp_is; 51 struct strbuf_ctl sp_sb; 52 char sp_flush[0x80]; 53 #ifdef DEBUG 54 bus_space_handle_t sp_ichiph; 55 #endif 56 }; 57 58 struct schizo_softc { 59 device_t sc_dev; 60 int sc_node; 61 int sc_ign; 62 bus_dma_tag_t sc_dmat; 63 bus_space_tag_t sc_bustag; 64 bus_space_handle_t sc_ctrlh; 65 bus_space_handle_t sc_confh; 66 67 int sc_busa; 68 int sc_tomatillo; 69 uint32_t sc_ver; 70 #ifdef DEBUG 71 struct schizo_pbm* sc_pbm; 72 #endif 73 }; 74 75 #define schizo_read(sc,r) \ 76 bus_space_read_8((sc)->sc_bustag, (sc)->sc_ctrlh, (r)) 77 #define schizo_write(sc,r,v) \ 78 bus_space_write_8((sc)->sc_bustag, (sc)->sc_ctrlh, (r), (v)) 79 #define schizo_pbm_read(pbm,r) \ 80 bus_space_read_8((pbm)->sp_regt, (pbm)->sp_regh, (r)) 81 #define schizo_pbm_write(pbm,r,v) \ 82 bus_space_write_8((pbm)->sp_regt, (pbm)->sp_regh, (r), (v)) 83 #define schizo_pbm_readintr(pbm,r) \ 84 bus_space_read_8((pbm)->sp_regt, (pbm)->sp_intrh, (r)) 85 #define schizo_pbm_writeintr(pbm,r,v) \ 86 bus_space_write_8((pbm)->sp_regt, (pbm)->sp_intrh, (r), (v)) 87 #define schizo_cfg_read(pbm,r) \ 88 bus_space_read_4((pbm)->sp_cfgt, (pbm)->sp_cfgh, (r)) 89 #define schizo_cfg_write(pbm,r,v) \ 90 bus_space_write_4((pbm)->sp_cfgt, (pbm)->sp_cfgh, (r), (v)) 91 #ifdef DEBUG 92 #define schizo_read_1(sc,r) \ 93 bus_space_read_1((sc)->sc_bustag, (sc)->sc_ctrlh, (r)) 94 #define tomatillo_pbm_readichip(pbm,r) \ 95 bus_space_read_8((pbm)->sp_regt, (pbm)->sp_ichiph, (r)) 96 #endif 97