1 /* $OpenBSD: sis85c503.c,v 1.6 2002/03/14 01:26:33 millert Exp $ */
2 /* $NetBSD: sis85c503.c,v 1.2 2000/07/18 11:24:09 soda Exp $ */
3
4 /*-
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 /*
42 * Copyright (c) 1999, by UCHIYAMA Yasushi
43 * All rights reserved.
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions and the following disclaimer.
50 * 2. The name of the developer may NOT be used to endorse or promote products
51 * derived from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63 * SUCH DAMAGE.
64 */
65
66 /*
67 * Support for the SiS 85c503 PCI-ISA bridge interrupt controller.
68 */
69
70 #include <sys/param.h>
71 #include <sys/systm.h>
72 #include <sys/device.h>
73
74 #include <machine/intr.h>
75 #include <machine/bus.h>
76
77 #include <dev/pci/pcivar.h>
78 #include <dev/pci/pcireg.h>
79 #include <dev/pci/pcidevs.h>
80
81 #include <i386/pci/pcibiosvar.h>
82 #include <i386/pci/sis85c503reg.h>
83 #include <i386/pci/piixvar.h>
84
85 int sis85c503_getclink(pciintr_icu_handle_t, int, int *);
86 int sis85c503_get_intr(pciintr_icu_handle_t, int, int *);
87 int sis85c503_set_intr(pciintr_icu_handle_t, int, int);
88
89 const struct pciintr_icu sis85c503_pci_icu = {
90 sis85c503_getclink,
91 sis85c503_get_intr,
92 sis85c503_set_intr,
93 piix_get_trigger,
94 piix_set_trigger,
95 };
96
97 int
sis85c503_init(pc,iot,tag,ptagp,phandp)98 sis85c503_init(pc, iot, tag, ptagp, phandp)
99 pci_chipset_tag_t pc;
100 bus_space_tag_t iot;
101 pcitag_t tag;
102 pciintr_icu_tag_t *ptagp;
103 pciintr_icu_handle_t *phandp;
104 {
105
106 if (piix_init(pc, iot, tag, ptagp, phandp) == 0) {
107 *ptagp = &sis85c503_pci_icu;
108 return (0);
109 }
110
111 return (1);
112 }
113
114 int
sis85c503_getclink(v,link,clinkp)115 sis85c503_getclink(v, link, clinkp)
116 pciintr_icu_handle_t v;
117 int link, *clinkp;
118 {
119
120 /* Pattern 1: simple. */
121 if (link >= 1 && link <= 4) {
122 *clinkp = SIS85C503_CFG_PIRQ_REGSTART + link - 1;
123 return (0);
124 }
125
126 /* Pattern 2: configuration register offset */
127 if (link >= SIS85C503_CFG_PIRQ_REGSTART &&
128 link <= SIS85C503_CFG_PIRQ_REGEND) {
129 *clinkp = link;
130 return (0);
131 }
132
133 return (1);
134 }
135
136 int
sis85c503_get_intr(v,clink,irqp)137 sis85c503_get_intr(v, clink, irqp)
138 pciintr_icu_handle_t v;
139 int clink, *irqp;
140 {
141 struct piix_handle *ph = v;
142 pcireg_t reg;
143
144 if (SIS85C503_LEGAL_LINK(clink) == 0)
145 return (1);
146
147 reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
148 SIS85C503_CFG_PIRQ_REGOFS(clink));
149 reg = SIS85C503_CFG_PIRQ_REG(reg, clink);
150
151 if (reg & SIS85C503_CFG_PIRQ_ROUTE_DISABLE)
152 *irqp = 0xff;
153 else
154 *irqp = reg & SIS85C503_CFG_PIRQ_INTR_MASK;
155
156 return (0);
157 }
158
159 int
sis85c503_set_intr(v,clink,irq)160 sis85c503_set_intr(v, clink, irq)
161 pciintr_icu_handle_t v;
162 int clink, irq;
163 {
164 struct piix_handle *ph = v;
165 int shift;
166 pcireg_t reg;
167
168 if (SIS85C503_LEGAL_LINK(clink) == 0 || SIS85C503_LEGAL_IRQ(irq) == 0)
169 return (1);
170
171 reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
172 SIS85C503_CFG_PIRQ_REGOFS(clink));
173 shift = SIS85C503_CFG_PIRQ_SHIFT(clink);
174 reg &= ~((SIS85C503_CFG_PIRQ_ROUTE_DISABLE |
175 SIS85C503_CFG_PIRQ_INTR_MASK) << shift);
176 reg |= (irq << shift);
177 pci_conf_write(ph->ph_pc, ph->ph_tag, SIS85C503_CFG_PIRQ_REGOFS(clink),
178 reg);
179
180 return (0);
181 }
182