1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 /* 24 * This file defines the private interface between the 25 * AMD kernel graphics drivers and the AMD KFD. 26 */ 27 28 #ifndef KGD_KFD_INTERFACE_H_INCLUDED 29 #define KGD_KFD_INTERFACE_H_INCLUDED 30 31 #include <linux/types.h> 32 #include <linux/bitmap.h> 33 #include <linux/dma-fence.h> 34 35 struct pci_dev; 36 37 #define KFD_INTERFACE_VERSION 2 38 #define KGD_MAX_QUEUES 128 39 40 struct kfd_dev; 41 struct kgd_dev; 42 43 struct kgd_mem; 44 45 enum kfd_preempt_type { 46 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN = 0, 47 KFD_PREEMPT_TYPE_WAVEFRONT_RESET, 48 }; 49 50 struct kfd_vm_fault_info { 51 uint64_t page_addr; 52 uint32_t vmid; 53 uint32_t mc_id; 54 uint32_t status; 55 bool prot_valid; 56 bool prot_read; 57 bool prot_write; 58 bool prot_exec; 59 }; 60 61 struct kfd_cu_info { 62 uint32_t num_shader_engines; 63 uint32_t num_shader_arrays_per_engine; 64 uint32_t num_cu_per_sh; 65 uint32_t cu_active_number; 66 uint32_t cu_ao_mask; 67 uint32_t simd_per_cu; 68 uint32_t max_waves_per_simd; 69 uint32_t wave_front_size; 70 uint32_t max_scratch_slots_per_cu; 71 uint32_t lds_size; 72 uint32_t cu_bitmap[4][4]; 73 }; 74 75 /* For getting GPU local memory information from KGD */ 76 struct kfd_local_mem_info { 77 uint64_t local_mem_size_private; 78 uint64_t local_mem_size_public; 79 uint32_t vram_width; 80 uint32_t mem_clk_max; 81 }; 82 83 enum kgd_memory_pool { 84 KGD_POOL_SYSTEM_CACHEABLE = 1, 85 KGD_POOL_SYSTEM_WRITECOMBINE = 2, 86 KGD_POOL_FRAMEBUFFER = 3, 87 }; 88 89 enum kgd_engine_type { 90 KGD_ENGINE_PFP = 1, 91 KGD_ENGINE_ME, 92 KGD_ENGINE_CE, 93 KGD_ENGINE_MEC1, 94 KGD_ENGINE_MEC2, 95 KGD_ENGINE_RLC, 96 KGD_ENGINE_SDMA1, 97 KGD_ENGINE_SDMA2, 98 KGD_ENGINE_MAX 99 }; 100 101 struct kgd2kfd_shared_resources { 102 /* Bit n == 1 means VMID n is available for KFD. */ 103 unsigned int compute_vmid_bitmap; 104 105 /* number of pipes per mec */ 106 uint32_t num_pipe_per_mec; 107 108 /* number of queues per pipe */ 109 uint32_t num_queue_per_pipe; 110 111 /* Bit n == 1 means Queue n is available for KFD */ 112 DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES); 113 114 /* Doorbell assignments (SOC15 and later chips only). Only 115 * specific doorbells are routed to each SDMA engine. Others 116 * are routed to IH and VCN. They are not usable by the CP. 117 * 118 * Any doorbell number D that satisfies the following condition 119 * is reserved: (D & reserved_doorbell_mask) == reserved_doorbell_val 120 * 121 * KFD currently uses 1024 (= 0x3ff) doorbells per process. If 122 * doorbells 0x0f0-0x0f7 and 0x2f-0x2f7 are reserved, that means 123 * mask would be set to 0x1f8 and val set to 0x0f0. 124 */ 125 unsigned int sdma_doorbell[2][2]; 126 unsigned int reserved_doorbell_mask; 127 unsigned int reserved_doorbell_val; 128 129 /* Base address of doorbell aperture. */ 130 phys_addr_t doorbell_physical_address; 131 132 /* Size in bytes of doorbell aperture. */ 133 size_t doorbell_aperture_size; 134 135 /* Number of bytes at start of aperture reserved for KGD. */ 136 size_t doorbell_start_offset; 137 138 /* GPUVM address space size in bytes */ 139 uint64_t gpuvm_size; 140 141 /* Minor device number of the render node */ 142 int drm_render_minor; 143 }; 144 145 struct tile_config { 146 uint32_t *tile_config_ptr; 147 uint32_t *macro_tile_config_ptr; 148 uint32_t num_tile_configs; 149 uint32_t num_macro_tile_configs; 150 151 uint32_t gb_addr_config; 152 uint32_t num_banks; 153 uint32_t num_ranks; 154 }; 155 156 157 /* 158 * Allocation flag domains 159 * NOTE: This must match the corresponding definitions in kfd_ioctl.h. 160 */ 161 #define ALLOC_MEM_FLAGS_VRAM (1 << 0) 162 #define ALLOC_MEM_FLAGS_GTT (1 << 1) 163 #define ALLOC_MEM_FLAGS_USERPTR (1 << 2) /* TODO */ 164 #define ALLOC_MEM_FLAGS_DOORBELL (1 << 3) /* TODO */ 165 166 /* 167 * Allocation flags attributes/access options. 168 * NOTE: This must match the corresponding definitions in kfd_ioctl.h. 169 */ 170 #define ALLOC_MEM_FLAGS_WRITABLE (1 << 31) 171 #define ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30) 172 #define ALLOC_MEM_FLAGS_PUBLIC (1 << 29) 173 #define ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28) /* TODO */ 174 #define ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27) 175 #define ALLOC_MEM_FLAGS_COHERENT (1 << 26) /* For GFXv9 or later */ 176 177 /** 178 * struct kfd2kgd_calls 179 * 180 * @init_gtt_mem_allocation: Allocate a buffer on the gart aperture. 181 * The buffer can be used for mqds, hpds, kernel queue, fence and runlists 182 * 183 * @free_gtt_mem: Frees a buffer that was allocated on the gart aperture 184 * 185 * @get_local_mem_info: Retrieves information about GPU local memory 186 * 187 * @get_gpu_clock_counter: Retrieves GPU clock counter 188 * 189 * @get_max_engine_clock_in_mhz: Retrieves maximum GPU clock in MHz 190 * 191 * @alloc_pasid: Allocate a PASID 192 * @free_pasid: Free a PASID 193 * 194 * @program_sh_mem_settings: A function that should initiate the memory 195 * properties such as main aperture memory type (cache / non cached) and 196 * secondary aperture base address, size and memory type. 197 * This function is used only for no cp scheduling mode. 198 * 199 * @set_pasid_vmid_mapping: Exposes pasid/vmid pair to the H/W for no cp 200 * scheduling mode. Only used for no cp scheduling mode. 201 * 202 * @hqd_load: Loads the mqd structure to a H/W hqd slot. used only for no cp 203 * sceduling mode. 204 * 205 * @hqd_sdma_load: Loads the SDMA mqd structure to a H/W SDMA hqd slot. 206 * used only for no HWS mode. 207 * 208 * @hqd_dump: Dumps CPC HQD registers to an array of address-value pairs. 209 * Array is allocated with kmalloc, needs to be freed with kfree by caller. 210 * 211 * @hqd_sdma_dump: Dumps SDMA HQD registers to an array of address-value pairs. 212 * Array is allocated with kmalloc, needs to be freed with kfree by caller. 213 * 214 * @hqd_is_occupies: Checks if a hqd slot is occupied. 215 * 216 * @hqd_destroy: Destructs and preempts the queue assigned to that hqd slot. 217 * 218 * @hqd_sdma_is_occupied: Checks if an SDMA hqd slot is occupied. 219 * 220 * @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that 221 * SDMA hqd slot. 222 * 223 * @get_fw_version: Returns FW versions from the header 224 * 225 * @set_scratch_backing_va: Sets VA for scratch backing memory of a VMID. 226 * Only used for no cp scheduling mode 227 * 228 * @get_tile_config: Returns GPU-specific tiling mode information 229 * 230 * @get_cu_info: Retrieves activated cu info 231 * 232 * @get_vram_usage: Returns current VRAM usage 233 * 234 * @create_process_vm: Create a VM address space for a given process and GPU 235 * 236 * @destroy_process_vm: Destroy a VM 237 * 238 * @get_process_page_dir: Get physical address of a VM page directory 239 * 240 * @set_vm_context_page_table_base: Program page table base for a VMID 241 * 242 * @alloc_memory_of_gpu: Allocate GPUVM memory 243 * 244 * @free_memory_of_gpu: Free GPUVM memory 245 * 246 * @map_memory_to_gpu: Map GPUVM memory into a specific VM address 247 * space. Allocates and updates page tables and page directories as 248 * needed. This function may return before all page table updates have 249 * completed. This allows multiple map operations (on multiple GPUs) 250 * to happen concurrently. Use sync_memory to synchronize with all 251 * pending updates. 252 * 253 * @unmap_memor_to_gpu: Unmap GPUVM memory from a specific VM address space 254 * 255 * @sync_memory: Wait for pending page table updates to complete 256 * 257 * @map_gtt_bo_to_kernel: Map a GTT BO for kernel access 258 * Pins the BO, maps it to kernel address space. Such BOs are never evicted. 259 * The kernel virtual address remains valid until the BO is freed. 260 * 261 * @restore_process_bos: Restore all BOs that belong to the 262 * process. This is intended for restoring memory mappings after a TTM 263 * eviction. 264 * 265 * @invalidate_tlbs: Invalidate TLBs for a specific PASID 266 * 267 * @invalidate_tlbs_vmid: Invalidate TLBs for a specific VMID 268 * 269 * @submit_ib: Submits an IB to the engine specified by inserting the 270 * IB to the corresponding ring (ring type). The IB is executed with the 271 * specified VMID in a user mode context. 272 * 273 * @get_vm_fault_info: Return information about a recent VM fault on 274 * GFXv7 and v8. If multiple VM faults occurred since the last call of 275 * this function, it will return information about the first of those 276 * faults. On GFXv9 VM fault information is fully contained in the IH 277 * packet and this function is not needed. 278 * 279 * @read_vmid_from_vmfault_reg: On Hawaii the VMID is not set in the 280 * IH ring entry. This function allows the KFD ISR to get the VMID 281 * from the fault status register as early as possible. 282 * 283 * @gpu_recover: let kgd reset gpu after kfd detect CPC hang 284 * 285 * @set_compute_idle: Indicates that compute is idle on a device. This 286 * can be used to change power profiles depending on compute activity. 287 * 288 * This structure contains function pointers to services that the kgd driver 289 * provides to amdkfd driver. 290 * 291 */ 292 struct kfd2kgd_calls { 293 int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size, 294 void **mem_obj, uint64_t *gpu_addr, 295 void **cpu_ptr, bool mqd_gfx9); 296 297 void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj); 298 299 void (*get_local_mem_info)(struct kgd_dev *kgd, 300 struct kfd_local_mem_info *mem_info); 301 uint64_t (*get_gpu_clock_counter)(struct kgd_dev *kgd); 302 303 uint32_t (*get_max_engine_clock_in_mhz)(struct kgd_dev *kgd); 304 305 int (*alloc_pasid)(unsigned int bits); 306 void (*free_pasid)(unsigned int pasid); 307 308 /* Register access functions */ 309 void (*program_sh_mem_settings)(struct kgd_dev *kgd, uint32_t vmid, 310 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base, 311 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases); 312 313 int (*set_pasid_vmid_mapping)(struct kgd_dev *kgd, unsigned int pasid, 314 unsigned int vmid); 315 316 int (*init_interrupts)(struct kgd_dev *kgd, uint32_t pipe_id); 317 318 int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, 319 uint32_t queue_id, uint32_t __user *wptr, 320 uint32_t wptr_shift, uint32_t wptr_mask, 321 struct mm_struct *mm); 322 323 int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd, 324 uint32_t __user *wptr, struct mm_struct *mm); 325 326 int (*hqd_dump)(struct kgd_dev *kgd, 327 uint32_t pipe_id, uint32_t queue_id, 328 uint32_t (**dump)[2], uint32_t *n_regs); 329 330 int (*hqd_sdma_dump)(struct kgd_dev *kgd, 331 uint32_t engine_id, uint32_t queue_id, 332 uint32_t (**dump)[2], uint32_t *n_regs); 333 334 bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address, 335 uint32_t pipe_id, uint32_t queue_id); 336 337 int (*hqd_destroy)(struct kgd_dev *kgd, void *mqd, uint32_t reset_type, 338 unsigned int timeout, uint32_t pipe_id, 339 uint32_t queue_id); 340 341 bool (*hqd_sdma_is_occupied)(struct kgd_dev *kgd, void *mqd); 342 343 int (*hqd_sdma_destroy)(struct kgd_dev *kgd, void *mqd, 344 unsigned int timeout); 345 346 int (*address_watch_disable)(struct kgd_dev *kgd); 347 int (*address_watch_execute)(struct kgd_dev *kgd, 348 unsigned int watch_point_id, 349 uint32_t cntl_val, 350 uint32_t addr_hi, 351 uint32_t addr_lo); 352 int (*wave_control_execute)(struct kgd_dev *kgd, 353 uint32_t gfx_index_val, 354 uint32_t sq_cmd); 355 uint32_t (*address_watch_get_offset)(struct kgd_dev *kgd, 356 unsigned int watch_point_id, 357 unsigned int reg_offset); 358 bool (*get_atc_vmid_pasid_mapping_valid)( 359 struct kgd_dev *kgd, 360 uint8_t vmid); 361 uint16_t (*get_atc_vmid_pasid_mapping_pasid)( 362 struct kgd_dev *kgd, 363 uint8_t vmid); 364 365 uint16_t (*get_fw_version)(struct kgd_dev *kgd, 366 enum kgd_engine_type type); 367 void (*set_scratch_backing_va)(struct kgd_dev *kgd, 368 uint64_t va, uint32_t vmid); 369 int (*get_tile_config)(struct kgd_dev *kgd, struct tile_config *config); 370 371 void (*get_cu_info)(struct kgd_dev *kgd, 372 struct kfd_cu_info *cu_info); 373 uint64_t (*get_vram_usage)(struct kgd_dev *kgd); 374 375 int (*create_process_vm)(struct kgd_dev *kgd, void **vm, 376 void **process_info, struct dma_fence **ef); 377 int (*acquire_process_vm)(struct kgd_dev *kgd, struct file *filp, 378 void **vm, void **process_info, struct dma_fence **ef); 379 void (*destroy_process_vm)(struct kgd_dev *kgd, void *vm); 380 uint32_t (*get_process_page_dir)(void *vm); 381 void (*set_vm_context_page_table_base)(struct kgd_dev *kgd, 382 uint32_t vmid, uint32_t page_table_base); 383 int (*alloc_memory_of_gpu)(struct kgd_dev *kgd, uint64_t va, 384 uint64_t size, void *vm, 385 struct kgd_mem **mem, uint64_t *offset, 386 uint32_t flags); 387 int (*free_memory_of_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem); 388 int (*map_memory_to_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem, 389 void *vm); 390 int (*unmap_memory_to_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem, 391 void *vm); 392 int (*sync_memory)(struct kgd_dev *kgd, struct kgd_mem *mem, bool intr); 393 int (*map_gtt_bo_to_kernel)(struct kgd_dev *kgd, struct kgd_mem *mem, 394 void **kptr, uint64_t *size); 395 int (*restore_process_bos)(void *process_info, struct dma_fence **ef); 396 397 int (*invalidate_tlbs)(struct kgd_dev *kgd, uint16_t pasid); 398 int (*invalidate_tlbs_vmid)(struct kgd_dev *kgd, uint16_t vmid); 399 400 int (*submit_ib)(struct kgd_dev *kgd, enum kgd_engine_type engine, 401 uint32_t vmid, uint64_t gpu_addr, 402 uint32_t *ib_cmd, uint32_t ib_len); 403 404 int (*get_vm_fault_info)(struct kgd_dev *kgd, 405 struct kfd_vm_fault_info *info); 406 uint32_t (*read_vmid_from_vmfault_reg)(struct kgd_dev *kgd); 407 408 void (*gpu_recover)(struct kgd_dev *kgd); 409 410 void (*set_compute_idle)(struct kgd_dev *kgd, bool idle); 411 }; 412 413 /** 414 * struct kgd2kfd_calls 415 * 416 * @exit: Notifies amdkfd that kgd module is unloaded 417 * 418 * @probe: Notifies amdkfd about a probe done on a device in the kgd driver. 419 * 420 * @device_init: Initialize the newly probed device (if it is a device that 421 * amdkfd supports) 422 * 423 * @device_exit: Notifies amdkfd about a removal of a kgd device 424 * 425 * @suspend: Notifies amdkfd about a suspend action done to a kgd device 426 * 427 * @resume: Notifies amdkfd about a resume action done to a kgd device 428 * 429 * @quiesce_mm: Quiesce all user queue access to specified MM address space 430 * 431 * @resume_mm: Resume user queue access to specified MM address space 432 * 433 * @schedule_evict_and_restore_process: Schedules work queue that will prepare 434 * for safe eviction of KFD BOs that belong to the specified process. 435 * 436 * @pre_reset: Notifies amdkfd that amdgpu about to reset the gpu 437 * 438 * @post_reset: Notify amdkfd that amgpu successfully reseted the gpu 439 * 440 * This structure contains function callback pointers so the kgd driver 441 * will notify to the amdkfd about certain status changes. 442 * 443 */ 444 struct kgd2kfd_calls { 445 void (*exit)(void); 446 struct kfd_dev* (*probe)(struct kgd_dev *kgd, struct pci_dev *pdev, 447 const struct kfd2kgd_calls *f2g); 448 bool (*device_init)(struct kfd_dev *kfd, 449 const struct kgd2kfd_shared_resources *gpu_resources); 450 void (*device_exit)(struct kfd_dev *kfd); 451 void (*interrupt)(struct kfd_dev *kfd, const void *ih_ring_entry); 452 void (*suspend)(struct kfd_dev *kfd); 453 int (*resume)(struct kfd_dev *kfd); 454 int (*quiesce_mm)(struct mm_struct *mm); 455 int (*resume_mm)(struct mm_struct *mm); 456 int (*schedule_evict_and_restore_process)(struct mm_struct *mm, 457 struct dma_fence *fence); 458 int (*pre_reset)(struct kfd_dev *kfd); 459 int (*post_reset)(struct kfd_dev *kfd); 460 }; 461 462 int kgd2kfd_init(unsigned interface_version, 463 const struct kgd2kfd_calls **g2f); 464 465 #endif /* KGD_KFD_INTERFACE_H_INCLUDED */ 466