1 /* $NetBSD: i80312var.h,v 1.11 2012/10/14 14:20:57 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _ARM_XSCALE_I80312VAR_H_ 39 #define _ARM_XSCALE_I80312VAR_H_ 40 41 #include <sys/bus.h> 42 43 #include <dev/pci/pcivar.h> 44 45 struct i80312_softc { 46 device_t sc_dev; /* generic device glue */ 47 48 int sc_is_host; /* indicates if we're a host or 49 plugged into another host */ 50 51 /* 52 * This is the bus_space and handle used to access the 53 * i80312 itself. This is filled in by the board-specific 54 * front-end. 55 */ 56 bus_space_tag_t sc_st; 57 bus_space_handle_t sc_sh; 58 59 /* Handles for the various subregions. */ 60 bus_space_handle_t sc_ppb_sh; 61 bus_space_handle_t sc_atu_sh; 62 bus_space_handle_t sc_mem_sh; 63 bus_space_handle_t sc_intc_sh; 64 65 /* 66 * Secondary IDSEL Select bits for providing a private 67 * PCI device space. 68 */ 69 uint16_t sc_sisr; 70 71 /* 72 * We expect the board-specific front-end to have already mapped 73 * the PCI I/O spaces .. they're only 64K each, and I/O mappings 74 * tend to be smaller than a page size, so it's generally more 75 * efficient to map them all into virtual space in one fell swoop. 76 */ 77 vaddr_t sc_piow_vaddr; /* primary I/O window vaddr */ 78 vaddr_t sc_siow_vaddr; /* secondary I/O window vaddr */ 79 80 /* 81 * Variables that define the Primary Inbound window. The base 82 * address is configured by a host via BAR #0. The xlate variable 83 * defines the start of the local address space that it maps to. 84 * The size variable defines the byte size. 85 * 86 * This window is used for incoming PCI memory read/write cycles 87 * from a host. 88 * 89 * ...unless we're a host, in which case we make the Primary 90 * Inbound window work like the Secondary Inbound window, so 91 * that PCI devices on that bus can talk to our local RAM. 92 */ 93 uint32_t sc_pin_base; 94 uint32_t sc_pin_xlate; 95 uint32_t sc_pin_size; 96 97 /* 98 * Variables that define the Secondary Inbound window. The 99 * base variable indicates the PCI base address of the window. 100 * The xlate variable defines the start of the local address 101 * space that it maps to. The size variable defines the byte 102 * size. 103 * 104 * This window is used for DMA with devices on the secondary bus. 105 */ 106 uint32_t sc_sin_base; 107 uint32_t sc_sin_xlate; 108 uint32_t sc_sin_size; 109 110 /* 111 * This is the PCI address that the Primary Outbound Memory 112 * window maps to. 113 */ 114 uint32_t sc_pmemout_base; 115 uint32_t sc_pmemout_size; 116 117 /* 118 * This is the PCI address that the Primary Outbound I/O 119 * window maps to. 120 */ 121 uint32_t sc_pioout_base; 122 uint32_t sc_pioout_size; 123 124 /* 125 * This is the PCI address that the Secondary Outbound Memory 126 * window maps to. 127 */ 128 uint32_t sc_smemout_base; 129 uint32_t sc_smemout_size; 130 131 /* 132 * This is the PCI address that the Secondary Outbound I/O 133 * window maps to. 134 */ 135 uint32_t sc_sioout_base; 136 uint32_t sc_sioout_size; 137 138 /* 139 * This defines the private I/O and Memory spaces on the 140 * Secondary bus. 141 */ 142 uint32_t sc_privio_base; 143 uint32_t sc_privio_size; 144 uint32_t sc_privmem_base; 145 uint32_t sc_privmem_size; 146 147 uint8_t sc_sder; /* secondary decode enable register */ 148 149 /* Bus space, DMA, and PCI tags for the PCI bus (private devices). */ 150 struct bus_space sc_pci_iot; 151 struct bus_space sc_pci_memt; 152 struct arm32_bus_dma_tag sc_pci_dmat; 153 struct arm32_pci_chipset sc_pci_chipset; 154 155 /* DMA window info for PCI DMA. */ 156 struct arm32_dma_range sc_pci_dma_range; 157 158 /* GPIO state */ 159 uint8_t sc_gpio_dir; /* GPIO pin direction (1 == output) */ 160 uint8_t sc_gpio_val; /* GPIO output pin value */ 161 162 /* DMA tag for local devices. */ 163 struct arm32_bus_dma_tag sc_local_dmat; 164 }; 165 166 /* 167 * Arguments used to attach IOP built-ins. 168 */ 169 struct iopxs_attach_args { 170 const char *ia_name; /* name of device */ 171 bus_space_tag_t ia_st; /* space tag */ 172 bus_space_handle_t ia_sh;/* handle of IOP base */ 173 bus_dma_tag_t ia_dmat; /* DMA tag */ 174 bus_addr_t ia_offset; /* offset of device from IOP base */ 175 bus_size_t ia_size; /* size of sub-device */ 176 }; 177 178 extern struct bus_space i80312_bs_tag; 179 extern struct i80312_softc *i80312_softc; 180 181 void i80312_sdram_bounds(bus_space_tag_t, bus_space_handle_t, 182 paddr_t *, psize_t *); 183 184 void i80312_attach(struct i80312_softc *); 185 186 void i80312_bs_init(bus_space_tag_t, void *); 187 void i80312_io_bs_init(bus_space_tag_t, void *); 188 void i80312_mem_bs_init(bus_space_tag_t, void *); 189 190 void i80312_gpio_set_direction(uint8_t, uint8_t); 191 void i80312_gpio_set_val(uint8_t, uint8_t); 192 uint8_t i80312_gpio_get_val(void); 193 194 void i80312_pci_init(pci_chipset_tag_t, void *); 195 196 #endif /* _ARM_XSCALE_I80312VAR_H_ */ 197