1 /* $OpenBSD: ncr53c9xvar.h,v 1.14 2003/10/21 18:58:49 jmc Exp $ */ 2 /* $NetBSD: ncr53c9xvar.h,v 1.13 1998/05/26 23:17:34 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 1997 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1994 Peter Galbavy. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #include <sys/timeout.h> 66 67 /* Set this to 1 for normal debug, or 2 for per-target tracing. */ 68 /* #define NCR53C9X_DEBUG 1 */ 69 70 /* Wide or differential can have 16 targets */ 71 #define NCR_NTARG 8 72 #define NCR_NLUN 8 73 74 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ 75 #define NCR_SENSE_TIMEOUT 1000 /* time to wait for sense */ 76 77 #define FREQTOCCF(freq) (((freq + 4) / 5)) 78 79 /* 80 * NCR 53c9x variants. Note, these values are used as indexes into 81 * a table; don't modify them unless you know what you're doing. 82 */ 83 #define NCR_VARIANT_ESP100 0 84 #define NCR_VARIANT_ESP100A 1 85 #define NCR_VARIANT_ESP200 2 86 #define NCR_VARIANT_NCR53C94 3 87 #define NCR_VARIANT_NCR53C96 4 88 #define NCR_VARIANT_ESP406 5 89 #define NCR_VARIANT_FAS408 6 90 #define NCR_VARIANT_FAS216 7 91 #define NCR_VARIANT_AM53C974 8 92 #define NCR_VARIANT_FAS366 9 93 #define NCR_VARIANT_MAX 10 94 95 /* 96 * ECB. Holds additional information for each SCSI command Comments: We 97 * need a separate scsi command block because we may need to overwrite it 98 * with a request sense command. Basicly, we refrain from fiddling with 99 * the scsi_xfer struct (except do the expected updating of return values). 100 * We'll generally update: xs->{flags,resid,error,sense,status} and 101 * occasionally xs->retries. 102 */ 103 struct ncr53c9x_ecb { 104 TAILQ_ENTRY(ncr53c9x_ecb) chain; 105 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 106 int flags; 107 #define ECB_ALLOC 0x01 108 #define ECB_READY 0x02 109 #define ECB_SENSE 0x04 110 #define ECB_ABORT 0x40 111 #define ECB_RESET 0x80 112 #define ECB_TENTATIVE_DONE 0x100 113 int timeout; 114 struct timeout to; 115 116 struct { 117 u_char msg[3]; /* Selection Id msg */ 118 struct scsi_generic cmd; /* SCSI command block */ 119 } cmd; 120 char *daddr; /* Saved data pointer */ 121 int clen; /* Size of command in cmd.cmd */ 122 int dleft; /* Residue */ 123 u_char stat; /* SCSI status byte */ 124 u_char tag[2]; /* TAG bytes */ 125 u_char pad[1]; 126 127 #if NCR53C9X_DEBUG > 1 128 char trace[1000]; 129 #endif 130 }; 131 #if NCR53C9X_DEBUG > 1 132 #define ECB_TRACE(ecb, msg, a, b) do { \ 133 const char *f = "[" msg "]"; \ 134 int n = strlen((ecb)->trace); \ 135 if (n < (sizeof((ecb)->trace)-100)) \ 136 snprintf((ecb)->trace + n, sizeof((ecb)->trace) - n, f, a, b); \ 137 } while(0) 138 #else 139 #define ECB_TRACE(ecb, msg, a, b) 140 #endif 141 142 /* 143 * Some info about ech (possible) target and LUN on the SCSI bus. 144 * 145 * SCSI I and II devices can have up to 8 LUNs, each with up to 256 146 * outstanding tags. SCSI III devices have 64-bit LUN identifiers 147 * that can be sparsely allocated. 148 * 149 * Since SCSI II devices can have up to 8 LUNs, we use an array 150 * of 8 pointers to ncr53c9x_linfo structures for fast lookup. 151 * Longer LUNs need to traverse the linked list. 152 */ 153 154 struct ncr53c9x_linfo { 155 int64_t lun; 156 LIST_ENTRY(ncr53c9x_linfo) link; 157 time_t last_used; 158 unsigned char used; /* # slots in use */ 159 unsigned char avail; /* where to start scanning */ 160 unsigned char busy; 161 struct ncr53c9x_ecb *untagged; 162 struct ncr53c9x_ecb *queued[256]; 163 }; 164 165 struct ncr53c9x_tinfo { 166 int cmds; /* # of commands processed */ 167 int dconns; /* # of disconnects */ 168 int touts; /* # of timeouts */ 169 int perrs; /* # of parity errors */ 170 int senses; /* # of request sense commands sent */ 171 u_char flags; 172 #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 173 #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 174 #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 175 #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ 176 #define T_SYNCHOFF 0x10 /* .. */ 177 #define T_RSELECTOFF 0x20 /* .. */ 178 #define T_TAG 0x40 /* TAG QUEUEs are on */ 179 #define T_WIDE 0x80 /* Negotiate wide options */ 180 u_char period; /* Period suggestion */ 181 u_char offset; /* Offset suggestion */ 182 u_char cfg3; /* per target config 3 */ 183 u_char nextag; /* Next available tag */ 184 u_char width; /* width suggestion */ 185 LIST_HEAD(lun_list, ncr53c9x_linfo) luns; 186 struct ncr53c9x_linfo *lun[NCR_NLUN]; /* For speedy lookups */ 187 }; 188 189 /* Look up a lun in a tinfo */ 190 #define TINFO_LUN(t, l) ((((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL)) ? \ 191 ((t)->lun[(l)]) : ncr53c9x_lunsearch((t), (int64_t)(l))) 192 193 /* Register a linenumber (for debugging) */ 194 #define LOGLINE(p) 195 196 #define NCR_SHOWECBS 0x01 197 #define NCR_SHOWINTS 0x02 198 #define NCR_SHOWCMDS 0x04 199 #define NCR_SHOWMISC 0x08 200 #define NCR_SHOWTRAC 0x10 201 #define NCR_SHOWSTART 0x20 202 #define NCR_SHOWPHASE 0x40 203 #define NCR_SHOWDMA 0x80 204 #define NCR_SHOWCCMDS 0x100 205 #define NCR_SHOWMSGS 0x200 206 207 #ifdef NCR53C9X_DEBUG 208 extern int ncr53c9x_debug; 209 #define NCR_ECBS(str) \ 210 do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) 211 #define NCR_MISC(str) \ 212 do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) 213 #define NCR_INTS(str) \ 214 do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) 215 #define NCR_TRACE(str) \ 216 do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) 217 #define NCR_CMDS(str) \ 218 do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) 219 #define NCR_START(str) \ 220 do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) 221 #define NCR_PHASE(str) \ 222 do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) 223 #define NCR_DMA(str) \ 224 do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) 225 #define NCR_MSGS(str) \ 226 do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) 227 #else 228 #define NCR_ECBS(str) 229 #define NCR_MISC(str) 230 #define NCR_INTS(str) 231 #define NCR_TRACE(str) 232 #define NCR_CMDS(str) 233 #define NCR_START(str) 234 #define NCR_PHASE(str) 235 #define NCR_DMA(str) 236 #define NCR_MSGS(str) 237 #endif 238 239 #define NCR_MAX_MSG_LEN 8 240 241 struct ncr53c9x_softc; 242 243 /* 244 * Function switch used as glue to MD code. 245 */ 246 struct ncr53c9x_glue { 247 /* Mandatory entry points. */ 248 u_char (*gl_read_reg)(struct ncr53c9x_softc *, int); 249 void (*gl_write_reg)(struct ncr53c9x_softc *, int, u_char); 250 int (*gl_dma_isintr)(struct ncr53c9x_softc *); 251 void (*gl_dma_reset)(struct ncr53c9x_softc *); 252 int (*gl_dma_intr)(struct ncr53c9x_softc *); 253 int (*gl_dma_setup)(struct ncr53c9x_softc *, 254 caddr_t *, size_t *, int, size_t *); 255 void (*gl_dma_go)(struct ncr53c9x_softc *); 256 void (*gl_dma_stop)(struct ncr53c9x_softc *); 257 int (*gl_dma_isactive)(struct ncr53c9x_softc *); 258 259 /* Optional entry points. */ 260 void (*gl_clear_latched_intr)(struct ncr53c9x_softc *); 261 }; 262 263 struct ncr53c9x_softc { 264 struct device sc_dev; /* us as a device */ 265 266 struct evcnt sc_intrcnt; /* intr count */ 267 struct timeout sc_watchdog; /* periodic timer */ 268 struct scsi_link sc_link; /* scsi link struct */ 269 270 struct ncr53c9x_glue *sc_glue; /* glue to MD code */ 271 272 int sc_cfflags; /* Copy of config flags */ 273 274 /* register defaults */ 275 u_char sc_cfg1; /* Config 1 */ 276 u_char sc_cfg2; /* Config 2, not ESP100 */ 277 u_char sc_cfg3; /* Config 3, only ESP200 */ 278 u_char sc_cfg3_fscsi; /* Chip specific FSCSI bit */ 279 u_char sc_cfg4; /* Config 4 */ 280 u_char sc_cfg5; /* Config 5 */ 281 u_char sc_ccf; /* Clock Conversion */ 282 u_char sc_timeout; 283 284 /* register copies, see espreadregs() */ 285 u_char sc_espintr; 286 u_char sc_espstat; 287 u_char sc_espstep; 288 u_char sc_espstat2; 289 u_char sc_espfflags; 290 291 /* Lists of command blocks */ 292 TAILQ_HEAD(ecb_list, ncr53c9x_ecb) ready_list; 293 294 struct ncr53c9x_ecb *sc_nexus; /* Current command */ 295 struct ncr53c9x_tinfo sc_tinfo[NCR_NTARG]; 296 297 /* Data about the current nexus (updated for every cmd switch) */ 298 caddr_t sc_dp; /* Current data pointer */ 299 ssize_t sc_dleft; /* Data left to transfer */ 300 301 /* Adapter state */ 302 int sc_phase; /* Copy of what bus phase we are in */ 303 int sc_prevphase; /* Copy of what bus phase we were in */ 304 u_char sc_state; /* State applicable to the adapter */ 305 u_char sc_flags; /* See below */ 306 u_char sc_selid; 307 u_char sc_lastcmd; 308 309 /* Message stuff */ 310 u_short sc_msgify; /* IDENTIFY message associated with this nexus */ 311 u_short sc_msgout; /* What message is on its way out? */ 312 u_short sc_msgpriq; /* One or more messages to send (encoded) */ 313 u_short sc_msgoutq; /* What messages have been sent so far? */ 314 315 u_char *sc_omess; /* MSGOUT buffer */ 316 caddr_t sc_omp; /* Message pointer (for multibyte messages) */ 317 size_t sc_omlen; 318 u_char *sc_imess; /* MSGIN buffer */ 319 caddr_t sc_imp; /* Message pointer (for multibyte messages) */ 320 size_t sc_imlen; 321 322 caddr_t sc_cmdp; /* Command pointer (for DMAed commands) */ 323 size_t sc_cmdlen; /* Size of command in transit */ 324 325 /* Hardware attributes */ 326 int sc_freq; /* SCSI bus frequency in MHz */ 327 int sc_id; /* Our SCSI id */ 328 int sc_rev; /* Chip revision */ 329 int sc_features; /* Chip features */ 330 int sc_minsync; /* Minimum sync period / 4 */ 331 int sc_maxxfer; /* Maximum transfer size */ 332 }; 333 334 /* values for sc_state */ 335 #define NCR_IDLE 1 /* waiting for something to do */ 336 #define NCR_SELECTING 2 /* SCSI command is arbiting */ 337 #define NCR_RESELECTED 3 /* Has been reselected */ 338 #define NCR_IDENTIFIED 4 /* Has gotten IFY but not TAG */ 339 #define NCR_CONNECTED 5 /* Actively using the SCSI bus */ 340 #define NCR_DISCONNECT 6 /* MSG_DISCONNECT received */ 341 #define NCR_CMDCOMPLETE 7 /* MSG_CMDCOMPLETE received */ 342 #define NCR_CLEANING 8 343 #define NCR_SBR 9 /* Expect a SCSI RST because we commanded it */ 344 345 /* values for sc_flags */ 346 #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 347 #define NCR_ABORTING 0x02 /* Bailing out */ 348 #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ 349 #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 350 #define NCR_ICCS 0x10 /* Expect status phase results */ 351 #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ 352 #define NCR_ATN 0x40 /* ATN asserted */ 353 #define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */ 354 355 /* values for sc_features */ 356 #define NCR_F_HASCFG3 0x01 /* chip has CFG3 register */ 357 #define NCR_F_FASTSCSI 0x02 /* chip supports Fast mode */ 358 #define NCR_F_DMASELECT 0x04 /* can do dma select */ 359 #define NCR_F_SELATN3 0x08 /* can do selatn3 */ 360 361 /* values for sc_msgout */ 362 #define SEND_DEV_RESET 0x0001 363 #define SEND_PARITY_ERROR 0x0002 364 #define SEND_INIT_DET_ERR 0x0004 365 #define SEND_REJECT 0x0008 366 #define SEND_IDENTIFY 0x0010 367 #define SEND_ABORT 0x0020 368 #define SEND_WDTR 0x0040 369 #define SEND_SDTR 0x0080 370 #define SEND_TAG 0x0100 371 372 /* SCSI Status codes */ 373 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 374 375 /* phase bits */ 376 #define IOI 0x01 377 #define CDI 0x02 378 #define MSGI 0x04 379 380 /* Information transfer phases */ 381 #define DATA_OUT_PHASE (0) 382 #define DATA_IN_PHASE (IOI) 383 #define COMMAND_PHASE (CDI) 384 #define STATUS_PHASE (CDI|IOI) 385 #define MESSAGE_OUT_PHASE (MSGI|CDI) 386 #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) 387 388 #define PHASE_MASK (MSGI|CDI|IOI) 389 390 /* Some pseudo phases for getphase()*/ 391 #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ 392 #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ 393 #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ 394 395 /* 396 * Macros to read and write the chip's registers. 397 */ 398 #define NCR_READ_REG(sc, reg) \ 399 (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) 400 #define NCR_WRITE_REG(sc, reg, val) \ 401 (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) 402 403 #ifdef NCR53C9X_DEBUG 404 #define NCRCMD(sc, cmd) do { \ 405 if (ncr53c9x_debug & NCR_SHOWCCMDS) \ 406 printf("<cmd:0x%x %d>", (unsigned)cmd, __LINE__); \ 407 sc->sc_lastcmd = cmd; \ 408 NCR_WRITE_REG(sc, NCR_CMD, cmd); \ 409 } while (0) 410 #else 411 #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) 412 #endif 413 414 /* 415 * DMA macros for NCR53c9x 416 */ 417 #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) 418 #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) 419 #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) 420 #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ 421 (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) 422 #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) 423 #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) 424 425 /* 426 * Macro to convert the chip register Clock Per Byte value to 427 * Synchronous Transfer Period. 428 */ 429 #define ncr53c9x_cpb2stp(sc, cpb) \ 430 ((250 * (cpb)) / (sc)->sc_freq) 431 432 void ncr53c9x_attach(struct ncr53c9x_softc *, 433 struct scsi_adapter *, struct scsi_device *); 434 int ncr53c9x_scsi_cmd(struct scsi_xfer *); 435 void ncr53c9x_reset(struct ncr53c9x_softc *); 436 int ncr53c9x_intr(void *); 437 void ncr53c9x_init(struct ncr53c9x_softc *, int); 438