1 /* $FreeBSD$ */ 2 /*- 3 * Copyright (c) 2009-2018 Alexander Motin <mav@FreeBSD.org> 4 * Copyright (c) 1997-2009 by Matthew Jacob 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 #define MBOX_DUMP_RISC_RAM 0x000c 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_LOAD_FLASH_FIRMWARE 0x0003 127 #define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */ 128 #define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */ 129 #define MBOX_GET_IO_STATUS 0x0012 130 #define MBOX_SET_TRANSMIT_PARAMS 0x0019 131 #define MBOX_SET_PORT_PARAMS 0x001a 132 #define MBOX_LOAD_OP_FW_PARAMS 0x001b 133 #define MBOX_INIT_MULTIPLE_QUEUE 0x001f 134 #define MBOX_GET_LOOP_ID 0x0020 135 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 136 #define ISP24XX_INORDER 0x0100 137 #define ISP24XX_NPIV_SAN 0x0400 138 #define ISP24XX_VSAN_SAN 0x1000 139 #define ISP24XX_FC_SP_SAN 0x2000 140 #define MBOX_GET_TIMEOUT_PARAMS 0x0022 141 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 142 #define MBOX_GENERATE_SYSTEM_ERROR 0x002a 143 #define MBOX_WRITE_SFP 0x0030 144 #define MBOX_READ_SFP 0x0031 145 #define MBOX_SET_TIMEOUT_PARAMS 0x0032 146 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 147 #define MBOX_GET_SET_FC_LED_CONF 0x003b 148 #define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */ 149 #define MBOX_ACCESS_CONTROL 0x003e 150 #define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */ 151 #define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */ 152 #define MBOX_GET_RESOURCE_COUNT 0x0042 153 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 154 #define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044 155 #define MBOX_DIAGNOSTIC_LOOPBACK 0x0045 156 #define MBOX_ENHANCED_GET_PDB 0x0047 157 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 158 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 159 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 160 #define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */ 161 #define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */ 162 #define MBOX_HOST_MEMORY_COPY 0x0053 163 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 164 #define MBOX_SEND_RNID 0x0057 165 #define MBOX_SET_PARAMETERS 0x0059 166 #define MBOX_GET_PARAMETERS 0x005a 167 #define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */ 168 #define MBOX_FW_HEARTBEAT 0x005C 169 #define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */ 170 #define MBGSD_GET_RATE 0 171 #define MBGSD_SET_RATE 1 172 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 173 #define MBGSD_1GB 0x00 174 #define MBGSD_2GB 0x01 175 #define MBGSD_AUTO 0x02 176 #define MBGSD_4GB 0x03 /* 24XX only */ 177 #define MBGSD_8GB 0x04 /* 25XX only */ 178 #define MBGSD_16GB 0x05 /* 26XX only */ 179 #define MBGSD_32GB 0x06 /* 27XX only */ 180 #define MBGSD_10GB 0x13 /* 26XX only */ 181 #define MBOX_SEND_RNFT 0x005e 182 #define MBOX_INIT_FIRMWARE 0x0060 183 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 184 #define MBOX_INIT_LIP 0x0062 185 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 186 #define MBOX_GET_PORT_DB 0x0064 187 #define MBOX_CLEAR_ACA 0x0065 188 #define MBOX_TARGET_RESET 0x0066 189 #define MBOX_CLEAR_TASK_SET 0x0067 190 #define MBOX_ABORT_TASK_SET 0x0068 191 #define MBOX_GET_FW_STATE 0x0069 192 #define MBOX_GET_PORT_NAME 0x006A 193 #define MBOX_GET_LINK_STATUS 0x006B 194 #define MBOX_INIT_LIP_RESET 0x006C 195 #define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D 196 #define MBOX_SEND_SNS 0x006E 197 #define MBOX_FABRIC_LOGIN 0x006F 198 #define MBOX_SEND_CHANGE_REQUEST 0x0070 199 #define MBOX_FABRIC_LOGOUT 0x0071 200 #define MBOX_INIT_LIP_LOGIN 0x0072 201 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075 202 #define MBOX_SET_VENDOR_ID 0x0076 203 #define MBOX_GET_XGMAC_STATS 0x007a 204 #define MBOX_GET_ID_LIST 0x007C 205 #define MBOX_SEND_LFA 0x007d 206 #define MBOX_LUN_RESET 0x007E 207 208 #define ISP2100_SET_PCI_PARAM 0x00ff 209 210 #define MBOX_BUSY 0x04 211 212 /* 213 * Mailbox Command Complete Status Codes 214 */ 215 #define MBOX_COMMAND_COMPLETE 0x4000 216 #define MBOX_INVALID_COMMAND 0x4001 217 #define MBOX_HOST_INTERFACE_ERROR 0x4002 218 #define MBOX_TEST_FAILED 0x4003 219 #define MBOX_COMMAND_ERROR 0x4005 220 #define MBOX_COMMAND_PARAM_ERROR 0x4006 221 #define MBOX_PORT_ID_USED 0x4007 222 #define MBOX_LOOP_ID_USED 0x4008 223 #define MBOX_ALL_IDS_USED 0x4009 224 #define MBOX_NOT_LOGGED_IN 0x400A 225 #define MBOX_LINK_DOWN_ERROR 0x400B 226 #define MBOX_LOOPBACK_ERROR 0x400C 227 #define MBOX_CHECKSUM_ERROR 0x4010 228 #define MBOX_INVALID_PRODUCT_KEY 0x4020 229 /* pseudo mailbox completion codes */ 230 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 231 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 232 233 #define MBLOGALL 0xffffffff 234 #define MBLOGNONE 0x00000000 235 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f)) 236 237 /* 238 * Asynchronous event status codes 239 */ 240 #define ASYNC_BUS_RESET 0x8001 241 #define ASYNC_SYSTEM_ERROR 0x8002 242 #define ASYNC_RQS_XFER_ERR 0x8003 243 #define ASYNC_RSP_XFER_ERR 0x8004 244 #define ASYNC_QWAKEUP 0x8005 245 #define ASYNC_TIMEOUT_RESET 0x8006 246 #define ASYNC_DEVICE_RESET 0x8007 247 #define ASYNC_EXTMSG_UNDERRUN 0x800A 248 #define ASYNC_SCAM_INT 0x800B 249 #define ASYNC_HUNG_SCSI 0x800C 250 #define ASYNC_KILLED_BUS 0x800D 251 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 252 #define ASYNC_LIP_OCCURRED 0x8010 /* FC only */ 253 #define ASYNC_LOOP_UP 0x8011 254 #define ASYNC_LOOP_DOWN 0x8012 255 #define ASYNC_LOOP_RESET 0x8013 /* FC only */ 256 #define ASYNC_PDB_CHANGED 0x8014 257 #define ASYNC_CHANGE_NOTIFY 0x8015 258 #define ASYNC_LIP_NOS_OLS_RECV 0x8016 /* FC only */ 259 #define ASYNC_LIP_ERROR 0x8017 /* FC only */ 260 #define ASYNC_AUTO_PLOGI_RJT 0x8018 261 #define ASYNC_SECURITY_UPDATE 0x801B 262 #define ASYNC_CMD_CMPLT 0x8020 263 #define ASYNC_CTIO_DONE 0x8021 264 #define ASYNC_RIO32_1 0x8021 265 #define ASYNC_RIO32_2 0x8022 266 #define ASYNC_IP_XMIT_DONE 0x8022 267 #define ASYNC_IP_RECV_DONE 0x8023 268 #define ASYNC_IP_BROADCAST 0x8024 269 #define ASYNC_IP_RCVQ_LOW 0x8025 270 #define ASYNC_IP_RCVQ_EMPTY 0x8026 271 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 272 #define ASYNC_ERR_LOGGING_DISABLED 0x8029 273 #define ASYNC_PTPMODE 0x8030 /* FC only */ 274 #define ASYNC_RIO16_1 0x8031 275 #define ASYNC_RIO16_2 0x8032 276 #define ASYNC_RIO16_3 0x8033 277 #define ASYNC_RIO16_4 0x8034 278 #define ASYNC_RIO16_5 0x8035 279 #define ASYNC_CONNMODE 0x8036 280 #define ISP_CONN_LOOP 1 281 #define ISP_CONN_PTP 2 282 #define ISP_CONN_BADLIP 3 283 #define ISP_CONN_FATAL 4 284 #define ISP_CONN_LOOPBACK 5 285 #define ASYNC_P2P_INIT_ERR 0x8037 286 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 287 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 288 #define ASYNC_RCV_ERR 0x8048 289 /* 290 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 291 * mailbox command to enable this. 292 */ 293 #define ASYNC_QFULL_SENT 0x8049 294 #define ASYNC_RJT_SENT 0x8049 /* 24XX only */ 295 #define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f 296 #define ASYNC_FW_RESTART_COMPLETE 0x8060 297 #define ASYNC_TEMPERATURE_ALERT 0x8070 298 #define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */ 299 #define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */ 300 #define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */ 301 #define ASYNC_TRANSCEIVER_INSERTION 0x8130 302 #define ASYNC_TRANSCEIVER_REMOVAL 0x8131 303 #define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */ 304 #define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400 305 #define ASYNC_AUTOLOAD_FW_FAILURE 0x8401 306 307 /* 308 * Firmware Options. There are a lot of them. 309 * 310 * IFCOPTN - ISP Fibre Channel Option Word N 311 */ 312 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 313 #define IFCOPT1_EAABSRCVD (1 << 12) 314 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 315 #define IFCOPT1_ENAPURE (1 << 10) 316 #define IFCOPT1_ENA8017 (1 << 7) 317 #define IFCOPT1_DISGPIO67 (1 << 6) 318 #define IFCOPT1_LIPLOSSIMM (1 << 5) 319 #define IFCOPT1_DISF7SWTCH (1 << 4) 320 #define IFCOPT1_CTIO_RETRY (1 << 3) 321 #define IFCOPT1_LIPASYNC (1 << 1) 322 #define IFCOPT1_LIPF8 (1 << 0) 323 324 #define IFCOPT2_LOOPBACK (1 << 1) 325 #define IFCOPT2_ATIO3_ONLY (1 << 0) 326 327 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 328 #define IFCOPT3_RNDASYNC (1 << 1) 329 330 /* 331 * All IOCB Queue entries are this size 332 */ 333 #define QENTRY_LEN 64 334 335 /* 336 * Command Structure Definitions 337 */ 338 339 typedef struct { 340 uint32_t ds_base; 341 uint32_t ds_count; 342 } ispds_t; 343 344 typedef struct { 345 uint32_t ds_base; 346 uint32_t ds_basehi; 347 uint32_t ds_count; 348 } ispds64_t; 349 350 #define DSTYPE_32BIT 0 351 #define DSTYPE_64BIT 1 352 typedef struct { 353 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 354 uint32_t ds_segment; /* unused */ 355 uint32_t ds_base; /* 32 bit address of DSD list */ 356 } ispdslist_t; 357 358 359 typedef struct { 360 uint8_t rqs_entry_type; 361 uint8_t rqs_entry_count; 362 uint8_t rqs_seqno; 363 uint8_t rqs_flags; 364 } isphdr_t; 365 366 /* RQS Flag definitions */ 367 #define RQSFLAG_CONTINUATION 0x01 368 #define RQSFLAG_FULL 0x02 369 #define RQSFLAG_BADHEADER 0x04 370 #define RQSFLAG_BADPACKET 0x08 371 #define RQSFLAG_BADCOUNT 0x10 372 #define RQSFLAG_BADORDER 0x20 373 #define RQSFLAG_MASK 0x3f 374 375 /* RQS entry_type definitions */ 376 #define RQSTYPE_REQUEST 0x01 377 #define RQSTYPE_DATASEG 0x02 378 #define RQSTYPE_RESPONSE 0x03 379 #define RQSTYPE_MARKER 0x04 380 #define RQSTYPE_CMDONLY 0x05 381 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 382 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 383 #define RQSTYPE_SCAM 0x08 384 #define RQSTYPE_A64 0x09 385 #define RQSTYPE_A64_CONT 0x0a 386 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 387 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 388 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 389 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 390 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 391 #define RQSTYPE_STATUS_CONT 0x10 392 #define RQSTYPE_T2RQS 0x11 393 #define RQSTYPE_CTIO7 0x12 394 #define RQSTYPE_IP_XMIT 0x13 395 #define RQSTYPE_TSK_MGMT 0x14 396 #define RQSTYPE_T4RQS 0x15 397 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 398 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 399 #define RQSTYPE_T7RQS 0x18 400 #define RQSTYPE_T3RQS 0x19 401 #define RQSTYPE_IP_XMIT_64 0x1b 402 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 403 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 404 #define RQSTYPE_RIO1 0x21 405 #define RQSTYPE_RIO2 0x22 406 #define RQSTYPE_IP_RECV 0x23 407 #define RQSTYPE_IP_RECV_CONT 0x24 408 #define RQSTYPE_CT_PASSTHRU 0x29 409 #define RQSTYPE_MS_PASSTHRU 0x29 410 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 411 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 412 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 413 #define RQSTYPE_ABORT_IO 0x33 414 #define RQSTYPE_T6RQS 0x48 415 #define RQSTYPE_LOGIN 0x52 416 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 417 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 418 419 420 #define ISP_RQDSEG 4 421 typedef struct { 422 isphdr_t req_header; 423 uint32_t req_handle; 424 uint8_t req_lun_trn; 425 uint8_t req_target; 426 uint16_t req_cdblen; 427 uint16_t req_flags; 428 uint16_t req_reserved; 429 uint16_t req_time; 430 uint16_t req_seg_count; 431 uint8_t req_cdb[12]; 432 ispds_t req_dataseg[ISP_RQDSEG]; 433 } ispreq_t; 434 #define ISP_RQDSEG_A64 2 435 436 typedef struct { 437 isphdr_t mrk_header; 438 uint32_t mrk_handle; 439 uint8_t mrk_reserved0; 440 uint8_t mrk_target; 441 uint16_t mrk_modifier; 442 uint16_t mrk_flags; 443 uint16_t mrk_lun; 444 uint8_t mrk_reserved1[48]; 445 } isp_marker_t; 446 447 typedef struct { 448 isphdr_t mrk_header; 449 uint32_t mrk_handle; 450 uint16_t mrk_nphdl; 451 uint8_t mrk_modifier; 452 uint8_t mrk_reserved0; 453 uint8_t mrk_reserved1; 454 uint8_t mrk_vphdl; 455 uint16_t mrk_reserved2; 456 uint8_t mrk_lun[8]; 457 uint8_t mrk_reserved3[40]; 458 } isp_marker_24xx_t; 459 460 461 #define SYNC_DEVICE 0 462 #define SYNC_TARGET 1 463 #define SYNC_ALL 2 464 #define SYNC_LIP 3 465 466 #define ISP_RQDSEG_T2 3 467 typedef struct { 468 isphdr_t req_header; 469 uint32_t req_handle; 470 uint8_t req_lun_trn; 471 uint8_t req_target; 472 uint16_t req_scclun; 473 uint16_t req_flags; 474 uint8_t req_crn; 475 uint8_t req_reserved; 476 uint16_t req_time; 477 uint16_t req_seg_count; 478 uint8_t req_cdb[16]; 479 uint32_t req_totalcnt; 480 ispds_t req_dataseg[ISP_RQDSEG_T2]; 481 } ispreqt2_t; 482 483 typedef struct { 484 isphdr_t req_header; 485 uint32_t req_handle; 486 uint16_t req_target; 487 uint16_t req_scclun; 488 uint16_t req_flags; 489 uint8_t req_crn; 490 uint8_t req_reserved; 491 uint16_t req_time; 492 uint16_t req_seg_count; 493 uint8_t req_cdb[16]; 494 uint32_t req_totalcnt; 495 ispds_t req_dataseg[ISP_RQDSEG_T2]; 496 } ispreqt2e_t; 497 498 #define ISP_RQDSEG_T3 2 499 typedef struct { 500 isphdr_t req_header; 501 uint32_t req_handle; 502 uint8_t req_lun_trn; 503 uint8_t req_target; 504 uint16_t req_scclun; 505 uint16_t req_flags; 506 uint8_t req_crn; 507 uint8_t req_reserved; 508 uint16_t req_time; 509 uint16_t req_seg_count; 510 uint8_t req_cdb[16]; 511 uint32_t req_totalcnt; 512 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 513 } ispreqt3_t; 514 #define ispreq64_t ispreqt3_t /* same as.... */ 515 516 typedef struct { 517 isphdr_t req_header; 518 uint32_t req_handle; 519 uint16_t req_target; 520 uint16_t req_scclun; 521 uint16_t req_flags; 522 uint8_t req_crn; 523 uint8_t req_reserved; 524 uint16_t req_time; 525 uint16_t req_seg_count; 526 uint8_t req_cdb[16]; 527 uint32_t req_totalcnt; 528 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 529 } ispreqt3e_t; 530 531 /* req_flag values */ 532 #define REQFLAG_NODISCON 0x0001 533 #define REQFLAG_HTAG 0x0002 534 #define REQFLAG_OTAG 0x0004 535 #define REQFLAG_STAG 0x0008 536 #define REQFLAG_TARGET_RTN 0x0010 537 538 #define REQFLAG_NODATA 0x0000 539 #define REQFLAG_DATA_IN 0x0020 540 #define REQFLAG_DATA_OUT 0x0040 541 #define REQFLAG_DATA_UNKNOWN 0x0060 542 543 #define REQFLAG_DISARQ 0x0100 544 #define REQFLAG_FRC_ASYNC 0x0200 545 #define REQFLAG_FRC_SYNC 0x0400 546 #define REQFLAG_FRC_WIDE 0x0800 547 #define REQFLAG_NOPARITY 0x1000 548 #define REQFLAG_STOPQ 0x2000 549 #define REQFLAG_XTRASNS 0x4000 550 #define REQFLAG_PRIORITY 0x8000 551 552 typedef struct { 553 isphdr_t req_header; 554 uint32_t req_handle; 555 uint8_t req_lun_trn; 556 uint8_t req_target; 557 uint16_t req_cdblen; 558 uint16_t req_flags; 559 uint16_t req_reserved; 560 uint16_t req_time; 561 uint16_t req_seg_count; 562 uint8_t req_cdb[44]; 563 } ispextreq_t; 564 565 566 /* 567 * ISP24XX structures 568 */ 569 typedef struct { 570 isphdr_t req_header; 571 uint32_t req_handle; 572 uint16_t req_nphdl; 573 uint16_t req_time; 574 uint16_t req_seg_count; 575 uint16_t req_reserved; 576 uint8_t req_lun[8]; 577 uint8_t req_alen_datadir; 578 uint8_t req_task_management; 579 uint8_t req_task_attribute; 580 uint8_t req_crn; 581 uint8_t req_cdb[16]; 582 uint32_t req_dl; 583 uint16_t req_tidlo; 584 uint8_t req_tidhi; 585 uint8_t req_vpidx; 586 ispds64_t req_dataseg; 587 } ispreqt7_t; 588 589 /* Task Management Request Function */ 590 typedef struct { 591 isphdr_t tmf_header; 592 uint32_t tmf_handle; 593 uint16_t tmf_nphdl; 594 uint8_t tmf_reserved0[2]; 595 uint16_t tmf_delay; 596 uint16_t tmf_timeout; 597 uint8_t tmf_lun[8]; 598 uint32_t tmf_flags; 599 uint8_t tmf_reserved1[20]; 600 uint16_t tmf_tidlo; 601 uint8_t tmf_tidhi; 602 uint8_t tmf_vpidx; 603 uint8_t tmf_reserved2[12]; 604 } isp24xx_tmf_t; 605 606 #define ISP24XX_TMF_NOSEND 0x80000000 607 608 #define ISP24XX_TMF_LUN_RESET 0x00000010 609 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 610 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 611 #define ISP24XX_TMF_TARGET_RESET 0x00000002 612 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 613 614 /* I/O Abort Structure */ 615 typedef struct { 616 isphdr_t abrt_header; 617 uint32_t abrt_handle; 618 uint16_t abrt_nphdl; 619 uint16_t abrt_options; 620 uint32_t abrt_cmd_handle; 621 uint16_t abrt_queue_number; 622 uint8_t abrt_reserved[30]; 623 uint16_t abrt_tidlo; 624 uint8_t abrt_tidhi; 625 uint8_t abrt_vpidx; 626 uint8_t abrt_reserved1[12]; 627 } isp24xx_abrt_t; 628 629 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 630 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 631 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 632 633 #define ISP_CDSEG 7 634 typedef struct { 635 isphdr_t req_header; 636 uint32_t req_reserved; 637 ispds_t req_dataseg[ISP_CDSEG]; 638 } ispcontreq_t; 639 640 #define ISP_CDSEG64 5 641 typedef struct { 642 isphdr_t req_header; 643 ispds64_t req_dataseg[ISP_CDSEG64]; 644 } ispcontreq64_t; 645 646 typedef struct { 647 isphdr_t req_header; 648 uint32_t req_handle; 649 uint16_t req_scsi_status; 650 uint16_t req_completion_status; 651 uint16_t req_state_flags; 652 uint16_t req_status_flags; 653 uint16_t req_time; 654 #define req_response_len req_time /* FC only */ 655 uint16_t req_sense_len; 656 uint32_t req_resid; 657 uint8_t req_response[8]; /* FC only */ 658 uint8_t req_sense_data[32]; 659 } ispstatusreq_t; 660 661 /* 662 * Status Continuation 663 */ 664 typedef struct { 665 isphdr_t req_header; 666 uint8_t req_sense_data[60]; 667 } ispstatus_cont_t; 668 669 /* 670 * 24XX Type 0 status 671 */ 672 typedef struct { 673 isphdr_t req_header; 674 uint32_t req_handle; 675 uint16_t req_completion_status; 676 uint16_t req_oxid; 677 uint32_t req_resid; 678 uint16_t req_reserved0; 679 uint16_t req_state_flags; 680 uint16_t req_retry_delay; /* aka Status Qualifier */ 681 uint16_t req_scsi_status; 682 uint32_t req_fcp_residual; 683 uint32_t req_sense_len; 684 uint32_t req_response_len; 685 uint8_t req_rsp_sense[28]; 686 } isp24xx_statusreq_t; 687 688 /* 689 * For Qlogic 2X00, the high order byte of SCSI status has 690 * additional meaning. 691 */ 692 #define RQCS_CR 0x1000 /* Confirmation Request */ 693 #define RQCS_RU 0x0800 /* Residual Under */ 694 #define RQCS_RO 0x0400 /* Residual Over */ 695 #define RQCS_RESID (RQCS_RU|RQCS_RO) 696 #define RQCS_SV 0x0200 /* Sense Length Valid */ 697 #define RQCS_RV 0x0100 /* FCP Response Length Valid */ 698 699 /* 700 * CT Passthru IOCB 701 */ 702 typedef struct { 703 isphdr_t ctp_header; 704 uint32_t ctp_handle; 705 uint16_t ctp_status; 706 uint16_t ctp_nphdl; /* n-port handle */ 707 uint16_t ctp_cmd_cnt; /* Command DSD count */ 708 uint8_t ctp_vpidx; 709 uint8_t ctp_reserved0; 710 uint16_t ctp_time; 711 uint16_t ctp_reserved1; 712 uint16_t ctp_rsp_cnt; /* Response DSD count */ 713 uint16_t ctp_reserved2[5]; 714 uint32_t ctp_rsp_bcnt; /* Response byte count */ 715 uint32_t ctp_cmd_bcnt; /* Command byte count */ 716 ispds64_t ctp_dataseg[2]; 717 } isp_ct_pt_t; 718 719 /* 720 * MS Passthru IOCB 721 */ 722 typedef struct { 723 isphdr_t ms_header; 724 uint32_t ms_handle; 725 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 726 uint16_t ms_status; 727 uint16_t ms_flags; 728 uint16_t ms_reserved1; /* low 8 bits */ 729 uint16_t ms_time; 730 uint16_t ms_cmd_cnt; /* Command DSD count */ 731 uint16_t ms_tot_cnt; /* Total DSD Count */ 732 uint8_t ms_type; /* MS type */ 733 uint8_t ms_r_ctl; /* R_CTL */ 734 uint16_t ms_rxid; /* RX_ID */ 735 uint16_t ms_reserved2; 736 uint32_t ms_handle2; 737 uint32_t ms_rsp_bcnt; /* Response byte count */ 738 uint32_t ms_cmd_bcnt; /* Command byte count */ 739 ispds64_t ms_dataseg[2]; 740 } isp_ms_t; 741 742 /* 743 * Completion Status Codes. 744 */ 745 #define RQCS_COMPLETE 0x0000 746 #define RQCS_DMA_ERROR 0x0002 747 #define RQCS_RESET_OCCURRED 0x0004 748 #define RQCS_ABORTED 0x0005 749 #define RQCS_TIMEOUT 0x0006 750 #define RQCS_DATA_OVERRUN 0x0007 751 #define RQCS_DATA_UNDERRUN 0x0015 752 #define RQCS_QUEUE_FULL 0x001C 753 754 /* 1X00 Only Completion Codes */ 755 #define RQCS_INCOMPLETE 0x0001 756 #define RQCS_TRANSPORT_ERROR 0x0003 757 #define RQCS_COMMAND_OVERRUN 0x0008 758 #define RQCS_STATUS_OVERRUN 0x0009 759 #define RQCS_BAD_MESSAGE 0x000a 760 #define RQCS_NO_MESSAGE_OUT 0x000b 761 #define RQCS_EXT_ID_FAILED 0x000c 762 #define RQCS_IDE_MSG_FAILED 0x000d 763 #define RQCS_ABORT_MSG_FAILED 0x000e 764 #define RQCS_REJECT_MSG_FAILED 0x000f 765 #define RQCS_NOP_MSG_FAILED 0x0010 766 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 767 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 768 #define RQCS_ID_MSG_FAILED 0x0013 769 #define RQCS_UNEXP_BUS_FREE 0x0014 770 #define RQCS_XACT_ERR1 0x0018 771 #define RQCS_XACT_ERR2 0x0019 772 #define RQCS_XACT_ERR3 0x001A 773 #define RQCS_BAD_ENTRY 0x001B 774 #define RQCS_PHASE_SKIPPED 0x001D 775 #define RQCS_ARQS_FAILED 0x001E 776 #define RQCS_WIDE_FAILED 0x001F 777 #define RQCS_SYNCXFER_FAILED 0x0020 778 #define RQCS_LVD_BUSERR 0x0021 779 780 /* 2X00 Only Completion Codes */ 781 #define RQCS_PORT_UNAVAILABLE 0x0028 782 #define RQCS_PORT_LOGGED_OUT 0x0029 783 #define RQCS_PORT_CHANGED 0x002A 784 #define RQCS_PORT_BUSY 0x002B 785 786 /* 24XX Only Completion Codes */ 787 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 788 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 789 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 790 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 791 792 793 /* 794 * 1X00 specific State Flags 795 */ 796 #define RQSF_GOT_BUS 0x0100 797 #define RQSF_GOT_TARGET 0x0200 798 #define RQSF_SENT_CDB 0x0400 799 #define RQSF_XFRD_DATA 0x0800 800 #define RQSF_GOT_STATUS 0x1000 801 #define RQSF_GOT_SENSE 0x2000 802 #define RQSF_XFER_COMPLETE 0x4000 803 804 /* 805 * 2X00 specific State Flags 806 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 807 */ 808 #define RQSF_DATA_IN 0x0020 809 #define RQSF_DATA_OUT 0x0040 810 #define RQSF_STAG 0x0008 811 #define RQSF_OTAG 0x0004 812 #define RQSF_HTAG 0x0002 813 /* 814 * 1X00 Status Flags 815 */ 816 #define RQSTF_DISCONNECT 0x0001 817 #define RQSTF_SYNCHRONOUS 0x0002 818 #define RQSTF_PARITY_ERROR 0x0004 819 #define RQSTF_BUS_RESET 0x0008 820 #define RQSTF_DEVICE_RESET 0x0010 821 #define RQSTF_ABORTED 0x0020 822 #define RQSTF_TIMEOUT 0x0040 823 #define RQSTF_NEGOTIATION 0x0080 824 825 /* 826 * 2X00 specific state flags 827 */ 828 /* RQSF_SENT_CDB */ 829 /* RQSF_XFRD_DATA */ 830 /* RQSF_GOT_STATUS */ 831 /* RQSF_XFER_COMPLETE */ 832 833 /* 834 * 2X00 specific status flags 835 */ 836 /* RQSTF_ABORTED */ 837 /* RQSTF_TIMEOUT */ 838 #define RQSTF_DMA_ERROR 0x0080 839 #define RQSTF_LOGOUT 0x2000 840 841 /* 842 * Miscellaneous 843 */ 844 #ifndef ISP_EXEC_THROTTLE 845 #define ISP_EXEC_THROTTLE 16 846 #endif 847 848 /* 849 * About Firmware returns an 'attribute' word in mailbox 6. 850 * These attributes are for 2200 and 2300. 851 */ 852 #define ISP_FW_ATTR_TMODE 0x0001 853 #define ISP_FW_ATTR_SCCLUN 0x0002 854 #define ISP_FW_ATTR_FABRIC 0x0004 855 #define ISP_FW_ATTR_CLASS2 0x0008 856 #define ISP_FW_ATTR_FCTAPE 0x0010 857 #define ISP_FW_ATTR_IP 0x0020 858 #define ISP_FW_ATTR_VI 0x0040 859 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 860 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 861 862 /* and these are for the 2400 */ 863 #define ISP2400_FW_ATTR_CLASS2 0x0001 864 #define ISP2400_FW_ATTR_IP 0x0002 865 #define ISP2400_FW_ATTR_MULTIID 0x0004 866 #define ISP2400_FW_ATTR_SB2 0x0008 867 #define ISP2400_FW_ATTR_T10CRC 0x0010 868 #define ISP2400_FW_ATTR_VI 0x0020 869 #define ISP2400_FW_ATTR_MQ 0x0040 870 #define ISP2400_FW_ATTR_MSIX 0x0080 871 #define ISP2400_FW_ATTR_FCOE 0x0800 872 #define ISP2400_FW_ATTR_VP0 0x1000 873 #define ISP2400_FW_ATTR_EXPFW 0x2000 874 #define ISP2400_FW_ATTR_HOTFW 0x4000 875 #define ISP2400_FW_ATTR_EXTNDED 0x8000 876 #define ISP2400_FW_ATTR_EXTVP 0x00010000 877 #define ISP2400_FW_ATTR_VN2VN 0x00040000 878 #define ISP2400_FW_ATTR_EXMOFF 0x00080000 879 #define ISP2400_FW_ATTR_NPMOFF 0x00100000 880 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000 881 #define ISP2400_FW_ATTR_SRIOV 0x02000000 882 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000 883 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000 884 885 /* 886 * These are either manifestly true or are dependent on f/w attributes 887 */ 888 #define ISP_CAP_TMODE(isp) \ 889 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 890 #define ISP_CAP_SCCFW(isp) \ 891 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 892 #define ISP_CAP_2KLOGIN(isp) \ 893 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 894 895 /* 896 * This is only true for 24XX cards with this f/w attribute 897 */ 898 #define ISP_CAP_MULTI_ID(isp) \ 899 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 900 #define ISP_GET_VPIDX(isp, tag) \ 901 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 902 #define ISP_CAP_MSIX(isp) \ 903 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MSIX) : 0) 904 #define ISP_CAP_VP0(isp) \ 905 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0) 906 907 /* 908 * This is true manifestly or is dependent on a f/w attribute 909 * but may or may not actually be *enabled*. In any case, it 910 * is enabled on a per-channel basis. 911 */ 912 #define ISP_CAP_FCTAPE(isp) \ 913 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 914 915 #define ISP_FCTAPE_ENABLED(isp, chan) \ 916 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 917 918 /* 919 * Reduced Interrupt Operation Response Queue Entries 920 */ 921 922 typedef struct { 923 isphdr_t req_header; 924 uint32_t req_handles[15]; 925 } isp_rio1_t; 926 927 typedef struct { 928 isphdr_t req_header; 929 uint16_t req_handles[30]; 930 } isp_rio2_t; 931 932 /* 933 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 934 */ 935 936 /* 937 * Initialization Control Block 938 * 939 * Version One (prime) format. 940 */ 941 typedef struct { 942 uint8_t icb_version; 943 uint8_t icb_reserved0; 944 uint16_t icb_fwoptions; 945 uint16_t icb_maxfrmlen; 946 uint16_t icb_maxalloc; 947 uint16_t icb_execthrottle; 948 uint8_t icb_retry_count; 949 uint8_t icb_retry_delay; 950 uint8_t icb_portname[8]; 951 uint16_t icb_hardaddr; 952 uint8_t icb_iqdevtype; 953 uint8_t icb_logintime; 954 uint8_t icb_nodename[8]; 955 uint16_t icb_rqstout; 956 uint16_t icb_rspnsin; 957 uint16_t icb_rqstqlen; 958 uint16_t icb_rsltqlen; 959 uint16_t icb_rqstaddr[4]; 960 uint16_t icb_respaddr[4]; 961 uint16_t icb_lunenables; 962 uint8_t icb_ccnt; 963 uint8_t icb_icnt; 964 uint16_t icb_lunetimeout; 965 uint16_t icb_reserved1; 966 uint16_t icb_xfwoptions; 967 uint8_t icb_racctimer; 968 uint8_t icb_idelaytimer; 969 uint16_t icb_zfwoptions; 970 uint16_t icb_reserved2[13]; 971 } isp_icb_t; 972 973 #define ICB_VERSION1 1 974 975 #define ICBOPT_EXTENDED 0x8000 976 #define ICBOPT_BOTH_WWNS 0x4000 977 #define ICBOPT_FULL_LOGIN 0x2000 978 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 979 #define ICBOPT_PREV_ADDRESS 0x0800 980 #define ICBOPT_SRCHDOWN 0x0400 981 #define ICBOPT_NOLIP 0x0200 982 #define ICBOPT_PDBCHANGE_AE 0x0100 983 #define ICBOPT_TGT_TYPE 0x0080 984 #define ICBOPT_INI_ADISC 0x0040 985 #define ICBOPT_INI_DISABLE 0x0020 986 #define ICBOPT_TGT_ENABLE 0x0010 987 #define ICBOPT_FAST_POST 0x0008 988 #define ICBOPT_FULL_DUPLEX 0x0004 989 #define ICBOPT_FAIRNESS 0x0002 990 #define ICBOPT_HARD_ADDRESS 0x0001 991 992 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 993 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 994 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 995 #define ICBXOPT_FCTAPE 0x1000 996 #define ICBXOPT_CLASS2_ACK0 0x0200 997 #define ICBXOPT_CLASS2 0x0100 998 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 999 #define ICBXOPT_TOPO_MASK 0x0070 1000 #define ICBXOPT_LOOP_ONLY 0x0000 1001 #define ICBXOPT_PTP_ONLY 0x0010 1002 #define ICBXOPT_LOOP_2_PTP 0x0020 1003 #define ICBXOPT_PTP_2_LOOP 0x0030 1004 /* 1005 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 1006 * RIO is not defined for the 23XX cards (just 2200) 1007 */ 1008 #define ICBXOPT_RIO_OFF 0 1009 #define ICBXOPT_RIO_16BIT 1 1010 #define ICBXOPT_RIO_32BIT 2 1011 #define ICBXOPT_RIO_16BIT_IOCB 3 1012 #define ICBXOPT_RIO_32BIT_IOCB 4 1013 #define ICBXOPT_ZIO 5 1014 #define ICBXOPT_TIMER_MASK 0x7 1015 1016 #define ICBZOPT_RATE_MASK 0xC000 1017 #define ICBZOPT_RATE_1GB 0x0000 1018 #define ICBZOPT_RATE_AUTO 0x8000 1019 #define ICBZOPT_RATE_2GB 0x4000 1020 #define ICBZOPT_50_OHM 0x2000 1021 #define ICBZOPT_NO_LOCAL_PLOGI 0x0080 1022 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 1023 #define ICBZOPT_RSPSZ_MASK 0x0030 1024 #define ICBZOPT_RSPSZ_24 0x0000 1025 #define ICBZOPT_RSPSZ_12 0x0010 1026 #define ICBZOPT_RSPSZ_24A 0x0020 1027 #define ICBZOPT_RSPSZ_32 0x0030 1028 #define ICBZOPT_SOFTID 0x0002 1029 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 1030 1031 /* 2400 F/W options */ 1032 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 1033 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 1034 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800 1035 #define ICB2400_OPT1_SRCHDOWN 0x00000400 1036 #define ICB2400_OPT1_NOLIP 0x00000200 1037 #define ICB2400_OPT1_INI_DISABLE 0x00000020 1038 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 1039 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 1040 #define ICB2400_OPT1_FAIRNESS 0x00000002 1041 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 1042 1043 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000 1044 #define ICB2400_OPT2_ENA_IHA 0x04000000 1045 #define ICB2400_OPT2_QOS 0x02000000 1046 #define ICB2400_OPT2_IOCBS 0x01000000 1047 #define ICB2400_OPT2_ENA_IHR 0x00400000 1048 #define ICB2400_OPT2_ENA_VMS 0x00200000 1049 #define ICB2400_OPT2_ENA_TA 0x00100000 1050 #define ICB2400_OPT2_TPRLIC 0x00004000 1051 #define ICB2400_OPT2_FCTAPE 0x00001000 1052 #define ICB2400_OPT2_FCSP 0x00000800 1053 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 1054 #define ICB2400_OPT2_CLASS2 0x00000100 1055 #define ICB2400_OPT2_NO_PLAY 0x00000080 1056 #define ICB2400_OPT2_TOPO_MASK 0x00000070 1057 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 1058 #define ICB2400_OPT2_PTP_ONLY 0x00000010 1059 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 1060 #define ICB2400_OPT2_TIMER_MASK 0x0000000f 1061 #define ICB2400_OPT2_ZIO 0x00000005 1062 #define ICB2400_OPT2_ZIO1 0x00000006 1063 1064 #define ICB2400_OPT3_NO_CTXDIS 0x40000000 1065 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000 1066 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000 1067 #define ICB2400_OPT3_ENA_MFCF 0x00020000 1068 #define ICB2400_OPT3_SKIP_4GB 0x00010000 1069 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1070 #define ICB2400_OPT3_RATE_1GB 0x00000000 1071 #define ICB2400_OPT3_RATE_2GB 0x00002000 1072 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1073 #define ICB2400_OPT3_RATE_4GB 0x00006000 1074 #define ICB2400_OPT3_RATE_8GB 0x00008000 1075 #define ICB2400_OPT3_RATE_16GB 0x0000A000 1076 #define ICB2400_OPT3_RATE_32GB 0x0000C000 1077 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1078 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100 1079 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1080 #define ICB2400_OPT3_ENA_OOF 0x00000040 1081 /* note that a response size flag of zero is reserved! */ 1082 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1083 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1084 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1085 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1086 #define ICB2400_OPT3_SOFTID 0x00000002 1087 1088 #define ICB_MIN_FRMLEN 256 1089 #define ICB_MAX_FRMLEN 2112 1090 #define ICB_DFLT_FRMLEN 1024 1091 #define ICB_DFLT_ALLOC 256 1092 #define ICB_DFLT_THROTTLE 16 1093 #define ICB_DFLT_RDELAY 5 1094 #define ICB_DFLT_RCOUNT 3 1095 1096 #define ICB_LOGIN_TOV 10 1097 #define ICB_LUN_ENABLE_TOV 15 1098 1099 1100 /* 1101 * And somebody at QLogic had a great idea that you could just change 1102 * the structure *and* keep the version number the same as the other cards. 1103 */ 1104 typedef struct { 1105 uint16_t icb_version; 1106 uint16_t icb_reserved0; 1107 uint16_t icb_maxfrmlen; 1108 uint16_t icb_execthrottle; 1109 uint16_t icb_xchgcnt; 1110 uint16_t icb_hardaddr; 1111 uint8_t icb_portname[8]; 1112 uint8_t icb_nodename[8]; 1113 uint16_t icb_rspnsin; 1114 uint16_t icb_rqstout; 1115 uint16_t icb_retry_count; 1116 uint16_t icb_priout; 1117 uint16_t icb_rsltqlen; 1118 uint16_t icb_rqstqlen; 1119 uint16_t icb_ldn_nols; 1120 uint16_t icb_prqstqlen; 1121 uint16_t icb_rqstaddr[4]; 1122 uint16_t icb_respaddr[4]; 1123 uint16_t icb_priaddr[4]; 1124 uint16_t icb_msixresp; 1125 uint16_t icb_msixatio; 1126 uint16_t icb_reserved1[2]; 1127 uint16_t icb_atio_in; 1128 uint16_t icb_atioqlen; 1129 uint16_t icb_atioqaddr[4]; 1130 uint16_t icb_idelaytimer; 1131 uint16_t icb_logintime; 1132 uint32_t icb_fwoptions1; 1133 uint32_t icb_fwoptions2; 1134 uint32_t icb_fwoptions3; 1135 uint16_t icb_qos; 1136 uint16_t icb_reserved2[3]; 1137 uint16_t icb_enodemac[3]; 1138 uint16_t icb_disctime; 1139 uint16_t icb_reserved3[4]; 1140 } isp_icb_2400_t; 1141 1142 #define RQRSP_ADDR0015 0 1143 #define RQRSP_ADDR1631 1 1144 #define RQRSP_ADDR3247 2 1145 #define RQRSP_ADDR4863 3 1146 1147 1148 #define ICB_NNM0 7 1149 #define ICB_NNM1 6 1150 #define ICB_NNM2 5 1151 #define ICB_NNM3 4 1152 #define ICB_NNM4 3 1153 #define ICB_NNM5 2 1154 #define ICB_NNM6 1 1155 #define ICB_NNM7 0 1156 1157 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1158 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1159 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1160 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1161 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1162 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1163 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1164 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1165 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1166 1167 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1168 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1169 ((uint64_t) array[ICB_NNM1] << 8) | \ 1170 ((uint64_t) array[ICB_NNM2] << 16) | \ 1171 ((uint64_t) array[ICB_NNM3] << 24) | \ 1172 ((uint64_t) array[ICB_NNM4] << 32) | \ 1173 ((uint64_t) array[ICB_NNM5] << 40) | \ 1174 ((uint64_t) array[ICB_NNM6] << 48) | \ 1175 ((uint64_t) array[ICB_NNM7] << 56) 1176 1177 1178 /* 1179 * For MULTI_ID firmware, this describes a 1180 * virtual port entity for getting status. 1181 */ 1182 typedef struct { 1183 uint16_t vp_port_status; 1184 uint8_t vp_port_options; 1185 uint8_t vp_port_loopid; 1186 uint8_t vp_port_portname[8]; 1187 uint8_t vp_port_nodename[8]; 1188 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1189 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1190 } vp_port_info_t; 1191 1192 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */ 1193 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */ 1194 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */ 1195 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */ 1196 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */ 1197 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */ 1198 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */ 1199 1200 #define ICB2400_VPOPT_WRITE_SIZE 20 1201 1202 /* 1203 * For MULTI_ID firmware, we append this structure 1204 * to the isp_icb_2400_t above, followed by a list 1205 * structures that are *most* of the vp_port_info_t. 1206 */ 1207 typedef struct { 1208 uint16_t vp_count; 1209 uint16_t vp_global_options; 1210 } isp_icb_2400_vpinfo_t; 1211 1212 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1213 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1214 (ICB2400_VPINFO_OFF + \ 1215 sizeof (isp_icb_2400_vpinfo_t) + ((chan) * ICB2400_VPOPT_WRITE_SIZE)) 1216 1217 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1218 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1219 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1220 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */ 1221 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */ 1222 1223 typedef struct { 1224 isphdr_t vp_ctrl_hdr; 1225 uint32_t vp_ctrl_handle; 1226 uint16_t vp_ctrl_index_fail; 1227 uint16_t vp_ctrl_status; 1228 uint16_t vp_ctrl_command; 1229 uint16_t vp_ctrl_vp_count; 1230 uint16_t vp_ctrl_idmap[16]; 1231 uint16_t vp_ctrl_reserved[7]; 1232 uint16_t vp_ctrl_fcf_index; 1233 } vp_ctrl_info_t; 1234 1235 #define VP_CTRL_CMD_ENABLE_VP 0x00 1236 #define VP_CTRL_CMD_DISABLE_VP 0x08 1237 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09 1238 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A 1239 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B 1240 1241 /* 1242 * We can use this structure for modifying either one or two VP ports after initialization 1243 */ 1244 typedef struct { 1245 isphdr_t vp_mod_hdr; 1246 uint32_t vp_mod_hdl; 1247 uint16_t vp_mod_reserved0; 1248 uint16_t vp_mod_status; 1249 uint8_t vp_mod_cmd; 1250 uint8_t vp_mod_cnt; 1251 uint8_t vp_mod_idx0; 1252 uint8_t vp_mod_idx1; 1253 struct { 1254 uint8_t options; 1255 uint8_t loopid; 1256 uint16_t reserved1; 1257 uint8_t wwpn[8]; 1258 uint8_t wwnn[8]; 1259 } vp_mod_ports[2]; 1260 uint8_t vp_mod_reserved2[8]; 1261 } vp_modify_t; 1262 1263 #define VP_STS_OK 0x00 1264 #define VP_STS_ERR 0x01 1265 #define VP_CNT_ERR 0x02 1266 #define VP_GEN_ERR 0x03 1267 #define VP_IDX_ERR 0x04 1268 #define VP_STS_BSY 0x05 1269 1270 #define VP_MODIFY 0x00 1271 #define VP_MODIFY_ENA 0x01 1272 #define VP_MODIFY_OPT 0x02 1273 #define VP_RESUME 0x03 1274 1275 /* 1276 * Port Data Base Element 1277 */ 1278 1279 typedef struct { 1280 uint16_t pdb_options; 1281 uint8_t pdb_mstate; 1282 uint8_t pdb_sstate; 1283 uint8_t pdb_hardaddr_bits[4]; 1284 uint8_t pdb_portid_bits[4]; 1285 uint8_t pdb_nodename[8]; 1286 uint8_t pdb_portname[8]; 1287 uint16_t pdb_execthrottle; 1288 uint16_t pdb_exec_count; 1289 uint8_t pdb_retry_count; 1290 uint8_t pdb_retry_delay; 1291 uint16_t pdb_resalloc; 1292 uint16_t pdb_curalloc; 1293 uint16_t pdb_qhead; 1294 uint16_t pdb_qtail; 1295 uint16_t pdb_tl_next; 1296 uint16_t pdb_tl_last; 1297 uint16_t pdb_features; /* PLOGI, Common Service */ 1298 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1299 uint16_t pdb_roi; /* PLOGI, Common Service */ 1300 uint8_t pdb_target; 1301 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1302 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1303 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1304 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1305 uint16_t pdb_labrtflg; 1306 uint16_t pdb_lstopflg; 1307 uint16_t pdb_sqhead; 1308 uint16_t pdb_sqtail; 1309 uint16_t pdb_ptimer; 1310 uint16_t pdb_nxt_seqid; 1311 uint16_t pdb_fcount; 1312 uint16_t pdb_prli_len; 1313 uint16_t pdb_prli_svc0; 1314 uint16_t pdb_prli_svc3; 1315 uint16_t pdb_loopid; 1316 uint16_t pdb_il_ptr; 1317 uint16_t pdb_sl_ptr; 1318 } isp_pdb_21xx_t; 1319 1320 #define PDB_OPTIONS_XMITTING (1<<11) 1321 #define PDB_OPTIONS_LNKXMIT (1<<10) 1322 #define PDB_OPTIONS_ABORTED (1<<9) 1323 #define PDB_OPTIONS_ADISC (1<<1) 1324 1325 #define PDB_STATE_DISCOVERY 0 1326 #define PDB_STATE_WDISC_ACK 1 1327 #define PDB_STATE_PLOGI 2 1328 #define PDB_STATE_PLOGI_ACK 3 1329 #define PDB_STATE_PRLI 4 1330 #define PDB_STATE_PRLI_ACK 5 1331 #define PDB_STATE_LOGGED_IN 6 1332 #define PDB_STATE_PORT_UNAVAIL 7 1333 #define PDB_STATE_PRLO 8 1334 #define PDB_STATE_PRLO_ACK 9 1335 #define PDB_STATE_PLOGO 10 1336 #define PDB_STATE_PLOG_ACK 11 1337 1338 #define SVC3_ROLE_MASK 0x30 1339 #define SVC3_ROLE_SHIFT 4 1340 1341 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1342 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1343 1344 /* 1345 * Port Data Base Element- 24XX cards 1346 */ 1347 typedef struct { 1348 uint16_t pdb_flags; 1349 uint8_t pdb_curstate; 1350 uint8_t pdb_laststate; 1351 uint8_t pdb_hardaddr_bits[4]; 1352 uint8_t pdb_portid_bits[4]; 1353 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1354 uint16_t pdb_retry_timer; 1355 uint16_t pdb_handle; 1356 uint16_t pdb_rcv_dsize; 1357 uint16_t pdb_reserved0; 1358 uint16_t pdb_prli_svc0; 1359 uint16_t pdb_prli_svc3; 1360 uint8_t pdb_portname[8]; 1361 uint8_t pdb_nodename[8]; 1362 uint8_t pdb_reserved1[24]; 1363 } isp_pdb_24xx_t; 1364 1365 #define PDB2400_TID_SUPPORTED 0x4000 1366 #define PDB2400_FC_TAPE 0x0080 1367 #define PDB2400_CLASS2_ACK0 0x0040 1368 #define PDB2400_FCP_CONF 0x0020 1369 #define PDB2400_CLASS2 0x0010 1370 #define PDB2400_ADDR_VALID 0x0002 1371 1372 #define PDB2400_STATE_PLOGI_PEND 0x03 1373 #define PDB2400_STATE_PLOGI_DONE 0x04 1374 #define PDB2400_STATE_PRLI_PEND 0x05 1375 #define PDB2400_STATE_LOGGED_IN 0x06 1376 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1377 #define PDB2400_STATE_PRLO_PEND 0x09 1378 #define PDB2400_STATE_LOGO_PEND 0x0B 1379 1380 /* 1381 * Common elements from the above two structures that are actually useful to us. 1382 */ 1383 typedef struct { 1384 uint16_t handle; 1385 uint16_t prli_word0; 1386 uint16_t prli_word3; 1387 uint32_t : 8, 1388 portid : 24; 1389 uint8_t portname[8]; 1390 uint8_t nodename[8]; 1391 } isp_pdb_t; 1392 1393 /* 1394 * Port/Node Name List Element 1395 */ 1396 typedef struct { 1397 uint8_t pnnle_name[8]; 1398 uint16_t pnnle_handle; 1399 uint16_t pnnle_reserved; 1400 } isp_pnnle_t; 1401 1402 #define PNNL_OPTIONS_NODE_NAMES (1<<0) 1403 #define PNNL_OPTIONS_PORT_DATA (1<<2) 1404 #define PNNL_OPTIONS_INITIATORS (1<<3) 1405 1406 /* 1407 * Port and N-Port Handle List Element 1408 */ 1409 typedef struct { 1410 uint16_t pnhle_port_id_lo; 1411 uint16_t pnhle_port_id_hi_handle; 1412 } isp_pnhle_21xx_t; 1413 1414 typedef struct { 1415 uint16_t pnhle_port_id_lo; 1416 uint16_t pnhle_port_id_hi; 1417 uint16_t pnhle_handle; 1418 } isp_pnhle_23xx_t; 1419 1420 typedef struct { 1421 uint16_t pnhle_port_id_lo; 1422 uint16_t pnhle_port_id_hi; 1423 uint16_t pnhle_handle; 1424 uint16_t pnhle_reserved; 1425 } isp_pnhle_24xx_t; 1426 1427 /* 1428 * Port Database Changed Async Event information for 24XX cards 1429 */ 1430 /* N-Port Handle */ 1431 #define PDB24XX_AE_GLOBAL 0xFFFF 1432 1433 /* Reason Codes */ 1434 #define PDB24XX_AE_OK 0x00 1435 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1436 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1437 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1438 #define PDB24XX_AE_PLOGI_RCVD 0x04 1439 #define PDB24XX_AE_PLOGI_RJT 0x05 1440 #define PDB24XX_AE_PRLI_RCVD 0x06 1441 #define PDB24XX_AE_PRLI_RJT 0x07 1442 #define PDB24XX_AE_TPRLO 0x08 1443 #define PDB24XX_AE_TPRLO_RJT 0x09 1444 #define PDB24XX_AE_PRLO_RCVD 0x0a 1445 #define PDB24XX_AE_LOGO_RCVD 0x0b 1446 #define PDB24XX_AE_TOPO_CHG 0x0c 1447 #define PDB24XX_AE_NPORT_CHG 0x0d 1448 #define PDB24XX_AE_FLOGI_RJT 0x0e 1449 #define PDB24XX_AE_BAD_FANN 0x0f 1450 #define PDB24XX_AE_FLOGI_TIMO 0x10 1451 #define PDB24XX_AE_ABX_LOGO 0x11 1452 #define PDB24XX_AE_PLOGI_DONE 0x12 1453 #define PDB24XX_AE_PRLI_DONE 0x13 1454 #define PDB24XX_AE_OPN_1 0x14 1455 #define PDB24XX_AE_OPN_2 0x15 1456 #define PDB24XX_AE_TXERR 0x16 1457 #define PDB24XX_AE_FORCED_LOGO 0x17 1458 #define PDB24XX_AE_DISC_TIMO 0x18 1459 1460 /* 1461 * Genericized Port Login/Logout software structure 1462 */ 1463 typedef struct { 1464 uint16_t handle; 1465 uint16_t channel; 1466 uint32_t 1467 flags : 8, 1468 portid : 24; 1469 } isp_plcmd_t; 1470 /* the flags to use are those for PLOGX_FLG_* below */ 1471 1472 /* 1473 * ISP24XX- Login/Logout Port IOCB 1474 */ 1475 typedef struct { 1476 isphdr_t plogx_header; 1477 uint32_t plogx_handle; 1478 uint16_t plogx_status; 1479 uint16_t plogx_nphdl; 1480 uint16_t plogx_flags; 1481 uint16_t plogx_vphdl; /* low 8 bits */ 1482 uint16_t plogx_portlo; /* low 16 bits */ 1483 uint16_t plogx_rspsz_porthi; 1484 struct { 1485 uint16_t lo16; 1486 uint16_t hi16; 1487 } plogx_ioparm[11]; 1488 } isp_plogx_t; 1489 1490 #define PLOGX_STATUS_OK 0x00 1491 #define PLOGX_STATUS_UNAVAIL 0x28 1492 #define PLOGX_STATUS_LOGOUT 0x29 1493 #define PLOGX_STATUS_IOCBERR 0x31 1494 1495 #define PLOGX_IOCBERR_NOLINK 0x01 1496 #define PLOGX_IOCBERR_NOIOCB 0x02 1497 #define PLOGX_IOCBERR_NOXGHG 0x03 1498 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1499 #define PLOGX_IOCBERR_NOFABRIC 0x05 1500 #define PLOGX_IOCBERR_NOTREADY 0x07 1501 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */ 1502 #define PLOGX_IOCBERR_NOPCB 0x0a 1503 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1504 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1505 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1506 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1507 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1508 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1509 1510 #define PLOGX_FLG_CMD_MASK 0xf 1511 #define PLOGX_FLG_CMD_PLOGI 0 1512 #define PLOGX_FLG_CMD_PRLI 1 1513 #define PLOGX_FLG_CMD_PDISC 2 1514 #define PLOGX_FLG_CMD_LOGO 8 1515 #define PLOGX_FLG_CMD_PRLO 9 1516 #define PLOGX_FLG_CMD_TPRLO 10 1517 1518 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1519 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1520 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1521 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1522 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1523 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1524 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1525 1526 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1527 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1528 1529 /* 1530 * Report ID Acquisistion (24XX multi-id firmware) 1531 */ 1532 typedef struct { 1533 isphdr_t ridacq_hdr; 1534 uint32_t ridacq_handle; 1535 uint8_t ridacq_vp_acquired; 1536 uint8_t ridacq_vp_setup; 1537 uint8_t ridacq_vp_index; 1538 uint8_t ridacq_vp_status; 1539 uint16_t ridacq_vp_port_lo; 1540 uint8_t ridacq_vp_port_hi; 1541 uint8_t ridacq_format; /* 0 or 1 */ 1542 uint16_t ridacq_map[8]; 1543 uint8_t ridacq_reserved1[32]; 1544 } isp_ridacq_t; 1545 1546 #define RIDACQ_STS_COMPLETE 0 1547 #define RIDACQ_STS_UNACQUIRED 1 1548 #define RIDACQ_STS_CHANGED 2 1549 #define RIDACQ_STS_SNS_TIMEOUT 3 1550 #define RIDACQ_STS_SNS_REJECTED 4 1551 #define RIDACQ_STS_SCR_TIMEOUT 5 1552 #define RIDACQ_STS_SCR_REJECTED 6 1553 1554 /* 1555 * Simple Name Server Data Structures 1556 */ 1557 #define SNS_GA_NXT 0x100 1558 #define SNS_GPN_ID 0x112 1559 #define SNS_GNN_ID 0x113 1560 #define SNS_GFT_ID 0x117 1561 #define SNS_GFF_ID 0x11F 1562 #define SNS_GID_FT 0x171 1563 #define SNS_GID_PT 0x1A1 1564 #define SNS_RFT_ID 0x217 1565 #define SNS_RSPN_ID 0x218 1566 #define SNS_RFF_ID 0x21F 1567 #define SNS_RSNN_NN 0x239 1568 typedef struct { 1569 uint16_t snscb_rblen; /* response buffer length (words) */ 1570 uint16_t snscb_reserved0; 1571 uint16_t snscb_addr[4]; /* response buffer address */ 1572 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1573 uint16_t snscb_reserved1; 1574 uint16_t snscb_data[]; /* variable data */ 1575 } sns_screq_t; /* Subcommand Request Structure */ 1576 1577 typedef struct { 1578 uint16_t snscb_rblen; /* response buffer length (words) */ 1579 uint16_t snscb_reserved0; 1580 uint16_t snscb_addr[4]; /* response buffer address */ 1581 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1582 uint16_t snscb_reserved1; 1583 uint16_t snscb_cmd; 1584 uint16_t snscb_reserved2; 1585 uint32_t snscb_reserved3; 1586 uint32_t snscb_port; 1587 } sns_ga_nxt_req_t; 1588 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1589 1590 typedef struct { /* Used for GFT_ID, GFF_ID, etc. */ 1591 uint16_t snscb_rblen; /* response buffer length (words) */ 1592 uint16_t snscb_reserved0; 1593 uint16_t snscb_addr[4]; /* response buffer address */ 1594 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1595 uint16_t snscb_reserved1; 1596 uint16_t snscb_cmd; 1597 uint16_t snscb_mword_div_2; 1598 uint32_t snscb_reserved3; 1599 uint32_t snscb_portid; 1600 } sns_gxx_id_req_t; 1601 #define SNS_GXX_ID_REQ_SIZE (sizeof (sns_gxx_id_req_t)) 1602 1603 typedef struct { 1604 uint16_t snscb_rblen; /* response buffer length (words) */ 1605 uint16_t snscb_reserved0; 1606 uint16_t snscb_addr[4]; /* response buffer address */ 1607 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1608 uint16_t snscb_reserved1; 1609 uint16_t snscb_cmd; 1610 uint16_t snscb_mword_div_2; 1611 uint32_t snscb_reserved3; 1612 uint32_t snscb_fc4_type; 1613 } sns_gid_ft_req_t; 1614 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1615 1616 typedef struct { 1617 uint16_t snscb_rblen; /* response buffer length (words) */ 1618 uint16_t snscb_reserved0; 1619 uint16_t snscb_addr[4]; /* response buffer address */ 1620 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1621 uint16_t snscb_reserved1; 1622 uint16_t snscb_cmd; 1623 uint16_t snscb_mword_div_2; 1624 uint32_t snscb_reserved3; 1625 uint8_t snscb_port_type; 1626 uint8_t snscb_domain; 1627 uint8_t snscb_area; 1628 uint8_t snscb_flags; 1629 } sns_gid_pt_req_t; 1630 #define SNS_GID_PT_REQ_SIZE (sizeof (sns_gid_pt_req_t)) 1631 1632 typedef struct { 1633 uint16_t snscb_rblen; /* response buffer length (words) */ 1634 uint16_t snscb_reserved0; 1635 uint16_t snscb_addr[4]; /* response buffer address */ 1636 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1637 uint16_t snscb_reserved1; 1638 uint16_t snscb_cmd; 1639 uint16_t snscb_reserved2; 1640 uint32_t snscb_reserved3; 1641 uint32_t snscb_port; 1642 uint32_t snscb_fc4_types[8]; 1643 } sns_rft_id_req_t; 1644 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1645 1646 typedef struct { 1647 ct_hdr_t snscb_cthdr; 1648 uint8_t snscb_port_type; 1649 uint8_t snscb_port_id[3]; 1650 uint8_t snscb_portname[8]; 1651 uint16_t snscb_data[]; /* variable data */ 1652 } sns_scrsp_t; /* Subcommand Response Structure */ 1653 1654 typedef struct { 1655 ct_hdr_t snscb_cthdr; 1656 uint8_t snscb_port_type; 1657 uint8_t snscb_port_id[3]; 1658 uint8_t snscb_portname[8]; 1659 uint8_t snscb_pnlen; /* symbolic port name length */ 1660 uint8_t snscb_pname[255]; /* symbolic port name */ 1661 uint8_t snscb_nodename[8]; 1662 uint8_t snscb_nnlen; /* symbolic node name length */ 1663 uint8_t snscb_nname[255]; /* symbolic node name */ 1664 uint8_t snscb_ipassoc[8]; 1665 uint8_t snscb_ipaddr[16]; 1666 uint8_t snscb_svc_class[4]; 1667 uint8_t snscb_fc4_types[32]; 1668 uint8_t snscb_fpname[8]; 1669 uint8_t snscb_reserved; 1670 uint8_t snscb_hardaddr[3]; 1671 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1672 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1673 1674 typedef struct { 1675 ct_hdr_t snscb_cthdr; 1676 uint8_t snscb_wwn[8]; 1677 } sns_gxn_id_rsp_t; 1678 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1679 1680 typedef struct { 1681 ct_hdr_t snscb_cthdr; 1682 uint32_t snscb_fc4_types[8]; 1683 } sns_gft_id_rsp_t; 1684 #define SNS_GFT_ID_RESP_SIZE (sizeof (sns_gft_id_rsp_t)) 1685 1686 typedef struct { 1687 ct_hdr_t snscb_cthdr; 1688 uint32_t snscb_fc4_features[32]; 1689 } sns_gff_id_rsp_t; 1690 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1691 1692 typedef struct { /* Used for GID_FT, GID_PT, etc. */ 1693 ct_hdr_t snscb_cthdr; 1694 struct { 1695 uint8_t control; 1696 uint8_t portid[3]; 1697 } snscb_ports[1]; 1698 } sns_gid_xx_rsp_t; 1699 #define SNS_GID_XX_RESP_SIZE(x) ((sizeof (sns_gid_xx_rsp_t)) + ((x - 1) << 2)) 1700 1701 /* 1702 * Other Misc Structures 1703 */ 1704 1705 /* ELS Pass Through */ 1706 typedef struct { 1707 isphdr_t els_hdr; 1708 uint32_t els_handle; 1709 uint16_t els_status; 1710 uint16_t els_nphdl; 1711 uint16_t els_xmit_dsd_count; /* outgoing only */ 1712 uint8_t els_vphdl; 1713 uint8_t els_sof; 1714 uint32_t els_rxid; 1715 uint16_t els_recv_dsd_count; /* outgoing only */ 1716 uint8_t els_opcode; 1717 uint8_t els_reserved1; 1718 uint8_t els_did_lo; 1719 uint8_t els_did_mid; 1720 uint8_t els_did_hi; 1721 uint8_t els_reserved2; 1722 uint16_t els_reserved3; 1723 uint16_t els_ctl_flags; 1724 union { 1725 struct { 1726 uint32_t _els_bytecnt; 1727 uint32_t _els_subcode1; 1728 uint32_t _els_subcode2; 1729 uint8_t _els_reserved4[20]; 1730 } in; 1731 struct { 1732 uint32_t _els_recv_bytecnt; 1733 uint32_t _els_xmit_bytecnt; 1734 uint32_t _els_xmit_dsd_length; 1735 uint16_t _els_xmit_dsd_a1500; 1736 uint16_t _els_xmit_dsd_a3116; 1737 uint16_t _els_xmit_dsd_a4732; 1738 uint16_t _els_xmit_dsd_a6348; 1739 uint32_t _els_recv_dsd_length; 1740 uint16_t _els_recv_dsd_a1500; 1741 uint16_t _els_recv_dsd_a3116; 1742 uint16_t _els_recv_dsd_a4732; 1743 uint16_t _els_recv_dsd_a6348; 1744 } out; 1745 } inout; 1746 #define els_bytecnt inout.in._els_bytecnt 1747 #define els_subcode1 inout.in._els_subcode1 1748 #define els_subcode2 inout.in._els_subcode2 1749 #define els_reserved4 inout.in._els_reserved4 1750 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1751 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1752 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1753 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1754 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1755 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1756 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1757 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1758 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1759 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1760 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1761 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1762 } els_t; 1763 1764 /* 1765 * A handy package structure for running FC-SCSI commands internally 1766 */ 1767 typedef struct { 1768 uint16_t handle; 1769 uint16_t lun; 1770 uint32_t 1771 channel : 8, 1772 portid : 24; 1773 uint32_t timeout; 1774 union { 1775 struct { 1776 uint32_t data_length; 1777 uint32_t 1778 no_wait : 1, 1779 do_read : 1; 1780 uint8_t cdb[16]; 1781 void *data_ptr; 1782 } beg; 1783 struct { 1784 uint32_t data_residual; 1785 uint8_t status; 1786 uint8_t pad; 1787 uint16_t sense_length; 1788 uint8_t sense_data[32]; 1789 } end; 1790 } fcd; 1791 } isp_xcmd_t; 1792 1793 /* 1794 * Target Mode related definitions 1795 */ 1796 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1797 #define QLTM_SVALID 0x80 1798 1799 /* 1800 * Structure for Enable Lun and Modify Lun queue entries 1801 */ 1802 typedef struct { 1803 isphdr_t le_header; 1804 uint32_t le_reserved; 1805 uint8_t le_lun; 1806 uint8_t le_rsvd; 1807 uint8_t le_ops; /* Modify LUN only */ 1808 uint8_t le_tgt; /* Not for FC */ 1809 uint32_t le_flags; /* Not for FC */ 1810 uint8_t le_status; 1811 uint8_t le_reserved2; 1812 uint8_t le_cmd_count; 1813 uint8_t le_in_count; 1814 uint8_t le_cdb6len; /* Not for FC */ 1815 uint8_t le_cdb7len; /* Not for FC */ 1816 uint16_t le_timeout; 1817 uint16_t le_reserved3[20]; 1818 } lun_entry_t; 1819 1820 /* 1821 * le_flags values 1822 */ 1823 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1824 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1825 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1826 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1827 1828 /* 1829 * le_ops values 1830 */ 1831 #define LUN_CCINCR 0x01 /* increment command count */ 1832 #define LUN_CCDECR 0x02 /* decrement command count */ 1833 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1834 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1835 1836 /* 1837 * le_status values 1838 */ 1839 #define LUN_OK 0x01 /* we be rockin' */ 1840 #define LUN_ERR 0x04 /* request completed with error */ 1841 #define LUN_INVAL 0x06 /* invalid request */ 1842 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1843 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1844 1845 /* 1846 * Immediate Notify Entry structure 1847 */ 1848 #define IN_MSGLEN 8 /* 8 bytes */ 1849 #define IN_RSVDLEN 8 /* 8 words */ 1850 typedef struct { 1851 isphdr_t in_header; 1852 uint32_t in_reserved; 1853 uint8_t in_lun; /* lun */ 1854 uint8_t in_iid; /* initiator */ 1855 uint8_t in_reserved2; 1856 uint8_t in_tgt; /* target */ 1857 uint32_t in_flags; 1858 uint8_t in_status; 1859 uint8_t in_rsvd2; 1860 uint8_t in_tag_val; /* tag value */ 1861 uint8_t in_tag_type; /* tag type */ 1862 uint16_t in_seqid; /* sequence id */ 1863 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1864 uint16_t in_reserved3[IN_RSVDLEN]; 1865 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1866 } in_entry_t; 1867 1868 typedef struct { 1869 isphdr_t in_header; 1870 uint32_t in_reserved; 1871 uint8_t in_lun; /* lun */ 1872 uint8_t in_iid; /* initiator */ 1873 uint16_t in_scclun; 1874 uint32_t in_reserved2; 1875 uint16_t in_status; 1876 uint16_t in_task_flags; 1877 uint16_t in_seqid; /* sequence id */ 1878 } in_fcentry_t; 1879 1880 typedef struct { 1881 isphdr_t in_header; 1882 uint32_t in_reserved; 1883 uint16_t in_iid; /* initiator */ 1884 uint16_t in_scclun; 1885 uint32_t in_reserved2; 1886 uint16_t in_status; 1887 uint16_t in_task_flags; 1888 uint16_t in_seqid; /* sequence id */ 1889 } in_fcentry_e_t; 1890 1891 /* 1892 * Values for the in_status field 1893 */ 1894 #define IN_REJECT 0x0D /* Message Reject message received */ 1895 #define IN_RESET 0x0E /* Bus Reset occurred */ 1896 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1897 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1898 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1899 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1900 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1901 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1902 #define IN_PORT_CHANGED 0x2A /* port changed */ 1903 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1904 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1905 #define IN_SRR_RCVD 0x45 /* SRR received */ 1906 1907 /* 1908 * Values for the in_task_flags field- should only get one at a time! 1909 */ 1910 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1911 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1912 #define TASK_FLAGS_TARGET_RESET (1<<13) 1913 #define TASK_FLAGS_LUN_RESET (1<<12) 1914 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1915 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1916 1917 /* 1918 * ISP24XX Immediate Notify 1919 */ 1920 typedef struct { 1921 isphdr_t in_header; 1922 uint32_t in_reserved; 1923 uint16_t in_nphdl; 1924 uint16_t in_reserved1; 1925 uint16_t in_flags; 1926 uint16_t in_srr_rxid; 1927 uint16_t in_status; 1928 uint8_t in_status_subcode; 1929 uint8_t in_fwhandle; 1930 uint32_t in_rxid; 1931 uint16_t in_srr_reloff_lo; 1932 uint16_t in_srr_reloff_hi; 1933 uint16_t in_srr_iu; 1934 uint16_t in_srr_oxid; 1935 /* 1936 * If bit 2 is set in in_flags, the N-Port and 1937 * handle tags are valid. If the received ELS is 1938 * a LOGO, then these tags contain the N Port ID 1939 * from the LOGO payload. If the received ELS 1940 * request is TPRLO, these tags contain the 1941 * Third Party Originator N Port ID. 1942 */ 1943 uint16_t in_nport_id_hi; 1944 #define in_prli_options in_nport_id_hi 1945 uint8_t in_nport_id_lo; 1946 uint8_t in_reserved3; 1947 uint16_t in_np_handle; 1948 uint8_t in_reserved4[12]; 1949 uint8_t in_reserved5; 1950 uint8_t in_vpidx; 1951 uint32_t in_reserved6; 1952 uint16_t in_portid_lo; 1953 uint8_t in_portid_hi; 1954 uint8_t in_reserved7; 1955 uint16_t in_reserved8; 1956 uint16_t in_oxid; 1957 } in_fcentry_24xx_t; 1958 1959 #define IN24XX_FLAG_PUREX_IOCB 0x1 1960 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1961 #define IN24XX_FLAG_NPHDL_VALID 0x4 1962 #define IN24XX_FLAG_N2N_PRLI 0x8 1963 #define IN24XX_FLAG_PN_NN_VALID 0x10 1964 1965 #define IN24XX_LIP_RESET 0x0E 1966 #define IN24XX_LINK_RESET 0x0F 1967 #define IN24XX_PORT_LOGOUT 0x29 1968 #define IN24XX_PORT_CHANGED 0x2A 1969 #define IN24XX_LINK_FAILED 0x2E 1970 #define IN24XX_SRR_RCVD 0x45 1971 #define IN24XX_ELS_RCVD 0x46 /* 1972 * login-affectin ELS received- check 1973 * subcode for specific opcode 1974 */ 1975 1976 /* 1977 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1978 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1979 * Big Endian format. 1980 */ 1981 #define IN24XX_PRLI_WWNN_OFF 0x18 1982 #define IN24XX_PRLI_WWPN_OFF 0x28 1983 #define IN24XX_PLOGI_WWNN_OFF 0x20 1984 #define IN24XX_PLOGI_WWPN_OFF 0x28 1985 1986 /* 1987 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1988 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1989 */ 1990 #define IN24XX_LOGO_WWPN_OFF 0x28 1991 1992 /* 1993 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1994 */ 1995 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1996 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1997 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1998 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1999 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 2000 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 2001 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 2002 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 2003 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 2004 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 2005 2006 /* 2007 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 2008 */ 2009 #define IN24XX_PORT_CHANGED_BADFAN 0x00 2010 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 2011 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 2012 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 2013 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 2014 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 2015 2016 /* 2017 * Notify Acknowledge Entry structure 2018 */ 2019 #define NA_RSVDLEN 22 2020 typedef struct { 2021 isphdr_t na_header; 2022 uint32_t na_reserved; 2023 uint8_t na_lun; /* lun */ 2024 uint8_t na_iid; /* initiator */ 2025 uint8_t na_reserved2; 2026 uint8_t na_tgt; /* target */ 2027 uint32_t na_flags; 2028 uint8_t na_status; 2029 uint8_t na_event; 2030 uint16_t na_seqid; /* sequence id */ 2031 uint16_t na_reserved3[NA_RSVDLEN]; 2032 } na_entry_t; 2033 2034 /* 2035 * Value for the na_event field 2036 */ 2037 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 2038 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 2039 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 2040 2041 #define NA2_RSVDLEN 21 2042 typedef struct { 2043 isphdr_t na_header; 2044 uint32_t na_reserved; 2045 uint8_t na_reserved1; 2046 uint8_t na_iid; /* initiator loop id */ 2047 uint16_t na_response; 2048 uint16_t na_flags; 2049 uint16_t na_reserved2; 2050 uint16_t na_status; 2051 uint16_t na_task_flags; 2052 uint16_t na_seqid; /* sequence id */ 2053 uint16_t na_reserved3[NA2_RSVDLEN]; 2054 } na_fcentry_t; 2055 2056 typedef struct { 2057 isphdr_t na_header; 2058 uint32_t na_reserved; 2059 uint16_t na_iid; /* initiator loop id */ 2060 uint16_t na_response; /* response code */ 2061 uint16_t na_flags; 2062 uint16_t na_reserved2; 2063 uint16_t na_status; 2064 uint16_t na_task_flags; 2065 uint16_t na_seqid; /* sequence id */ 2066 uint16_t na_reserved3[NA2_RSVDLEN]; 2067 } na_fcentry_e_t; 2068 2069 #define NAFC_RCOUNT 0x80 /* increment resource count */ 2070 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 2071 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 2072 2073 /* 2074 * ISP24XX Notify Acknowledge 2075 */ 2076 2077 typedef struct { 2078 isphdr_t na_header; 2079 uint32_t na_handle; 2080 uint16_t na_nphdl; 2081 uint16_t na_reserved1; 2082 uint16_t na_flags; 2083 uint16_t na_srr_rxid; 2084 uint16_t na_status; 2085 uint8_t na_status_subcode; 2086 uint8_t na_fwhandle; 2087 uint32_t na_rxid; 2088 uint16_t na_srr_reloff_lo; 2089 uint16_t na_srr_reloff_hi; 2090 uint16_t na_srr_iu; 2091 uint16_t na_srr_flags; 2092 uint8_t na_reserved3[18]; 2093 uint8_t na_reserved4; 2094 uint8_t na_vpidx; 2095 uint8_t na_srr_reject_vunique; 2096 uint8_t na_srr_reject_explanation; 2097 uint8_t na_srr_reject_code; 2098 uint8_t na_reserved5; 2099 uint8_t na_reserved6[6]; 2100 uint16_t na_oxid; 2101 } na_fcentry_24xx_t; 2102 2103 /* 2104 * Accept Target I/O Entry structure 2105 */ 2106 #define ATIO_CDBLEN 26 2107 2108 typedef struct { 2109 isphdr_t at_header; 2110 uint16_t at_reserved; 2111 uint16_t at_handle; 2112 uint8_t at_lun; /* lun */ 2113 uint8_t at_iid; /* initiator */ 2114 uint8_t at_cdblen; /* cdb length */ 2115 uint8_t at_tgt; /* target */ 2116 uint32_t at_flags; 2117 uint8_t at_status; /* firmware status */ 2118 uint8_t at_scsi_status; /* scsi status */ 2119 uint8_t at_tag_val; /* tag value */ 2120 uint8_t at_tag_type; /* tag type */ 2121 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 2122 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 2123 } at_entry_t; 2124 2125 /* 2126 * at_flags values 2127 */ 2128 #define AT_NODISC 0x00008000 /* disconnect disabled */ 2129 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 2130 2131 /* 2132 * at_status values 2133 */ 2134 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 2135 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 2136 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2137 #define AT_NOCAP 0x16 /* Requested capability not available */ 2138 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2139 #define AT_CDB 0x3D /* CDB received */ 2140 /* 2141 * Macros to create and fetch and test concatenated handle and tag value macros 2142 * (SPI only) 2143 */ 2144 #define AT_MAKE_TAGID(tid, aep) \ 2145 tid = aep->at_handle; \ 2146 if (aep->at_flags & AT_TQAE) { \ 2147 tid |= (aep->at_tag_val << 16); \ 2148 tid |= (1 << 24); \ 2149 } 2150 2151 #define CT_MAKE_TAGID(tid, ct) \ 2152 tid = ct->ct_fwhandle; \ 2153 if (ct->ct_flags & CT_TQAE) { \ 2154 tid |= (ct->ct_tag_val << 16); \ 2155 tid |= (1 << 24); \ 2156 } 2157 2158 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2159 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2160 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2161 2162 #define IN_MAKE_TAGID(tid, inp) \ 2163 tid = inp->in_seqid; \ 2164 tid |= (inp->in_tag_val << 16); \ 2165 tid |= (1 << 24) 2166 2167 /* 2168 * Accept Target I/O Entry structure, Type 2 2169 */ 2170 #define ATIO2_CDBLEN 16 2171 2172 typedef struct { 2173 isphdr_t at_header; 2174 uint32_t at_reserved; 2175 uint8_t at_lun; /* lun or reserved */ 2176 uint8_t at_iid; /* initiator */ 2177 uint16_t at_rxid; /* response ID */ 2178 uint16_t at_flags; 2179 uint16_t at_status; /* firmware status */ 2180 uint8_t at_crn; /* command reference number */ 2181 uint8_t at_taskcodes; 2182 uint8_t at_taskflags; 2183 uint8_t at_execodes; 2184 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2185 uint32_t at_datalen; /* allocated data len */ 2186 uint16_t at_scclun; /* SCC Lun or reserved */ 2187 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2188 uint16_t at_reserved2[6]; 2189 uint16_t at_oxid; 2190 } at2_entry_t; 2191 2192 typedef struct { 2193 isphdr_t at_header; 2194 uint32_t at_reserved; 2195 uint16_t at_iid; /* initiator */ 2196 uint16_t at_rxid; /* response ID */ 2197 uint16_t at_flags; 2198 uint16_t at_status; /* firmware status */ 2199 uint8_t at_crn; /* command reference number */ 2200 uint8_t at_taskcodes; 2201 uint8_t at_taskflags; 2202 uint8_t at_execodes; 2203 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2204 uint32_t at_datalen; /* allocated data len */ 2205 uint16_t at_scclun; /* SCC Lun or reserved */ 2206 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2207 uint16_t at_reserved2[6]; 2208 uint16_t at_oxid; 2209 } at2e_entry_t; 2210 2211 #define ATIO2_WWPN_OFFSET 0x2A 2212 #define ATIO2_OXID_OFFSET 0x3E 2213 2214 #define ATIO2_TC_ATTR_MASK 0x7 2215 #define ATIO2_TC_ATTR_SIMPLEQ 0 2216 #define ATIO2_TC_ATTR_HEADOFQ 1 2217 #define ATIO2_TC_ATTR_ORDERED 2 2218 #define ATIO2_TC_ATTR_ACAQ 4 2219 #define ATIO2_TC_ATTR_UNTAGGED 5 2220 2221 #define ATIO2_EX_WRITE 0x1 2222 #define ATIO2_EX_READ 0x2 2223 /* 2224 * Macros to create and fetch and test concatenated handle and tag value macros 2225 */ 2226 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2227 tid = aep->at_rxid; \ 2228 tid |= (((uint64_t)inst) << 32); \ 2229 tid |= (((uint64_t)bus) << 48) 2230 2231 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2232 tid = ct->ct_rxid; \ 2233 tid |= (((uint64_t)inst) << 32); \ 2234 tid |= (((uint64_t)(bus & 0xff)) << 48) 2235 2236 #define AT2_HAS_TAG(val) 1 2237 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2238 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2239 #define AT2_GET_HANDLE AT2_GET_TAG 2240 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2241 2242 #define FC_HAS_TAG AT2_HAS_TAG 2243 #define FC_GET_TAG AT2_GET_TAG 2244 #define FC_GET_INST AT2_GET_INST 2245 #define FC_GET_HANDLE AT2_GET_HANDLE 2246 2247 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2248 tid = seqid; \ 2249 tid |= (((uint64_t)inst) << 32); \ 2250 tid |= (((uint64_t)(bus & 0xff)) << 48) 2251 2252 #define FC_TAG_INSERT_INST(tid, inst) \ 2253 tid &= ~0x0000ffff00000000ull; \ 2254 tid |= (((uint64_t)inst) << 32) 2255 2256 /* 2257 * 24XX ATIO Definition 2258 * 2259 * This is *quite* different from other entry types. 2260 * First of all, it has its own queue it comes in on. 2261 * 2262 * Secondly, it doesn't have a normal header. 2263 * 2264 * Thirdly, it's just a passthru of the FCP CMND IU 2265 * which is recorded in big endian mode. 2266 */ 2267 typedef struct { 2268 uint8_t at_type; 2269 uint8_t at_count; 2270 /* 2271 * Task attribute in high four bits, 2272 * the rest is the FCP CMND IU Length. 2273 * NB: the command can extend past the 2274 * length for a single queue entry. 2275 */ 2276 uint16_t at_ta_len; 2277 uint32_t at_rxid; 2278 fc_hdr_t at_hdr; 2279 fcp_cmnd_iu_t at_cmnd; 2280 } at7_entry_t; 2281 #define AT7_NORESRC_RXID 0xffffffff 2282 2283 2284 /* 2285 * Continue Target I/O Entry structure 2286 * Request from driver. The response from the 2287 * ISP firmware is the same except that the last 18 2288 * bytes are overwritten by suggested sense data if 2289 * the 'autosense valid' bit is set in the status byte. 2290 */ 2291 typedef struct { 2292 isphdr_t ct_header; 2293 uint16_t ct_syshandle; 2294 uint16_t ct_fwhandle; /* required by f/w */ 2295 uint8_t ct_lun; /* lun */ 2296 uint8_t ct_iid; /* initiator id */ 2297 uint8_t ct_reserved2; 2298 uint8_t ct_tgt; /* our target id */ 2299 uint32_t ct_flags; 2300 uint8_t ct_status; /* isp status */ 2301 uint8_t ct_scsi_status; /* scsi status */ 2302 uint8_t ct_tag_val; /* tag value */ 2303 uint8_t ct_tag_type; /* tag type */ 2304 uint32_t ct_xfrlen; /* transfer length */ 2305 uint32_t ct_resid; /* residual length */ 2306 uint16_t ct_timeout; 2307 uint16_t ct_seg_count; 2308 ispds_t ct_dataseg[ISP_RQDSEG]; 2309 } ct_entry_t; 2310 2311 /* 2312 * For some of the dual port SCSI adapters, port (bus #) is reported 2313 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2314 * 2315 * Note that this does not apply to FC adapters at all which can and 2316 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2317 * that have logged in across a SCSI fabric. 2318 */ 2319 #define GET_IID_VAL(x) (x & 0x3f) 2320 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2321 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2322 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2323 2324 /* 2325 * ct_flags values 2326 */ 2327 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2328 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2329 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2330 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2331 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2332 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2333 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2334 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2335 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2336 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2337 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2338 2339 /* 2340 * ct_status values 2341 * - set by the firmware when it returns the CTIO 2342 */ 2343 #define CT_OK 0x01 /* completed without error */ 2344 #define CT_ABORTED 0x02 /* aborted by host */ 2345 #define CT_ERR 0x04 /* see sense data for error */ 2346 #define CT_INVAL 0x06 /* request for disabled lun */ 2347 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2348 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2349 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2350 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2351 #define CT_TIMEOUT 0x0B /* timed out */ 2352 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2353 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2354 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2355 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2356 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2357 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2358 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2359 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2360 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2361 #define CT_LOGOUT 0x29 /* port logout */ 2362 #define CT_PORTCHANGED 0x2A /* port changed */ 2363 #define CT_IDE 0x33 /* Initiator Detected Error */ 2364 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2365 #define CT_SRR 0x45 /* SRR Received */ 2366 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2367 2368 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2369 2370 /* 2371 * When the firmware returns a CTIO entry, it may overwrite the last 2372 * part of the structure with sense data. This starts at offset 0x2E 2373 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2374 * than define a new struct for this, I'm just using the sense data 2375 * offset. 2376 */ 2377 #define CTIO_SENSE_OFFSET 0x2E 2378 2379 /* 2380 * Entry length in u_longs. All entries are the same size so 2381 * any one will do as the numerator. 2382 */ 2383 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2384 2385 /* 2386 * QLA2100 CTIO (type 2) entry 2387 */ 2388 #define MAXRESPLEN 26 2389 typedef struct { 2390 isphdr_t ct_header; 2391 uint32_t ct_syshandle; 2392 uint8_t ct_lun; /* lun */ 2393 uint8_t ct_iid; /* initiator id */ 2394 uint16_t ct_rxid; /* response ID */ 2395 uint16_t ct_flags; 2396 uint16_t ct_status; /* isp status */ 2397 uint16_t ct_timeout; 2398 uint16_t ct_seg_count; 2399 uint32_t ct_reloff; /* relative offset */ 2400 uint32_t ct_resid; /* residual length */ 2401 union { 2402 /* 2403 * The three different modes that the target driver 2404 * can set the CTIO{2,3,4} up as. 2405 * 2406 * The first is for sending FCP_DATA_IUs as well as 2407 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2408 * 2409 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2410 * Note that no FCP_DATA_IUs will be sent. 2411 * 2412 * The third is for sending FCP_RSP_IUs as built specifically 2413 * in system memory as located by the isp_dataseg. 2414 */ 2415 struct { 2416 uint32_t _reserved; 2417 uint16_t _reserved2; 2418 uint16_t ct_scsi_status; 2419 uint32_t ct_xfrlen; 2420 union { 2421 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2422 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2423 ispdslist_t ct_dslist; 2424 } u; 2425 } m0; 2426 struct { 2427 uint16_t _reserved; 2428 uint16_t _reserved2; 2429 uint16_t ct_senselen; 2430 uint16_t ct_scsi_status; 2431 uint16_t ct_resplen; 2432 uint8_t ct_resp[MAXRESPLEN]; 2433 } m1; 2434 struct { 2435 uint32_t _reserved; 2436 uint16_t _reserved2; 2437 uint16_t _reserved3; 2438 uint32_t ct_datalen; 2439 union { 2440 ispds_t ct_fcp_rsp_iudata_32; 2441 ispds64_t ct_fcp_rsp_iudata_64; 2442 } u; 2443 } m2; 2444 } rsp; 2445 } ct2_entry_t; 2446 2447 typedef struct { 2448 isphdr_t ct_header; 2449 uint32_t ct_syshandle; 2450 uint16_t ct_iid; /* initiator id */ 2451 uint16_t ct_rxid; /* response ID */ 2452 uint16_t ct_flags; 2453 uint16_t ct_status; /* isp status */ 2454 uint16_t ct_timeout; 2455 uint16_t ct_seg_count; 2456 uint32_t ct_reloff; /* relative offset */ 2457 uint32_t ct_resid; /* residual length */ 2458 union { 2459 struct { 2460 uint32_t _reserved; 2461 uint16_t _reserved2; 2462 uint16_t ct_scsi_status; 2463 uint32_t ct_xfrlen; 2464 union { 2465 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2466 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2467 ispdslist_t ct_dslist; 2468 } u; 2469 } m0; 2470 struct { 2471 uint16_t _reserved; 2472 uint16_t _reserved2; 2473 uint16_t ct_senselen; 2474 uint16_t ct_scsi_status; 2475 uint16_t ct_resplen; 2476 uint8_t ct_resp[MAXRESPLEN]; 2477 } m1; 2478 struct { 2479 uint32_t _reserved; 2480 uint16_t _reserved2; 2481 uint16_t _reserved3; 2482 uint32_t ct_datalen; 2483 union { 2484 ispds_t ct_fcp_rsp_iudata_32; 2485 ispds64_t ct_fcp_rsp_iudata_64; 2486 } u; 2487 } m2; 2488 } rsp; 2489 } ct2e_entry_t; 2490 2491 /* 2492 * ct_flags values for CTIO2 2493 */ 2494 #define CT2_FLAG_MODE0 0x0000 2495 #define CT2_FLAG_MODE1 0x0001 2496 #define CT2_FLAG_MODE2 0x0002 2497 #define CT2_FLAG_MMASK 0x0003 2498 #define CT2_DATA_IN 0x0040 /* *to* initiator */ 2499 #define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2500 #define CT2_NO_DATA 0x00C0 2501 #define CT2_DATAMASK 0x00C0 2502 #define CT2_CCINCR 0x0100 2503 #define CT2_FASTPOST 0x0200 2504 #define CT2_CONFIRM 0x2000 2505 #define CT2_TERMINATE 0x4000 2506 #define CT2_SENDSTATUS 0x8000 2507 2508 /* 2509 * ct_status values are (mostly) the same as that for ct_entry. 2510 */ 2511 2512 /* 2513 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2514 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2515 * fields. 2516 */ 2517 #define CT2_RSPLEN_VALID 0x0100 2518 #define CT2_SNSLEN_VALID 0x0200 2519 #define CT2_DATA_OVER 0x0400 2520 #define CT2_DATA_UNDER 0x0800 2521 2522 /* 2523 * ISP24XX CTIO 2524 */ 2525 #define MAXRESPLEN_24XX 24 2526 typedef struct { 2527 isphdr_t ct_header; 2528 uint32_t ct_syshandle; 2529 uint16_t ct_nphdl; /* status on returned CTIOs */ 2530 uint16_t ct_timeout; 2531 uint16_t ct_seg_count; 2532 uint8_t ct_vpidx; 2533 uint8_t ct_xflags; 2534 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2535 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2536 uint8_t ct_reserved; 2537 uint32_t ct_rxid; 2538 uint16_t ct_senselen; /* mode 1 only */ 2539 uint16_t ct_flags; 2540 uint32_t ct_resid; /* residual length */ 2541 uint16_t ct_oxid; 2542 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2543 union { 2544 struct { 2545 uint32_t reloff; 2546 uint32_t reserved0; 2547 uint32_t ct_xfrlen; 2548 uint32_t reserved1; 2549 ispds64_t ds; 2550 } m0; 2551 struct { 2552 uint16_t ct_resplen; 2553 uint16_t reserved; 2554 uint8_t ct_resp[MAXRESPLEN_24XX]; 2555 } m1; 2556 struct { 2557 uint32_t reserved0; 2558 uint32_t reserved1; 2559 uint32_t ct_datalen; 2560 uint32_t reserved2; 2561 ispds64_t ct_fcp_rsp_iudata; 2562 } m2; 2563 } rsp; 2564 } ct7_entry_t; 2565 2566 /* 2567 * ct_flags values for CTIO7 2568 */ 2569 #define CT7_NO_DATA 0x0000 2570 #define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2571 #define CT7_DATA_IN 0x0002 /* *to* initiator */ 2572 #define CT7_DATAMASK 0x3 2573 #define CT7_DSD_ENABLE 0x0004 2574 #define CT7_CONF_STSFD 0x0010 2575 #define CT7_EXPLCT_CONF 0x0020 2576 #define CT7_FLAG_MODE0 0x0000 2577 #define CT7_FLAG_MODE1 0x0040 2578 #define CT7_FLAG_MODE2 0x0080 2579 #define CT7_FLAG_MMASK 0x00C0 2580 #define CT7_NOACK 0x0100 2581 #define CT7_TASK_ATTR_SHIFT 9 2582 #define CT7_CONFIRM 0x2000 2583 #define CT7_TERMINATE 0x4000 2584 #define CT7_SENDSTATUS 0x8000 2585 2586 /* 2587 * Type 7 CTIO status codes 2588 */ 2589 #define CT7_OK 0x01 /* completed without error */ 2590 #define CT7_ABORTED 0x02 /* aborted by host */ 2591 #define CT7_ERR 0x04 /* see sense data for error */ 2592 #define CT7_INVAL 0x06 /* request for disabled lun */ 2593 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2594 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2595 #define CT7_TIMEOUT 0x0B /* timed out */ 2596 #define CT7_RESET 0x0E /* LIP Rset Received */ 2597 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2598 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2599 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2600 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2601 #define CT7_LOGOUT 0x29 /* port logout */ 2602 #define CT7_PORTCHANGED 0x2A /* port changed */ 2603 #define CT7_SRR 0x45 /* SRR Received */ 2604 2605 /* 2606 * Other 24XX related target IOCBs 2607 */ 2608 2609 /* 2610 * ABTS Received 2611 */ 2612 typedef struct { 2613 isphdr_t abts_header; 2614 uint8_t abts_reserved0[6]; 2615 uint16_t abts_nphdl; 2616 uint16_t abts_reserved1; 2617 uint16_t abts_sof; 2618 uint32_t abts_rxid_abts; 2619 uint16_t abts_did_lo; 2620 uint8_t abts_did_hi; 2621 uint8_t abts_r_ctl; 2622 uint16_t abts_sid_lo; 2623 uint8_t abts_sid_hi; 2624 uint8_t abts_cs_ctl; 2625 uint16_t abts_fs_ctl; 2626 uint8_t abts_f_ctl; 2627 uint8_t abts_type; 2628 uint16_t abts_seq_cnt; 2629 uint8_t abts_df_ctl; 2630 uint8_t abts_seq_id; 2631 uint16_t abts_rx_id; 2632 uint16_t abts_ox_id; 2633 uint32_t abts_param; 2634 uint8_t abts_reserved2[16]; 2635 uint32_t abts_rxid_task; 2636 } abts_t; 2637 2638 typedef struct { 2639 isphdr_t abts_rsp_header; 2640 uint32_t abts_rsp_handle; 2641 uint16_t abts_rsp_status; 2642 uint16_t abts_rsp_nphdl; 2643 uint16_t abts_rsp_ctl_flags; 2644 uint16_t abts_rsp_sof; 2645 uint32_t abts_rsp_rxid_abts; 2646 uint16_t abts_rsp_did_lo; 2647 uint8_t abts_rsp_did_hi; 2648 uint8_t abts_rsp_r_ctl; 2649 uint16_t abts_rsp_sid_lo; 2650 uint8_t abts_rsp_sid_hi; 2651 uint8_t abts_rsp_cs_ctl; 2652 uint16_t abts_rsp_f_ctl_lo; 2653 uint8_t abts_rsp_f_ctl_hi; 2654 uint8_t abts_rsp_type; 2655 uint16_t abts_rsp_seq_cnt; 2656 uint8_t abts_rsp_df_ctl; 2657 uint8_t abts_rsp_seq_id; 2658 uint16_t abts_rsp_rx_id; 2659 uint16_t abts_rsp_ox_id; 2660 uint32_t abts_rsp_param; 2661 union { 2662 struct { 2663 uint16_t reserved; 2664 uint8_t last_seq_id; 2665 uint8_t seq_id_valid; 2666 uint16_t aborted_rx_id; 2667 uint16_t aborted_ox_id; 2668 uint16_t high_seq_cnt; 2669 uint16_t low_seq_cnt; 2670 uint8_t reserved2[4]; 2671 } ba_acc; 2672 struct { 2673 uint8_t vendor_unique; 2674 uint8_t explanation; 2675 uint8_t reason; 2676 uint8_t reserved; 2677 uint8_t reserved2[12]; 2678 } ba_rjt; 2679 struct { 2680 uint8_t reserved[8]; 2681 uint32_t subcode1; 2682 uint32_t subcode2; 2683 } rsp; 2684 uint8_t reserved[16]; 2685 } abts_rsp_payload; 2686 uint32_t abts_rsp_rxid_task; 2687 } abts_rsp_t; 2688 2689 /* terminate this ABTS exchange */ 2690 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2691 2692 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2693 #define ISP24XX_ABTS_RSP_RESET 0x04 2694 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2695 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2696 #define ISP24XX_ABTS_RSP_INVXID 0x08 2697 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2698 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2699 2700 #define ISP24XX_NO_TASK 0xffffffff 2701 2702 /* 2703 * Miscellaneous 2704 * 2705 * These are the limits of the number of dma segments we 2706 * can deal with based not on the size of the segment counter 2707 * (which is 16 bits), but on the size of the number of 2708 * queue entries field (which is 8 bits). We assume no 2709 * segments in the first queue entry, so we can either 2710 * have 7 dma segments per continuation entry or 5 2711 * (for 64 bit dma).. multiplying out by 254.... 2712 */ 2713 #define ISP_NSEG_MAX 1778 2714 #define ISP_NSEG64_MAX 1270 2715 2716 #endif /* _ISPMBOX_H */ 2717