1 /*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: stable/10/sys/dev/drm2/radeon/radeon_fb.c 300060 2016-05-17 15:18:01Z pfg $");
29
30 #include <machine/_inttypes.h>
31
32 #include <dev/drm2/drmP.h>
33 #include <dev/drm2/drm_crtc.h>
34 #include <dev/drm2/drm_crtc_helper.h>
35 #include <dev/drm2/radeon/radeon_drm.h>
36 #include "radeon.h"
37
38 #include <dev/drm2/drm_fb_helper.h>
39
40 /* object hierarchy -
41 this contains a helper + a radeon fb
42 the helper contains a pointer to radeon framebuffer baseclass.
43 */
44 struct radeon_fbdev {
45 struct drm_fb_helper helper;
46 struct radeon_framebuffer rfb;
47 struct list_head fbdev_list;
48 struct radeon_device *rdev;
49 };
50
51 #if defined(__linux__)
52 static struct fb_ops radeonfb_ops = {
53 .owner = THIS_MODULE,
54 .fb_check_var = drm_fb_helper_check_var,
55 .fb_set_par = drm_fb_helper_set_par,
56 .fb_fillrect = cfb_fillrect,
57 .fb_copyarea = cfb_copyarea,
58 .fb_imageblit = cfb_imageblit,
59 .fb_pan_display = drm_fb_helper_pan_display,
60 .fb_blank = drm_fb_helper_blank,
61 .fb_setcmap = drm_fb_helper_setcmap,
62 .fb_debug_enter = drm_fb_helper_debug_enter,
63 .fb_debug_leave = drm_fb_helper_debug_leave,
64 };
65 #endif
66
67
radeon_align_pitch(struct radeon_device * rdev,int width,int bpp,bool tiled)68 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
69 {
70 int aligned = width;
71 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
72 int pitch_mask = 0;
73
74 switch (bpp / 8) {
75 case 1:
76 pitch_mask = align_large ? 255 : 127;
77 break;
78 case 2:
79 pitch_mask = align_large ? 127 : 31;
80 break;
81 case 3:
82 case 4:
83 pitch_mask = align_large ? 63 : 15;
84 break;
85 }
86
87 aligned += pitch_mask;
88 aligned &= ~pitch_mask;
89 return aligned;
90 }
91
radeonfb_destroy_pinned_object(struct drm_gem_object * gobj)92 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
93 {
94 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
95 int ret;
96
97 ret = radeon_bo_reserve(rbo, false);
98 if (likely(ret == 0)) {
99 radeon_bo_kunmap(rbo);
100 radeon_bo_unpin(rbo);
101 radeon_bo_unreserve(rbo);
102 }
103 drm_gem_object_unreference_unlocked(gobj);
104 }
105
radeonfb_create_pinned_object(struct radeon_fbdev * rfbdev,struct drm_mode_fb_cmd2 * mode_cmd,struct drm_gem_object ** gobj_p)106 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
107 struct drm_mode_fb_cmd2 *mode_cmd,
108 struct drm_gem_object **gobj_p)
109 {
110 struct radeon_device *rdev = rfbdev->rdev;
111 struct drm_gem_object *gobj = NULL;
112 struct radeon_bo *rbo = NULL;
113 bool fb_tiled = false; /* useful for testing */
114 u32 tiling_flags = 0;
115 int ret;
116 int aligned_size, size;
117 int height = mode_cmd->height;
118 u32 bpp, depth;
119
120 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
121
122 /* need to align pitch with crtc limits */
123 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
124 fb_tiled) * ((bpp + 1) / 8);
125
126 if (rdev->family >= CHIP_R600)
127 height = roundup2(mode_cmd->height, 8);
128 size = mode_cmd->pitches[0] * height;
129 aligned_size = roundup2(size, PAGE_SIZE);
130 ret = radeon_gem_object_create(rdev, aligned_size, 0,
131 RADEON_GEM_DOMAIN_VRAM,
132 false, true,
133 &gobj);
134 if (ret) {
135 DRM_ERROR("failed to allocate framebuffer (%d)\n",
136 aligned_size);
137 return -ENOMEM;
138 }
139 rbo = gem_to_radeon_bo(gobj);
140
141 if (fb_tiled)
142 tiling_flags = RADEON_TILING_MACRO;
143
144 #ifdef __BIG_ENDIAN
145 switch (bpp) {
146 case 32:
147 tiling_flags |= RADEON_TILING_SWAP_32BIT;
148 break;
149 case 16:
150 tiling_flags |= RADEON_TILING_SWAP_16BIT;
151 default:
152 break;
153 }
154 #endif
155
156 if (tiling_flags) {
157 ret = radeon_bo_set_tiling_flags(rbo,
158 tiling_flags | RADEON_TILING_SURFACE,
159 mode_cmd->pitches[0]);
160 if (ret)
161 dev_err(rdev->dev, "FB failed to set tiling flags\n");
162 }
163
164
165 ret = radeon_bo_reserve(rbo, false);
166 if (unlikely(ret != 0))
167 goto out_unref;
168 /* Only 27 bit offset for legacy CRTC */
169 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
170 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
171 NULL);
172 if (ret) {
173 radeon_bo_unreserve(rbo);
174 goto out_unref;
175 }
176 if (fb_tiled)
177 radeon_bo_check_tiling(rbo, 0, 0);
178 ret = radeon_bo_kmap(rbo, NULL);
179 radeon_bo_unreserve(rbo);
180 if (ret) {
181 goto out_unref;
182 }
183
184 *gobj_p = gobj;
185 return 0;
186 out_unref:
187 radeonfb_destroy_pinned_object(gobj);
188 *gobj_p = NULL;
189 return ret;
190 }
191
radeonfb_create(struct radeon_fbdev * rfbdev,struct drm_fb_helper_surface_size * sizes)192 static int radeonfb_create(struct radeon_fbdev *rfbdev,
193 struct drm_fb_helper_surface_size *sizes)
194 {
195 struct radeon_device *rdev = rfbdev->rdev;
196 struct fb_info *info;
197 struct drm_framebuffer *fb = NULL;
198 struct drm_mode_fb_cmd2 mode_cmd;
199 struct drm_gem_object *gobj = NULL;
200 struct radeon_bo *rbo = NULL;
201 int ret;
202 unsigned long tmp;
203
204 mode_cmd.width = sizes->surface_width;
205 mode_cmd.height = sizes->surface_height;
206
207 /* avivo can't scanout real 24bpp */
208 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
209 sizes->surface_bpp = 32;
210
211 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
212 sizes->surface_depth);
213
214 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
215 if (ret) {
216 DRM_ERROR("failed to create fbcon object %d\n", ret);
217 return ret;
218 }
219
220 rbo = gem_to_radeon_bo(gobj);
221
222 /* okay we have an object now allocate the framebuffer */
223 info = framebuffer_alloc();
224 if (info == NULL) {
225 ret = -ENOMEM;
226 goto out_unref;
227 }
228
229 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
230 if (ret) {
231 DRM_ERROR("failed to initialise framebuffer %d\n", ret);
232 goto out_unref;
233 }
234
235 fb = &rfbdev->rfb.base;
236
237 /* setup helper */
238 rfbdev->helper.fb = fb;
239 rfbdev->helper.fbdev = info;
240
241 memset(rbo->kptr, 0x0, radeon_bo_size(rbo));
242
243 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
244
245 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
246 info->fb_size = radeon_bo_size(rbo);
247 info->fb_bpp = sizes->surface_bpp;
248 info->fb_pbase = rdev->mc.aper_base + tmp;
249 info->fb_vbase = (vm_offset_t)rbo->kptr;
250
251 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
252
253 DRM_INFO("fb mappable at 0x%" PRIXPTR "\n", info->fb_pbase);
254 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
255 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
256 DRM_INFO("fb depth is %d\n", fb->depth);
257 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
258
259 return 0;
260
261 out_unref:
262 if (rbo) {
263 /* TODO? dumbbell@ */
264 }
265 if (fb && ret) {
266 drm_gem_object_unreference(gobj);
267 drm_framebuffer_cleanup(fb);
268 free(fb, DRM_MEM_DRIVER); /* XXX malloc'd in radeon_user_framebuffer_create? */
269 }
270 return ret;
271 }
272
radeon_fb_find_or_create_single(struct drm_fb_helper * helper,struct drm_fb_helper_surface_size * sizes)273 static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
274 struct drm_fb_helper_surface_size *sizes)
275 {
276 struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
277 int new_fb = 0;
278 int ret;
279
280 if (!helper->fb) {
281 ret = radeonfb_create(rfbdev, sizes);
282 if (ret)
283 return ret;
284 new_fb = 1;
285 }
286 return new_fb;
287 }
288
radeon_fb_output_poll_changed(struct radeon_device * rdev)289 void radeon_fb_output_poll_changed(struct radeon_device *rdev)
290 {
291 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
292 }
293
radeon_fbdev_destroy(struct drm_device * dev,struct radeon_fbdev * rfbdev)294 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
295 {
296 struct fb_info *info;
297 struct radeon_framebuffer *rfb = &rfbdev->rfb;
298
299 if (rfbdev->helper.fbdev) {
300 info = rfbdev->helper.fbdev;
301 framebuffer_release(info);
302 }
303
304 if (rfb->obj) {
305 radeonfb_destroy_pinned_object(rfb->obj);
306 rfb->obj = NULL;
307 }
308 drm_fb_helper_fini(&rfbdev->helper);
309 drm_framebuffer_cleanup(&rfb->base);
310
311 return 0;
312 }
313
314 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
315 .gamma_set = radeon_crtc_fb_gamma_set,
316 .gamma_get = radeon_crtc_fb_gamma_get,
317 .fb_probe = radeon_fb_find_or_create_single,
318 };
319
radeon_fbdev_init(struct radeon_device * rdev)320 int radeon_fbdev_init(struct radeon_device *rdev)
321 {
322 struct radeon_fbdev *rfbdev;
323 int bpp_sel = 32;
324 int ret;
325
326 /* select 8 bpp console on RN50 or 16MB cards */
327 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
328 bpp_sel = 8;
329
330 rfbdev = malloc(sizeof(struct radeon_fbdev),
331 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
332 if (!rfbdev)
333 return -ENOMEM;
334
335 rfbdev->rdev = rdev;
336 rdev->mode_info.rfbdev = rfbdev;
337 rfbdev->helper.funcs = &radeon_fb_helper_funcs;
338
339 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
340 rdev->num_crtc,
341 RADEONFB_CONN_LIMIT);
342 if (ret) {
343 free(rfbdev, DRM_MEM_DRIVER);
344 return ret;
345 }
346
347 drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
348 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
349 return 0;
350 }
351
radeon_fbdev_fini(struct radeon_device * rdev)352 void radeon_fbdev_fini(struct radeon_device *rdev)
353 {
354 if (!rdev->mode_info.rfbdev)
355 return;
356
357 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
358 free(rdev->mode_info.rfbdev, DRM_MEM_DRIVER);
359 rdev->mode_info.rfbdev = NULL;
360 }
361
radeon_fbdev_set_suspend(struct radeon_device * rdev,int state)362 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
363 {
364 #ifdef FREEBSD_WIP
365 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
366 #endif /* FREEBSD_WIP */
367 }
368
radeon_fbdev_total_size(struct radeon_device * rdev)369 int radeon_fbdev_total_size(struct radeon_device *rdev)
370 {
371 struct radeon_bo *robj;
372 int size = 0;
373
374 robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
375 size += radeon_bo_size(robj);
376 return size;
377 }
378
radeon_fbdev_robj_is_fb(struct radeon_device * rdev,struct radeon_bo * robj)379 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
380 {
381 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
382 return true;
383 return false;
384 }
385
386 struct fb_info *
radeon_fb_helper_getinfo(device_t kdev)387 radeon_fb_helper_getinfo(device_t kdev)
388 {
389 struct drm_device *dev;
390 struct radeon_device *rdev;
391 struct radeon_fbdev *rfbdev;
392 struct fb_info *info;
393
394 dev = device_get_softc(kdev);
395 rdev = dev->dev_private;
396 rfbdev = rdev->mode_info.rfbdev;
397 if (rfbdev == NULL)
398 return (NULL);
399
400 info = rfbdev->helper.fbdev;
401
402 return (info);
403 }
404