1 /*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31 #ifndef _LINUX_PCI_H_
32 #define _LINUX_PCI_H_
33
34 #define CONFIG_PCI_MSI
35
36 #include <linux/types.h>
37
38 #include <sys/param.h>
39 #include <sys/bus.h>
40 #include <sys/pciio.h>
41 #include <sys/rman.h>
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pci_private.h>
45
46 #include <machine/resource.h>
47
48 #include <linux/list.h>
49 #include <linux/dmapool.h>
50 #include <linux/dma-mapping.h>
51 #include <linux/compiler.h>
52 #include <linux/errno.h>
53 #include <asm/atomic.h>
54 #include <linux/device.h>
55
56 struct pci_device_id {
57 uint32_t vendor;
58 uint32_t device;
59 uint32_t subvendor;
60 uint32_t subdevice;
61 uint32_t class_mask;
62 uintptr_t driver_data;
63 };
64
65 #define MODULE_DEVICE_TABLE(bus, table)
66 #define PCI_ANY_ID (-1)
67 #define PCI_VENDOR_ID_MELLANOX 0x15b3
68 #define PCI_VENDOR_ID_TOPSPIN 0x1867
69 #define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44
70 #define PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE 0x5a46
71 #define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278
72 #define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282
73 #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
74 #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
75
76 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
77 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
78 #define PCI_FUNC(devfn) ((devfn) & 0x07)
79
80 #define PCI_VDEVICE(_vendor, _device) \
81 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \
82 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
83 #define PCI_DEVICE(_vendor, _device) \
84 .vendor = (_vendor), .device = (_device), \
85 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
86
87 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
88
89 #define PCI_VENDOR_ID PCIR_DEVVENDOR
90 #define PCI_COMMAND PCIR_COMMAND
91 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */
92 #define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */
93 #define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */
94 #define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */
95 #define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */
96 #define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */
97 #define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */
98 #define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */
99 #define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */
100 #define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */
101 #define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */
102 #define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */
103 #define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */
104 #define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */
105 #define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */
106 #define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */
107 #define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */
108 #define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */
109 #define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */
110 #define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */
111 #define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */
112 #define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */
113 #define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */
114 #define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */
115 #define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */
116 #define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */
117
118
119 #define IORESOURCE_MEM SYS_RES_MEMORY
120 #define IORESOURCE_IO SYS_RES_IOPORT
121 #define IORESOURCE_IRQ SYS_RES_IRQ
122
123 struct pci_dev;
124
125
126 struct pci_driver {
127 struct list_head links;
128 char *name;
129 const struct pci_device_id *id_table;
130 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);
131 void (*remove)(struct pci_dev *dev);
132 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
133 int (*resume) (struct pci_dev *dev); /* Device woken up */
134 driver_t driver;
135 devclass_t bsdclass;
136 const struct pci_error_handlers *err_handler;
137 };
138
139 extern struct list_head pci_drivers;
140 extern struct list_head pci_devices;
141 extern spinlock_t pci_lock;
142
143 #define __devexit_p(x) x
144
145 struct pci_dev {
146 struct device dev;
147 struct list_head links;
148 struct pci_driver *pdrv;
149 uint64_t dma_mask;
150 uint16_t device;
151 uint16_t vendor;
152 unsigned int irq;
153 unsigned int devfn;
154 u8 revision;
155 };
156
157 static inline struct resource_list_entry *
_pci_get_rle(struct pci_dev * pdev,int type,int rid)158 _pci_get_rle(struct pci_dev *pdev, int type, int rid)
159 {
160 struct pci_devinfo *dinfo;
161 struct resource_list *rl;
162
163 dinfo = device_get_ivars(pdev->dev.bsddev);
164 rl = &dinfo->resources;
165 return resource_list_find(rl, type, rid);
166 }
167
168 static inline struct resource_list_entry *
_pci_get_bar(struct pci_dev * pdev,int bar)169 _pci_get_bar(struct pci_dev *pdev, int bar)
170 {
171 struct resource_list_entry *rle;
172
173 bar = PCIR_BAR(bar);
174 if ((rle = _pci_get_rle(pdev, SYS_RES_MEMORY, bar)) == NULL)
175 rle = _pci_get_rle(pdev, SYS_RES_IOPORT, bar);
176 return (rle);
177 }
178
179 static inline struct device *
_pci_find_irq_dev(unsigned int irq)180 _pci_find_irq_dev(unsigned int irq)
181 {
182 struct pci_dev *pdev;
183
184 spin_lock(&pci_lock);
185 list_for_each_entry(pdev, &pci_devices, links) {
186 if (irq == pdev->dev.irq)
187 break;
188 if (irq >= pdev->dev.msix && irq < pdev->dev.msix_max)
189 break;
190 }
191 spin_unlock(&pci_lock);
192 if (pdev)
193 return &pdev->dev;
194 return (NULL);
195 }
196
197 static inline unsigned long
pci_resource_start(struct pci_dev * pdev,int bar)198 pci_resource_start(struct pci_dev *pdev, int bar)
199 {
200 struct resource_list_entry *rle;
201
202 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
203 return (0);
204 return rle->start;
205 }
206
207 static inline unsigned long
pci_resource_len(struct pci_dev * pdev,int bar)208 pci_resource_len(struct pci_dev *pdev, int bar)
209 {
210 struct resource_list_entry *rle;
211
212 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
213 return (0);
214 return rle->count;
215 }
216
217 /*
218 * All drivers just seem to want to inspect the type not flags.
219 */
220 static inline int
pci_resource_flags(struct pci_dev * pdev,int bar)221 pci_resource_flags(struct pci_dev *pdev, int bar)
222 {
223 struct resource_list_entry *rle;
224
225 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
226 return (0);
227 return rle->type;
228 }
229
230 static inline const char *
pci_name(struct pci_dev * d)231 pci_name(struct pci_dev *d)
232 {
233
234 return device_get_desc(d->dev.bsddev);
235 }
236
237 static inline void *
pci_get_drvdata(struct pci_dev * pdev)238 pci_get_drvdata(struct pci_dev *pdev)
239 {
240
241 return dev_get_drvdata(&pdev->dev);
242 }
243
244 static inline void
pci_set_drvdata(struct pci_dev * pdev,void * data)245 pci_set_drvdata(struct pci_dev *pdev, void *data)
246 {
247
248 dev_set_drvdata(&pdev->dev, data);
249 }
250
251 static inline int
pci_enable_device(struct pci_dev * pdev)252 pci_enable_device(struct pci_dev *pdev)
253 {
254
255 pci_enable_io(pdev->dev.bsddev, SYS_RES_IOPORT);
256 pci_enable_io(pdev->dev.bsddev, SYS_RES_MEMORY);
257 return (0);
258 }
259
260 static inline void
pci_disable_device(struct pci_dev * pdev)261 pci_disable_device(struct pci_dev *pdev)
262 {
263 }
264
265 static inline int
pci_set_master(struct pci_dev * pdev)266 pci_set_master(struct pci_dev *pdev)
267 {
268
269 pci_enable_busmaster(pdev->dev.bsddev);
270 return (0);
271 }
272
273 static inline int
pci_clear_master(struct pci_dev * pdev)274 pci_clear_master(struct pci_dev *pdev)
275 {
276
277 pci_disable_busmaster(pdev->dev.bsddev);
278 return (0);
279 }
280
281 static inline int
pci_request_region(struct pci_dev * pdev,int bar,const char * res_name)282 pci_request_region(struct pci_dev *pdev, int bar, const char *res_name)
283 {
284 int rid;
285 int type;
286
287 type = pci_resource_flags(pdev, bar);
288 if (type == 0)
289 return (-ENODEV);
290 rid = PCIR_BAR(bar);
291 if (bus_alloc_resource_any(pdev->dev.bsddev, type, &rid,
292 RF_ACTIVE) == NULL)
293 return (-EINVAL);
294 return (0);
295 }
296
297 static inline void
pci_release_region(struct pci_dev * pdev,int bar)298 pci_release_region(struct pci_dev *pdev, int bar)
299 {
300 struct resource_list_entry *rle;
301
302 if ((rle = _pci_get_bar(pdev, bar)) == NULL)
303 return;
304 bus_release_resource(pdev->dev.bsddev, rle->type, rle->rid, rle->res);
305 }
306
307 static inline void
pci_release_regions(struct pci_dev * pdev)308 pci_release_regions(struct pci_dev *pdev)
309 {
310 int i;
311
312 for (i = 0; i <= PCIR_MAX_BAR_0; i++)
313 pci_release_region(pdev, i);
314 }
315
316 static inline int
pci_request_regions(struct pci_dev * pdev,const char * res_name)317 pci_request_regions(struct pci_dev *pdev, const char *res_name)
318 {
319 int error;
320 int i;
321
322 for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
323 error = pci_request_region(pdev, i, res_name);
324 if (error && error != -ENODEV) {
325 pci_release_regions(pdev);
326 return (error);
327 }
328 }
329 return (0);
330 }
331
332 static inline void
pci_disable_msix(struct pci_dev * pdev)333 pci_disable_msix(struct pci_dev *pdev)
334 {
335
336 pci_release_msi(pdev->dev.bsddev);
337 }
338
339 #define PCI_CAP_ID_EXP PCIY_EXPRESS
340 #define PCI_CAP_ID_PCIX PCIY_PCIX
341
342
343 static inline int
pci_find_capability(struct pci_dev * pdev,int capid)344 pci_find_capability(struct pci_dev *pdev, int capid)
345 {
346 int reg;
347
348 if (pci_find_cap(pdev->dev.bsddev, capid, ®))
349 return (0);
350 return (reg);
351 }
352
353
354
355
356 /**
357 * pci_pcie_cap - get the saved PCIe capability offset
358 * @dev: PCI device
359 *
360 * PCIe capability offset is calculated at PCI device initialization
361 * time and saved in the data structure. This function returns saved
362 * PCIe capability offset. Using this instead of pci_find_capability()
363 * reduces unnecessary search in the PCI configuration space. If you
364 * need to calculate PCIe capability offset from raw device for some
365 * reasons, please use pci_find_capability() instead.
366 */
pci_pcie_cap(struct pci_dev * dev)367 static inline int pci_pcie_cap(struct pci_dev *dev)
368 {
369 return pci_find_capability(dev, PCI_CAP_ID_EXP);
370 }
371
372
373 static inline int
pci_read_config_byte(struct pci_dev * pdev,int where,u8 * val)374 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val)
375 {
376
377 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
378 return (0);
379 }
380
381 static inline int
pci_read_config_word(struct pci_dev * pdev,int where,u16 * val)382 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)
383 {
384
385 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
386 return (0);
387 }
388
389 static inline int
pci_read_config_dword(struct pci_dev * pdev,int where,u32 * val)390 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val)
391 {
392
393 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
394 return (0);
395 }
396
397 static inline int
pci_write_config_byte(struct pci_dev * pdev,int where,u8 val)398 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)
399 {
400
401 pci_write_config(pdev->dev.bsddev, where, val, 1);
402 return (0);
403 }
404
405 static inline int
pci_write_config_word(struct pci_dev * pdev,int where,u16 val)406 pci_write_config_word(struct pci_dev *pdev, int where, u16 val)
407 {
408
409 pci_write_config(pdev->dev.bsddev, where, val, 2);
410 return (0);
411 }
412
413 static inline int
pci_write_config_dword(struct pci_dev * pdev,int where,u32 val)414 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
415 {
416
417 pci_write_config(pdev->dev.bsddev, where, val, 4);
418 return (0);
419 }
420
421 extern int pci_register_driver(struct pci_driver *pdrv);
422 extern void pci_unregister_driver(struct pci_driver *pdrv);
423
424 struct msix_entry {
425 int entry;
426 int vector;
427 };
428
429 /*
430 * Enable msix, positive errors indicate actual number of available
431 * vectors. Negative errors are failures.
432 *
433 * NB: define added to prevent this definition of pci_enable_msix from
434 * clashing with the native FreeBSD version.
435 */
436 #define pci_enable_msix linux_pci_enable_msix
437 static inline int
pci_enable_msix(struct pci_dev * pdev,struct msix_entry * entries,int nreq)438 pci_enable_msix(struct pci_dev *pdev, struct msix_entry *entries, int nreq)
439 {
440 struct resource_list_entry *rle;
441 int error;
442 int avail;
443 int i;
444
445 avail = pci_msix_count(pdev->dev.bsddev);
446 if (avail < nreq) {
447 if (avail == 0)
448 return -EINVAL;
449 return avail;
450 }
451 avail = nreq;
452 if ((error = -pci_alloc_msix(pdev->dev.bsddev, &avail)) != 0)
453 return error;
454 /*
455 * Handle case where "pci_alloc_msix()" may allocate less
456 * interrupts than available and return with no error:
457 */
458 if (avail < nreq) {
459 pci_release_msi(pdev->dev.bsddev);
460 return avail;
461 }
462 rle = _pci_get_rle(pdev, SYS_RES_IRQ, 1);
463 pdev->dev.msix = rle->start;
464 pdev->dev.msix_max = rle->start + avail;
465 for (i = 0; i < nreq; i++)
466 entries[i].vector = pdev->dev.msix + i;
467 return (0);
468 }
469
470 #define pci_enable_msix_range linux_pci_enable_msix_range
471 static inline int
pci_enable_msix_range(struct pci_dev * dev,struct msix_entry * entries,int minvec,int maxvec)472 pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
473 int minvec, int maxvec)
474 {
475 int nvec = maxvec;
476 int rc;
477
478 if (maxvec < minvec)
479 return (-ERANGE);
480
481 do {
482 rc = pci_enable_msix(dev, entries, nvec);
483 if (rc < 0) {
484 return (rc);
485 } else if (rc > 0) {
486 if (rc < minvec)
487 return (-ENOSPC);
488 nvec = rc;
489 }
490 } while (rc);
491 return (nvec);
492 }
493
pci_channel_offline(struct pci_dev * pdev)494 static inline int pci_channel_offline(struct pci_dev *pdev)
495 {
496 return false;
497 }
498
pci_enable_sriov(struct pci_dev * dev,int nr_virtfn)499 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
500 {
501 return -ENODEV;
502 }
pci_disable_sriov(struct pci_dev * dev)503 static inline void pci_disable_sriov(struct pci_dev *dev)
504 {
505 }
506
507 /**
508 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
509 * @_table: device table name
510 *
511 * This macro is used to create a struct pci_device_id array (a device table)
512 * in a generic manner.
513 */
514 #define DEFINE_PCI_DEVICE_TABLE(_table) \
515 const struct pci_device_id _table[] __devinitdata
516
517
518 /* XXX This should not be necessary. */
519 #define pcix_set_mmrbc(d, v) 0
520 #define pcix_get_max_mmrbc(d) 0
521 #define pcie_set_readrq(d, v) 0
522
523 #define PCI_DMA_BIDIRECTIONAL 0
524 #define PCI_DMA_TODEVICE 1
525 #define PCI_DMA_FROMDEVICE 2
526 #define PCI_DMA_NONE 3
527
528 #define pci_pool dma_pool
529 #define pci_pool_destroy dma_pool_destroy
530 #define pci_pool_alloc dma_pool_alloc
531 #define pci_pool_free dma_pool_free
532 #define pci_pool_create(_name, _pdev, _size, _align, _alloc) \
533 dma_pool_create(_name, &(_pdev)->dev, _size, _align, _alloc)
534 #define pci_free_consistent(_hwdev, _size, _vaddr, _dma_handle) \
535 dma_free_coherent((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
536 _size, _vaddr, _dma_handle)
537 #define pci_map_sg(_hwdev, _sg, _nents, _dir) \
538 dma_map_sg((_hwdev) == NULL ? NULL : &(_hwdev->dev), \
539 _sg, _nents, (enum dma_data_direction)_dir)
540 #define pci_map_single(_hwdev, _ptr, _size, _dir) \
541 dma_map_single((_hwdev) == NULL ? NULL : &(_hwdev->dev), \
542 (_ptr), (_size), (enum dma_data_direction)_dir)
543 #define pci_unmap_single(_hwdev, _addr, _size, _dir) \
544 dma_unmap_single((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
545 _addr, _size, (enum dma_data_direction)_dir)
546 #define pci_unmap_sg(_hwdev, _sg, _nents, _dir) \
547 dma_unmap_sg((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
548 _sg, _nents, (enum dma_data_direction)_dir)
549 #define pci_map_page(_hwdev, _page, _offset, _size, _dir) \
550 dma_map_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, _page,\
551 _offset, _size, (enum dma_data_direction)_dir)
552 #define pci_unmap_page(_hwdev, _dma_address, _size, _dir) \
553 dma_unmap_page((_hwdev) == NULL ? NULL : &(_hwdev)->dev, \
554 _dma_address, _size, (enum dma_data_direction)_dir)
555 #define pci_set_dma_mask(_pdev, mask) dma_set_mask(&(_pdev)->dev, (mask))
556 #define pci_dma_mapping_error(_pdev, _dma_addr) \
557 dma_mapping_error(&(_pdev)->dev, _dma_addr)
558 #define pci_set_consistent_dma_mask(_pdev, _mask) \
559 dma_set_coherent_mask(&(_pdev)->dev, (_mask))
560 #define DECLARE_PCI_UNMAP_ADDR(x) DEFINE_DMA_UNMAP_ADDR(x);
561 #define DECLARE_PCI_UNMAP_LEN(x) DEFINE_DMA_UNMAP_LEN(x);
562 #define pci_unmap_addr dma_unmap_addr
563 #define pci_unmap_addr_set dma_unmap_addr_set
564 #define pci_unmap_len dma_unmap_len
565 #define pci_unmap_len_set dma_unmap_len_set
566
567 typedef unsigned int __bitwise pci_channel_state_t;
568 typedef unsigned int __bitwise pci_ers_result_t;
569
570 enum pci_channel_state {
571 /* I/O channel is in normal state */
572 pci_channel_io_normal = (__force pci_channel_state_t) 1,
573
574 /* I/O to channel is blocked */
575 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
576
577 /* PCI card is dead */
578 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
579 };
580
581 enum pci_ers_result {
582 /* no result/none/not supported in device driver */
583 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
584
585 /* Device driver can recover without slot reset */
586 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
587
588 /* Device driver wants slot to be reset. */
589 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
590
591 /* Device has completely failed, is unrecoverable */
592 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
593
594 /* Device driver is fully recovered and operational */
595 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
596 };
597
598
599 /* PCI bus error event callbacks */
600 struct pci_error_handlers {
601 /* PCI bus error detected on this device */
602 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
603 enum pci_channel_state error);
604
605 /* MMIO has been re-enabled, but not DMA */
606 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
607
608 /* PCI Express link has been reset */
609 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
610
611 /* PCI slot has been reset */
612 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
613
614 /* Device driver may resume normal operations */
615 void (*resume)(struct pci_dev *dev);
616 };
617
618 /* freeBSD does not support SRIOV - yet */
pci_physfn(struct pci_dev * dev)619 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
620 {
621 return dev;
622 }
623
pci_is_pcie(struct pci_dev * dev)624 static inline bool pci_is_pcie(struct pci_dev *dev)
625 {
626 return !!pci_pcie_cap(dev);
627 }
628
pcie_flags_reg(struct pci_dev * dev)629 static inline u16 pcie_flags_reg(struct pci_dev *dev)
630 {
631 int pos;
632 u16 reg16;
633
634 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
635 if (!pos)
636 return 0;
637
638 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16);
639
640 return reg16;
641 }
642
643
pci_pcie_type(struct pci_dev * dev)644 static inline int pci_pcie_type(struct pci_dev *dev)
645 {
646 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
647 }
648
pcie_cap_version(struct pci_dev * dev)649 static inline int pcie_cap_version(struct pci_dev *dev)
650 {
651 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS;
652 }
653
pcie_cap_has_lnkctl(struct pci_dev * dev)654 static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev)
655 {
656 int type = pci_pcie_type(dev);
657
658 return pcie_cap_version(dev) > 1 ||
659 type == PCI_EXP_TYPE_ROOT_PORT ||
660 type == PCI_EXP_TYPE_ENDPOINT ||
661 type == PCI_EXP_TYPE_LEG_END;
662 }
663
pcie_cap_has_devctl(const struct pci_dev * dev)664 static inline bool pcie_cap_has_devctl(const struct pci_dev *dev)
665 {
666 return true;
667 }
668
pcie_cap_has_sltctl(struct pci_dev * dev)669 static inline bool pcie_cap_has_sltctl(struct pci_dev *dev)
670 {
671 int type = pci_pcie_type(dev);
672
673 return pcie_cap_version(dev) > 1 ||
674 type == PCI_EXP_TYPE_ROOT_PORT ||
675 (type == PCI_EXP_TYPE_DOWNSTREAM &&
676 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT);
677 }
678
pcie_cap_has_rtctl(struct pci_dev * dev)679 static inline bool pcie_cap_has_rtctl(struct pci_dev *dev)
680 {
681 int type = pci_pcie_type(dev);
682
683 return pcie_cap_version(dev) > 1 ||
684 type == PCI_EXP_TYPE_ROOT_PORT ||
685 type == PCI_EXP_TYPE_RC_EC;
686 }
687
pcie_capability_reg_implemented(struct pci_dev * dev,int pos)688 static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
689 {
690 if (!pci_is_pcie(dev))
691 return false;
692
693 switch (pos) {
694 case PCI_EXP_FLAGS_TYPE:
695 return true;
696 case PCI_EXP_DEVCAP:
697 case PCI_EXP_DEVCTL:
698 case PCI_EXP_DEVSTA:
699 return pcie_cap_has_devctl(dev);
700 case PCI_EXP_LNKCAP:
701 case PCI_EXP_LNKCTL:
702 case PCI_EXP_LNKSTA:
703 return pcie_cap_has_lnkctl(dev);
704 case PCI_EXP_SLTCAP:
705 case PCI_EXP_SLTCTL:
706 case PCI_EXP_SLTSTA:
707 return pcie_cap_has_sltctl(dev);
708 case PCI_EXP_RTCTL:
709 case PCI_EXP_RTCAP:
710 case PCI_EXP_RTSTA:
711 return pcie_cap_has_rtctl(dev);
712 case PCI_EXP_DEVCAP2:
713 case PCI_EXP_DEVCTL2:
714 case PCI_EXP_LNKCAP2:
715 case PCI_EXP_LNKCTL2:
716 case PCI_EXP_LNKSTA2:
717 return pcie_cap_version(dev) > 1;
718 default:
719 return false;
720 }
721 }
722
723
pcie_capability_write_word(struct pci_dev * dev,int pos,u16 val)724 static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
725 {
726 if (pos & 1)
727 return -EINVAL;
728
729 if (!pcie_capability_reg_implemented(dev, pos))
730 return 0;
731
732 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
733 }
734
735 #endif /* _LINUX_PCI_H_ */
736