1 /*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * NETLOGIC_BSD
29 * $FreeBSD: stable/10/sys/mips/nlm/hal/mmu.h 227722 2011-11-19 14:06:15Z jchandra $
30 */
31
32 #ifndef __XLP_MMU_H__
33 #define __XLP_MMU_H__
34
35 #include <mips/nlm/hal/mips-extns.h>
36
37 static __inline__ uint32_t
nlm_read_c0_config6(void)38 nlm_read_c0_config6(void)
39 {
40 uint32_t rv;
41
42 __asm__ __volatile__ (
43 ".set push\n"
44 ".set mips64\n"
45 "mfc0 %0, $16, 6\n"
46 ".set pop\n"
47 : "=r" (rv));
48
49 return rv;
50 }
51
52 static __inline__ void
nlm_write_c0_config6(uint32_t value)53 nlm_write_c0_config6(uint32_t value)
54 {
55 __asm__ __volatile__ (
56 ".set push\n"
57 ".set mips64\n"
58 "mtc0 %0, $16, 6\n"
59 ".set pop\n"
60 : : "r" (value));
61 }
62
63 static __inline__ uint32_t
nlm_read_c0_config7(void)64 nlm_read_c0_config7(void)
65 {
66 uint32_t rv;
67
68 __asm__ __volatile__ (
69 ".set push\n"
70 ".set mips64\n"
71 "mfc0 %0, $16, 7\n"
72 ".set pop\n"
73 : "=r" (rv));
74
75 return rv;
76 }
77
78 static __inline__ void
nlm_write_c0_config7(uint32_t value)79 nlm_write_c0_config7(uint32_t value)
80 {
81 __asm__ __volatile__ (
82 ".set push\n"
83 ".set mips64\n"
84 "mtc0 %0, $16, 7\n"
85 ".set pop\n"
86 : : "r" (value));
87 }
88 /**
89 * On power on reset, XLP comes up with 64 TLBs.
90 * Large-variable-tlb's (ELVT) and extended TLB is disabled.
91 * Enabling large-variable-tlb's sets up the standard
92 * TLB size from 64 to 128 TLBs.
93 * Enabling fixed TLB (EFT) sets up an additional 2048 tlbs.
94 * ELVT + EFT = 128 + 2048 = 2176 TLB entries.
95 * threads 64-entry-standard-tlb 128-entry-standard-tlb
96 * per std-tlb-only| std+EFT | std-tlb-only| std+EFT
97 * core | | |
98 * --------------------------------------------------------
99 * 1 64 64+2048 128 128+2048
100 * 2 64 64+1024 64 64+1024
101 * 4 32 32+512 32 32+512
102 *
103 * 1(G) 64 64+2048 128 128+2048
104 * 2(G) 128 128+2048 128 128+2048
105 * 4(G) 128 128+2048 128 128+2048
106 * (G) = Global mode
107 */
108
109
110 /* en = 1 to enable
111 * en = 0 to disable
112 */
nlm_large_variable_tlb_en(int en)113 static __inline__ void nlm_large_variable_tlb_en (int en)
114 {
115 unsigned int val;
116
117 val = nlm_read_c0_config6();
118 val |= (en << 5);
119 nlm_write_c0_config6(val);
120 return;
121 }
122
123 /* en = 1 to enable
124 * en = 0 to disable
125 */
nlm_pagewalker_en(int en)126 static __inline__ void nlm_pagewalker_en(int en)
127 {
128 unsigned int val;
129
130 val = nlm_read_c0_config6();
131 val |= (en << 3);
132 nlm_write_c0_config6(val);
133 return;
134 }
135
136 /* en = 1 to enable
137 * en = 0 to disable
138 */
nlm_extended_tlb_en(int en)139 static __inline__ void nlm_extended_tlb_en(int en)
140 {
141 unsigned int val;
142
143 val = nlm_read_c0_config6();
144 val |= (en << 2);
145 nlm_write_c0_config6(val);
146 return;
147 }
148
nlm_get_num_combined_tlbs(void)149 static __inline__ int nlm_get_num_combined_tlbs(void)
150 {
151 return (((nlm_read_c0_config6() >> 16) & 0xffff) + 1);
152 }
153
154 /* get number of variable TLB entries */
nlm_get_num_vtlbs(void)155 static __inline__ int nlm_get_num_vtlbs(void)
156 {
157 return (((nlm_read_c0_config6() >> 6) & 0x3ff) + 1);
158 }
159
nlm_setup_extended_pagemask(int mask)160 static __inline__ void nlm_setup_extended_pagemask(int mask)
161 {
162 nlm_write_c0_config7(mask);
163 }
164
165 #endif
166