1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2003-2012 Broadcom Corporation
5 * All Rights Reserved
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
25 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
27 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
28 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/endian.h>
35
36 #include <mips/nlm/hal/mips-extns.h>
37 #include <mips/nlm/hal/haldefs.h>
38 #include <mips/nlm/hal/iomap.h>
39 #include <mips/nlm/hal/gbu.h>
40
41 #include <mips/nlm/board.h>
42
43 #define CPLD_REVISION 0x0
44 #define CPLD_RESET 0x1
45 #define CPLD_CTRL 0x2
46 #define CPLD_RSVD 0x3
47 #define CPLD_PWR_CTRL 0x4
48 #define CPLD_MISC 0x5
49 #define CPLD_CTRL_STATUS 0x6
50 #define CPLD_PWR_INTR_STATUS 0x7
51 #define CPLD_DATA 0x8
52
53 static __inline
nlm_cpld_read(uint64_t base,int reg)54 int nlm_cpld_read(uint64_t base, int reg)
55 {
56 uint16_t val;
57
58 val = *(volatile uint16_t *)(long)(base + reg * 2);
59 return le16toh(val);
60 }
61
62 static __inline void
nlm_cpld_write(uint64_t base,int reg,uint16_t data)63 nlm_cpld_write(uint64_t base, int reg, uint16_t data)
64 {
65 data = htole16(data);
66 *(volatile uint16_t *)(long)(base + reg * 2) = data;
67 }
68
69 int
nlm_board_cpld_majorversion(uint64_t base)70 nlm_board_cpld_majorversion(uint64_t base)
71 {
72 return (nlm_cpld_read(base, CPLD_REVISION) >> 8);
73 }
74
75 int
nlm_board_cpld_minorversion(uint64_t base)76 nlm_board_cpld_minorversion(uint64_t base)
77 {
78 return (nlm_cpld_read(base, CPLD_REVISION) & 0xff);
79 }
80
nlm_board_cpld_base(int node,int chipselect)81 uint64_t nlm_board_cpld_base(int node, int chipselect)
82 {
83 uint64_t gbubase, cpld_phys;
84
85 gbubase = nlm_get_gbu_regbase(node);
86 cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect));
87 return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8));
88 }
89
90 void
nlm_board_cpld_reset(uint64_t base)91 nlm_board_cpld_reset(uint64_t base)
92 {
93
94 nlm_cpld_write(base, CPLD_RESET, 1 << 15);
95 for(;;)
96 __asm __volatile("wait");
97 }
98
99 /* get daughter board type */
100 int
nlm_board_cpld_dboard_type(uint64_t base,int slot)101 nlm_board_cpld_dboard_type(uint64_t base, int slot)
102 {
103 uint16_t val;
104 int shift = 0;
105
106 switch (slot) {
107 case 0: shift = 0; break;
108 case 1: shift = 4; break;
109 case 2: shift = 2; break;
110 case 3: shift = 6; break;
111 }
112 val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift;
113 return (val & 0x3);
114 }
115