1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2015 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD$
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35
36 /* Communications core for Avago Technologies (LSI) MPT2 */
37
38 /* TODO Move headers to mpsvar */
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/selinfo.h>
44 #include <sys/lock.h>
45 #include <sys/mutex.h>
46 #include <sys/module.h>
47 #include <sys/bus.h>
48 #include <sys/conf.h>
49 #include <sys/bio.h>
50 #include <sys/malloc.h>
51 #include <sys/uio.h>
52 #include <sys/sysctl.h>
53 #include <sys/queue.h>
54 #include <sys/kthread.h>
55 #include <sys/taskqueue.h>
56 #include <sys/endian.h>
57 #include <sys/eventhandler.h>
58
59 #include <machine/bus.h>
60 #include <machine/resource.h>
61 #include <sys/rman.h>
62 #include <sys/proc.h>
63
64 #include <dev/pci/pcivar.h>
65
66 #include <cam/cam.h>
67 #include <cam/scsi/scsi_all.h>
68
69 #include <dev/mps/mpi/mpi2_type.h>
70 #include <dev/mps/mpi/mpi2.h>
71 #include <dev/mps/mpi/mpi2_ioc.h>
72 #include <dev/mps/mpi/mpi2_sas.h>
73 #include <dev/mps/mpi/mpi2_cnfg.h>
74 #include <dev/mps/mpi/mpi2_init.h>
75 #include <dev/mps/mpi/mpi2_tool.h>
76 #include <dev/mps/mps_ioctl.h>
77 #include <dev/mps/mpsvar.h>
78 #include <dev/mps/mps_table.h>
79
80 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag);
81 static int mps_init_queues(struct mps_softc *sc);
82 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag);
83 static int mps_transition_operational(struct mps_softc *sc);
84 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching);
85 static void mps_iocfacts_free(struct mps_softc *sc);
86 static void mps_startup(void *arg);
87 static int mps_send_iocinit(struct mps_softc *sc);
88 static int mps_alloc_queues(struct mps_softc *sc);
89 static int mps_alloc_replies(struct mps_softc *sc);
90 static int mps_alloc_requests(struct mps_softc *sc);
91 static int mps_attach_log(struct mps_softc *sc);
92 static __inline void mps_complete_command(struct mps_softc *sc,
93 struct mps_command *cm);
94 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
95 MPI2_EVENT_NOTIFICATION_REPLY *reply);
96 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
97 static void mps_periodic(void *);
98 static int mps_reregister_events(struct mps_softc *sc);
99 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
100 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
101 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag);
102 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
103
104 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
105
106 /*
107 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
108 * any state and back to its initialization state machine.
109 */
110 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
111
112 /* Added this union to smoothly convert le64toh cm->cm_desc.Words.
113 * Compiler only support unint64_t to be passed as argument.
114 * Otherwise it will through below error
115 * "aggregate value used where an integer was expected"
116 */
117
118 typedef union _reply_descriptor {
119 u64 word;
120 struct {
121 u32 low;
122 u32 high;
123 } u;
124 }reply_descriptor,address_descriptor;
125
126 /* Rate limit chain-fail messages to 1 per minute */
127 static struct timeval mps_chainfail_interval = { 60, 0 };
128
129 /*
130 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
131 * If this function is called from process context, it can sleep
132 * and there is no harm to sleep, in case if this fuction is called
133 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
134 * based on sleep flags driver will call either msleep, pause or DELAY.
135 * msleep and pause are of same variant, but pause is used when mps_mtx
136 * is not hold by driver.
137 *
138 */
139 static int
mps_diag_reset(struct mps_softc * sc,int sleep_flag)140 mps_diag_reset(struct mps_softc *sc,int sleep_flag)
141 {
142 uint32_t reg;
143 int i, error, tries = 0;
144 uint8_t first_wait_done = FALSE;
145
146 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
147
148 /* Clear any pending interrupts */
149 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
150
151 /*Force NO_SLEEP for threads prohibited to sleep
152 * e.a Thread from interrupt handler are prohibited to sleep.
153 */
154 if (curthread->td_no_sleeping != 0)
155 sleep_flag = NO_SLEEP;
156
157 /* Push the magic sequence */
158 error = ETIMEDOUT;
159 while (tries++ < 20) {
160 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
161 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
162 mpt2_reset_magic[i]);
163 /* wait 100 msec */
164 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
165 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
166 "mpsdiag", hz/10);
167 else if (sleep_flag == CAN_SLEEP)
168 pause("mpsdiag", hz/10);
169 else
170 DELAY(100 * 1000);
171
172 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
173 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
174 error = 0;
175 break;
176 }
177 }
178 if (error)
179 return (error);
180
181 /* Send the actual reset. XXX need to refresh the reg? */
182 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
183 reg | MPI2_DIAG_RESET_ADAPTER);
184
185 /* Wait up to 300 seconds in 50ms intervals */
186 error = ETIMEDOUT;
187 for (i = 0; i < 6000; i++) {
188 /*
189 * Wait 50 msec. If this is the first time through, wait 256
190 * msec to satisfy Diag Reset timing requirements.
191 */
192 if (first_wait_done) {
193 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
194 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
195 "mpsdiag", hz/20);
196 else if (sleep_flag == CAN_SLEEP)
197 pause("mpsdiag", hz/20);
198 else
199 DELAY(50 * 1000);
200 } else {
201 DELAY(256 * 1000);
202 first_wait_done = TRUE;
203 }
204 /*
205 * Check for the RESET_ADAPTER bit to be cleared first, then
206 * wait for the RESET state to be cleared, which takes a little
207 * longer.
208 */
209 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
210 if (reg & MPI2_DIAG_RESET_ADAPTER) {
211 continue;
212 }
213 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
214 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
215 error = 0;
216 break;
217 }
218 }
219 if (error)
220 return (error);
221
222 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
223
224 return (0);
225 }
226
227 static int
mps_message_unit_reset(struct mps_softc * sc,int sleep_flag)228 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag)
229 {
230
231 MPS_FUNCTRACE(sc);
232
233 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
234 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
235 MPI2_DOORBELL_FUNCTION_SHIFT);
236
237 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) {
238 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed : <%s>\n",
239 __func__);
240 return (ETIMEDOUT);
241 }
242
243 return (0);
244 }
245
246 static int
mps_transition_ready(struct mps_softc * sc)247 mps_transition_ready(struct mps_softc *sc)
248 {
249 uint32_t reg, state;
250 int error, tries = 0;
251 int sleep_flags;
252
253 MPS_FUNCTRACE(sc);
254 /* If we are in attach call, do not sleep */
255 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE)
256 ? CAN_SLEEP:NO_SLEEP;
257 error = 0;
258 while (tries++ < 1200) {
259 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
260 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
261
262 /*
263 * Ensure the IOC is ready to talk. If it's not, try
264 * resetting it.
265 */
266 if (reg & MPI2_DOORBELL_USED) {
267 mps_diag_reset(sc, sleep_flags);
268 DELAY(50000);
269 continue;
270 }
271
272 /* Is the adapter owned by another peer? */
273 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
274 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
275 device_printf(sc->mps_dev, "IOC is under the control "
276 "of another peer host, aborting initialization.\n");
277 return (ENXIO);
278 }
279
280 state = reg & MPI2_IOC_STATE_MASK;
281 if (state == MPI2_IOC_STATE_READY) {
282 /* Ready to go! */
283 error = 0;
284 break;
285 } else if (state == MPI2_IOC_STATE_FAULT) {
286 mps_dprint(sc, MPS_FAULT, "IOC in fault state 0x%x, resetting\n",
287 state & MPI2_DOORBELL_FAULT_CODE_MASK);
288 mps_diag_reset(sc, sleep_flags);
289 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
290 /* Need to take ownership */
291 mps_message_unit_reset(sc, sleep_flags);
292 } else if (state == MPI2_IOC_STATE_RESET) {
293 /* Wait a bit, IOC might be in transition */
294 mps_dprint(sc, MPS_FAULT,
295 "IOC in unexpected reset state\n");
296 } else {
297 mps_dprint(sc, MPS_FAULT,
298 "IOC in unknown state 0x%x\n", state);
299 error = EINVAL;
300 break;
301 }
302
303 /* Wait 50ms for things to settle down. */
304 DELAY(50000);
305 }
306
307 if (error)
308 device_printf(sc->mps_dev, "Cannot transition IOC to ready\n");
309
310 return (error);
311 }
312
313 static int
mps_transition_operational(struct mps_softc * sc)314 mps_transition_operational(struct mps_softc *sc)
315 {
316 uint32_t reg, state;
317 int error;
318
319 MPS_FUNCTRACE(sc);
320
321 error = 0;
322 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
323 mps_dprint(sc, MPS_INIT, "Doorbell= 0x%x\n", reg);
324
325 state = reg & MPI2_IOC_STATE_MASK;
326 if (state != MPI2_IOC_STATE_READY) {
327 if ((error = mps_transition_ready(sc)) != 0) {
328 mps_dprint(sc, MPS_FAULT,
329 "%s failed to transition ready\n", __func__);
330 return (error);
331 }
332 }
333
334 error = mps_send_iocinit(sc);
335 return (error);
336 }
337
338 /*
339 * This is called during attach and when re-initializing due to a Diag Reset.
340 * IOC Facts is used to allocate many of the structures needed by the driver.
341 * If called from attach, de-allocation is not required because the driver has
342 * not allocated any structures yet, but if called from a Diag Reset, previously
343 * allocated structures based on IOC Facts will need to be freed and re-
344 * allocated bases on the latest IOC Facts.
345 */
346 static int
mps_iocfacts_allocate(struct mps_softc * sc,uint8_t attaching)347 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching)
348 {
349 int error;
350 Mpi2IOCFactsReply_t saved_facts;
351 uint8_t saved_mode, reallocating;
352
353 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
354
355 /* Save old IOC Facts and then only reallocate if Facts have changed */
356 if (!attaching) {
357 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
358 }
359
360 /*
361 * Get IOC Facts. In all cases throughout this function, panic if doing
362 * a re-initialization and only return the error if attaching so the OS
363 * can handle it.
364 */
365 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) {
366 if (attaching) {
367 mps_dprint(sc, MPS_FAULT, "%s failed to get IOC Facts "
368 "with error %d\n", __func__, error);
369 return (error);
370 } else {
371 panic("%s failed to get IOC Facts with error %d\n",
372 __func__, error);
373 }
374 }
375
376 mps_print_iocfacts(sc, sc->facts);
377
378 snprintf(sc->fw_version, sizeof(sc->fw_version),
379 "%02d.%02d.%02d.%02d",
380 sc->facts->FWVersion.Struct.Major,
381 sc->facts->FWVersion.Struct.Minor,
382 sc->facts->FWVersion.Struct.Unit,
383 sc->facts->FWVersion.Struct.Dev);
384
385 mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
386 MPS_DRIVER_VERSION);
387 mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
388 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
389 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
390 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
391
392 /*
393 * If the chip doesn't support event replay then a hard reset will be
394 * required to trigger a full discovery. Do the reset here then
395 * retransition to Ready. A hard reset might have already been done,
396 * but it doesn't hurt to do it again. Only do this if attaching, not
397 * for a Diag Reset.
398 */
399 if (attaching) {
400 if ((sc->facts->IOCCapabilities &
401 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
402 mps_diag_reset(sc, NO_SLEEP);
403 if ((error = mps_transition_ready(sc)) != 0) {
404 mps_dprint(sc, MPS_FAULT, "%s failed to "
405 "transition to ready with error %d\n",
406 __func__, error);
407 return (error);
408 }
409 }
410 }
411
412 /*
413 * Set flag if IR Firmware is loaded. If the RAID Capability has
414 * changed from the previous IOC Facts, log a warning, but only if
415 * checking this after a Diag Reset and not during attach.
416 */
417 saved_mode = sc->ir_firmware;
418 if (sc->facts->IOCCapabilities &
419 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
420 sc->ir_firmware = 1;
421 if (!attaching) {
422 if (sc->ir_firmware != saved_mode) {
423 mps_dprint(sc, MPS_FAULT, "%s new IR/IT mode in IOC "
424 "Facts does not match previous mode\n", __func__);
425 }
426 }
427
428 /* Only deallocate and reallocate if relevant IOC Facts have changed */
429 reallocating = FALSE;
430 if ((!attaching) &&
431 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
432 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
433 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
434 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
435 (saved_facts.ProductID != sc->facts->ProductID) ||
436 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
437 (saved_facts.IOCRequestFrameSize !=
438 sc->facts->IOCRequestFrameSize) ||
439 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
440 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
441 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
442 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
443 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
444 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
445 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
446 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
447 (saved_facts.MaxPersistentEntries !=
448 sc->facts->MaxPersistentEntries))) {
449 reallocating = TRUE;
450 }
451
452 /*
453 * Some things should be done if attaching or re-allocating after a Diag
454 * Reset, but are not needed after a Diag Reset if the FW has not
455 * changed.
456 */
457 if (attaching || reallocating) {
458 /*
459 * Check if controller supports FW diag buffers and set flag to
460 * enable each type.
461 */
462 if (sc->facts->IOCCapabilities &
463 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
464 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
465 enabled = TRUE;
466 if (sc->facts->IOCCapabilities &
467 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
468 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
469 enabled = TRUE;
470 if (sc->facts->IOCCapabilities &
471 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
472 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
473 enabled = TRUE;
474
475 /*
476 * Set flag if EEDP is supported and if TLR is supported.
477 */
478 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
479 sc->eedp_enabled = TRUE;
480 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
481 sc->control_TLR = TRUE;
482
483 /*
484 * Size the queues. Since the reply queues always need one free
485 * entry, we'll just deduct one reply message here.
486 */
487 sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit);
488 sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES,
489 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
490
491 /*
492 * Initialize all Tail Queues
493 */
494 TAILQ_INIT(&sc->req_list);
495 TAILQ_INIT(&sc->high_priority_req_list);
496 TAILQ_INIT(&sc->chain_list);
497 TAILQ_INIT(&sc->tm_list);
498 }
499
500 /*
501 * If doing a Diag Reset and the FW is significantly different
502 * (reallocating will be set above in IOC Facts comparison), then all
503 * buffers based on the IOC Facts will need to be freed before they are
504 * reallocated.
505 */
506 if (reallocating) {
507 mps_iocfacts_free(sc);
508 mpssas_realloc_targets(sc, saved_facts.MaxTargets);
509 }
510
511 /*
512 * Any deallocation has been completed. Now start reallocating
513 * if needed. Will only need to reallocate if attaching or if the new
514 * IOC Facts are different from the previous IOC Facts after a Diag
515 * Reset. Targets have already been allocated above if needed.
516 */
517 if (attaching || reallocating) {
518 if (((error = mps_alloc_queues(sc)) != 0) ||
519 ((error = mps_alloc_replies(sc)) != 0) ||
520 ((error = mps_alloc_requests(sc)) != 0)) {
521 if (attaching ) {
522 mps_dprint(sc, MPS_FAULT, "%s failed to alloc "
523 "queues with error %d\n", __func__, error);
524 mps_free(sc);
525 return (error);
526 } else {
527 panic("%s failed to alloc queues with error "
528 "%d\n", __func__, error);
529 }
530 }
531 }
532
533 /* Always initialize the queues */
534 bzero(sc->free_queue, sc->fqdepth * 4);
535 mps_init_queues(sc);
536
537 /*
538 * Always get the chip out of the reset state, but only panic if not
539 * attaching. If attaching and there is an error, that is handled by
540 * the OS.
541 */
542 error = mps_transition_operational(sc);
543 if (error != 0) {
544 if (attaching) {
545 mps_printf(sc, "%s failed to transition to operational "
546 "with error %d\n", __func__, error);
547 mps_free(sc);
548 return (error);
549 } else {
550 panic("%s failed to transition to operational with "
551 "error %d\n", __func__, error);
552 }
553 }
554
555 /*
556 * Finish the queue initialization.
557 * These are set here instead of in mps_init_queues() because the
558 * IOC resets these values during the state transition in
559 * mps_transition_operational(). The free index is set to 1
560 * because the corresponding index in the IOC is set to 0, and the
561 * IOC treats the queues as full if both are set to the same value.
562 * Hence the reason that the queue can't hold all of the possible
563 * replies.
564 */
565 sc->replypostindex = 0;
566 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
567 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
568
569 /*
570 * Attach the subsystems so they can prepare their event masks.
571 */
572 /* XXX Should be dynamic so that IM/IR and user modules can attach */
573 if (attaching) {
574 if (((error = mps_attach_log(sc)) != 0) ||
575 ((error = mps_attach_sas(sc)) != 0) ||
576 ((error = mps_attach_user(sc)) != 0)) {
577 mps_printf(sc, "%s failed to attach all subsystems: "
578 "error %d\n", __func__, error);
579 mps_free(sc);
580 return (error);
581 }
582
583 if ((error = mps_pci_setup_interrupts(sc)) != 0) {
584 mps_printf(sc, "%s failed to setup interrupts\n",
585 __func__);
586 mps_free(sc);
587 return (error);
588 }
589 }
590
591 /*
592 * Set flag if this is a WD controller. This shouldn't ever change, but
593 * reset it after a Diag Reset, just in case.
594 */
595 sc->WD_available = FALSE;
596 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200)
597 sc->WD_available = TRUE;
598
599 return (error);
600 }
601
602 /*
603 * This is called if memory is being free (during detach for example) and when
604 * buffers need to be reallocated due to a Diag Reset.
605 */
606 static void
mps_iocfacts_free(struct mps_softc * sc)607 mps_iocfacts_free(struct mps_softc *sc)
608 {
609 struct mps_command *cm;
610 int i;
611
612 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
613
614 if (sc->free_busaddr != 0)
615 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
616 if (sc->free_queue != NULL)
617 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
618 sc->queues_map);
619 if (sc->queues_dmat != NULL)
620 bus_dma_tag_destroy(sc->queues_dmat);
621
622 if (sc->chain_busaddr != 0)
623 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
624 if (sc->chain_frames != NULL)
625 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
626 sc->chain_map);
627 if (sc->chain_dmat != NULL)
628 bus_dma_tag_destroy(sc->chain_dmat);
629
630 if (sc->sense_busaddr != 0)
631 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
632 if (sc->sense_frames != NULL)
633 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
634 sc->sense_map);
635 if (sc->sense_dmat != NULL)
636 bus_dma_tag_destroy(sc->sense_dmat);
637
638 if (sc->reply_busaddr != 0)
639 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
640 if (sc->reply_frames != NULL)
641 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
642 sc->reply_map);
643 if (sc->reply_dmat != NULL)
644 bus_dma_tag_destroy(sc->reply_dmat);
645
646 if (sc->req_busaddr != 0)
647 bus_dmamap_unload(sc->req_dmat, sc->req_map);
648 if (sc->req_frames != NULL)
649 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
650 if (sc->req_dmat != NULL)
651 bus_dma_tag_destroy(sc->req_dmat);
652
653 if (sc->chains != NULL)
654 free(sc->chains, M_MPT2);
655 if (sc->commands != NULL) {
656 for (i = 1; i < sc->num_reqs; i++) {
657 cm = &sc->commands[i];
658 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
659 }
660 free(sc->commands, M_MPT2);
661 }
662 if (sc->buffer_dmat != NULL)
663 bus_dma_tag_destroy(sc->buffer_dmat);
664 }
665
666 /*
667 * The terms diag reset and hard reset are used interchangeably in the MPI
668 * docs to mean resetting the controller chip. In this code diag reset
669 * cleans everything up, and the hard reset function just sends the reset
670 * sequence to the chip. This should probably be refactored so that every
671 * subsystem gets a reset notification of some sort, and can clean up
672 * appropriately.
673 */
674 int
mps_reinit(struct mps_softc * sc)675 mps_reinit(struct mps_softc *sc)
676 {
677 int error;
678 struct mpssas_softc *sassc;
679
680 sassc = sc->sassc;
681
682 MPS_FUNCTRACE(sc);
683
684 mtx_assert(&sc->mps_mtx, MA_OWNED);
685
686 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
687 mps_dprint(sc, MPS_INIT, "%s reset already in progress\n",
688 __func__);
689 return 0;
690 }
691
692 mps_dprint(sc, MPS_INFO, "Reinitializing controller,\n");
693 /* make sure the completion callbacks can recognize they're getting
694 * a NULL cm_reply due to a reset.
695 */
696 sc->mps_flags |= MPS_FLAGS_DIAGRESET;
697
698 /*
699 * Mask interrupts here.
700 */
701 mps_dprint(sc, MPS_INIT, "%s mask interrupts\n", __func__);
702 mps_mask_intr(sc);
703
704 error = mps_diag_reset(sc, CAN_SLEEP);
705 if (error != 0) {
706 /* XXXSL No need to panic here */
707 panic("%s hard reset failed with error %d\n",
708 __func__, error);
709 }
710
711 /* Restore the PCI state, including the MSI-X registers */
712 mps_pci_restore(sc);
713
714 /* Give the I/O subsystem special priority to get itself prepared */
715 mpssas_handle_reinit(sc);
716
717 /*
718 * Get IOC Facts and allocate all structures based on this information.
719 * The attach function will also call mps_iocfacts_allocate at startup.
720 * If relevant values have changed in IOC Facts, this function will free
721 * all of the memory based on IOC Facts and reallocate that memory.
722 */
723 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) {
724 panic("%s IOC Facts based allocation failed with error %d\n",
725 __func__, error);
726 }
727
728 /*
729 * Mapping structures will be re-allocated after getting IOC Page8, so
730 * free these structures here.
731 */
732 mps_mapping_exit(sc);
733
734 /*
735 * The static page function currently read is IOC Page8. Others can be
736 * added in future. It's possible that the values in IOC Page8 have
737 * changed after a Diag Reset due to user modification, so always read
738 * these. Interrupts are masked, so unmask them before getting config
739 * pages.
740 */
741 mps_unmask_intr(sc);
742 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
743 mps_base_static_config_pages(sc);
744
745 /*
746 * Some mapping info is based in IOC Page8 data, so re-initialize the
747 * mapping tables.
748 */
749 mps_mapping_initialize(sc);
750
751 /*
752 * Restart will reload the event masks clobbered by the reset, and
753 * then enable the port.
754 */
755 mps_reregister_events(sc);
756
757 /* the end of discovery will release the simq, so we're done. */
758 mps_dprint(sc, MPS_INFO, "%s finished sc %p post %u free %u\n",
759 __func__, sc, sc->replypostindex, sc->replyfreeindex);
760
761 mpssas_release_simq_reinit(sassc);
762
763 return 0;
764 }
765
766 /* Wait for the chip to ACK a word that we've put into its FIFO
767 * Wait for <timeout> seconds. In single loop wait for busy loop
768 * for 500 microseconds.
769 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
770 * */
771 static int
mps_wait_db_ack(struct mps_softc * sc,int timeout,int sleep_flag)772 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag)
773 {
774
775 u32 cntdn, count;
776 u32 int_status;
777 u32 doorbell;
778
779 count = 0;
780 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
781 do {
782 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
783 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
784 mps_dprint(sc, MPS_INIT,
785 "%s: successfull count(%d), timeout(%d)\n",
786 __func__, count, timeout);
787 return 0;
788 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
789 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
790 if ((doorbell & MPI2_IOC_STATE_MASK) ==
791 MPI2_IOC_STATE_FAULT) {
792 mps_dprint(sc, MPS_FAULT,
793 "fault_state(0x%04x)!\n", doorbell);
794 return (EFAULT);
795 }
796 } else if (int_status == 0xFFFFFFFF)
797 goto out;
798
799 /* If it can sleep, sleep for 1 milisecond, else busy loop for
800 * 0.5 milisecond */
801 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
802 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
803 "mpsdba", hz/1000);
804 else if (sleep_flag == CAN_SLEEP)
805 pause("mpsdba", hz/1000);
806 else
807 DELAY(500);
808 count++;
809 } while (--cntdn);
810
811 out:
812 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), "
813 "int_status(%x)!\n", __func__, count, int_status);
814 return (ETIMEDOUT);
815
816 }
817
818 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
819 static int
mps_wait_db_int(struct mps_softc * sc)820 mps_wait_db_int(struct mps_softc *sc)
821 {
822 int retry;
823
824 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
825 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
826 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
827 return (0);
828 DELAY(2000);
829 }
830 return (ETIMEDOUT);
831 }
832
833 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
834 static int
mps_request_sync(struct mps_softc * sc,void * req,MPI2_DEFAULT_REPLY * reply,int req_sz,int reply_sz,int timeout)835 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
836 int req_sz, int reply_sz, int timeout)
837 {
838 uint32_t *data32;
839 uint16_t *data16;
840 int i, count, ioc_sz, residual;
841 int sleep_flags = CAN_SLEEP;
842
843 if (curthread->td_no_sleeping != 0)
844 sleep_flags = NO_SLEEP;
845
846 /* Step 1 */
847 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
848
849 /* Step 2 */
850 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
851 return (EBUSY);
852
853 /* Step 3
854 * Announce that a message is coming through the doorbell. Messages
855 * are pushed at 32bit words, so round up if needed.
856 */
857 count = (req_sz + 3) / 4;
858 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
859 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
860 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
861
862 /* Step 4 */
863 if (mps_wait_db_int(sc) ||
864 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
865 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
866 return (ENXIO);
867 }
868 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
869 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
870 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
871 return (ENXIO);
872 }
873
874 /* Step 5 */
875 /* Clock out the message data synchronously in 32-bit dwords*/
876 data32 = (uint32_t *)req;
877 for (i = 0; i < count; i++) {
878 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
879 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
880 mps_dprint(sc, MPS_FAULT,
881 "Timeout while writing doorbell\n");
882 return (ENXIO);
883 }
884 }
885
886 /* Step 6 */
887 /* Clock in the reply in 16-bit words. The total length of the
888 * message is always in the 4th byte, so clock out the first 2 words
889 * manually, then loop the rest.
890 */
891 data16 = (uint16_t *)reply;
892 if (mps_wait_db_int(sc) != 0) {
893 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
894 return (ENXIO);
895 }
896 data16[0] =
897 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
898 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
899 if (mps_wait_db_int(sc) != 0) {
900 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
901 return (ENXIO);
902 }
903 data16[1] =
904 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
905 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
906
907 /* Number of 32bit words in the message */
908 ioc_sz = reply->MsgLength;
909
910 /*
911 * Figure out how many 16bit words to clock in without overrunning.
912 * The precision loss with dividing reply_sz can safely be
913 * ignored because the messages can only be multiples of 32bits.
914 */
915 residual = 0;
916 count = MIN((reply_sz / 4), ioc_sz) * 2;
917 if (count < ioc_sz * 2) {
918 residual = ioc_sz * 2 - count;
919 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d "
920 "residual message words\n", residual);
921 }
922
923 for (i = 2; i < count; i++) {
924 if (mps_wait_db_int(sc) != 0) {
925 mps_dprint(sc, MPS_FAULT,
926 "Timeout reading doorbell %d\n", i);
927 return (ENXIO);
928 }
929 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
930 MPI2_DOORBELL_DATA_MASK;
931 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
932 }
933
934 /*
935 * Pull out residual words that won't fit into the provided buffer.
936 * This keeps the chip from hanging due to a driver programming
937 * error.
938 */
939 while (residual--) {
940 if (mps_wait_db_int(sc) != 0) {
941 mps_dprint(sc, MPS_FAULT,
942 "Timeout reading doorbell\n");
943 return (ENXIO);
944 }
945 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
946 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
947 }
948
949 /* Step 7 */
950 if (mps_wait_db_int(sc) != 0) {
951 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
952 return (ENXIO);
953 }
954 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
955 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
956 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
957
958 return (0);
959 }
960
961 static void
mps_enqueue_request(struct mps_softc * sc,struct mps_command * cm)962 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
963 {
964 reply_descriptor rd;
965 MPS_FUNCTRACE(sc);
966 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n",
967 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
968
969 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
970 mtx_assert(&sc->mps_mtx, MA_OWNED);
971
972 if (++sc->io_cmds_active > sc->io_cmds_highwater)
973 sc->io_cmds_highwater++;
974 rd.u.low = cm->cm_desc.Words.Low;
975 rd.u.high = cm->cm_desc.Words.High;
976 rd.word = htole64(rd.word);
977 /* TODO-We may need to make below regwrite atomic */
978 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
979 rd.u.low);
980 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
981 rd.u.high);
982 }
983
984 /*
985 * Just the FACTS, ma'am.
986 */
987 static int
mps_get_iocfacts(struct mps_softc * sc,MPI2_IOC_FACTS_REPLY * facts)988 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
989 {
990 MPI2_DEFAULT_REPLY *reply;
991 MPI2_IOC_FACTS_REQUEST request;
992 int error, req_sz, reply_sz;
993
994 MPS_FUNCTRACE(sc);
995
996 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
997 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
998 reply = (MPI2_DEFAULT_REPLY *)facts;
999
1000 bzero(&request, req_sz);
1001 request.Function = MPI2_FUNCTION_IOC_FACTS;
1002 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1003
1004 return (error);
1005 }
1006
1007 static int
mps_send_iocinit(struct mps_softc * sc)1008 mps_send_iocinit(struct mps_softc *sc)
1009 {
1010 MPI2_IOC_INIT_REQUEST init;
1011 MPI2_DEFAULT_REPLY reply;
1012 int req_sz, reply_sz, error;
1013 struct timeval now;
1014 uint64_t time_in_msec;
1015
1016 MPS_FUNCTRACE(sc);
1017
1018 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1019 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1020 bzero(&init, req_sz);
1021 bzero(&reply, reply_sz);
1022
1023 /*
1024 * Fill in the init block. Note that most addresses are
1025 * deliberately in the lower 32bits of memory. This is a micro-
1026 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1027 */
1028 init.Function = MPI2_FUNCTION_IOC_INIT;
1029 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1030 init.MsgVersion = htole16(MPI2_VERSION);
1031 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1032 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1033 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1034 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1035 init.SenseBufferAddressHigh = 0;
1036 init.SystemReplyAddressHigh = 0;
1037 init.SystemRequestFrameBaseAddress.High = 0;
1038 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr);
1039 init.ReplyDescriptorPostQueueAddress.High = 0;
1040 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr);
1041 init.ReplyFreeQueueAddress.High = 0;
1042 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1043 getmicrotime(&now);
1044 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1045 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1046 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1047
1048 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1049 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1050 error = ENXIO;
1051
1052 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1053 return (error);
1054 }
1055
1056 void
mps_memaddr_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1057 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1058 {
1059 bus_addr_t *addr;
1060
1061 addr = arg;
1062 *addr = segs[0].ds_addr;
1063 }
1064
1065 static int
mps_alloc_queues(struct mps_softc * sc)1066 mps_alloc_queues(struct mps_softc *sc)
1067 {
1068 bus_addr_t queues_busaddr;
1069 uint8_t *queues;
1070 int qsize, fqsize, pqsize;
1071
1072 /*
1073 * The reply free queue contains 4 byte entries in multiples of 16 and
1074 * aligned on a 16 byte boundary. There must always be an unused entry.
1075 * This queue supplies fresh reply frames for the firmware to use.
1076 *
1077 * The reply descriptor post queue contains 8 byte entries in
1078 * multiples of 16 and aligned on a 16 byte boundary. This queue
1079 * contains filled-in reply frames sent from the firmware to the host.
1080 *
1081 * These two queues are allocated together for simplicity.
1082 */
1083 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
1084 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
1085 fqsize= sc->fqdepth * 4;
1086 pqsize = sc->pqdepth * 8;
1087 qsize = fqsize + pqsize;
1088
1089 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1090 16, 0, /* algnmnt, boundary */
1091 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1092 BUS_SPACE_MAXADDR, /* highaddr */
1093 NULL, NULL, /* filter, filterarg */
1094 qsize, /* maxsize */
1095 1, /* nsegments */
1096 qsize, /* maxsegsize */
1097 0, /* flags */
1098 NULL, NULL, /* lockfunc, lockarg */
1099 &sc->queues_dmat)) {
1100 device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n");
1101 return (ENOMEM);
1102 }
1103 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1104 &sc->queues_map)) {
1105 device_printf(sc->mps_dev, "Cannot allocate queues memory\n");
1106 return (ENOMEM);
1107 }
1108 bzero(queues, qsize);
1109 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1110 mps_memaddr_cb, &queues_busaddr, 0);
1111
1112 sc->free_queue = (uint32_t *)queues;
1113 sc->free_busaddr = queues_busaddr;
1114 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1115 sc->post_busaddr = queues_busaddr + fqsize;
1116
1117 return (0);
1118 }
1119
1120 static int
mps_alloc_replies(struct mps_softc * sc)1121 mps_alloc_replies(struct mps_softc *sc)
1122 {
1123 int rsize, num_replies;
1124
1125 /*
1126 * sc->num_replies should be one less than sc->fqdepth. We need to
1127 * allocate space for sc->fqdepth replies, but only sc->num_replies
1128 * replies can be used at once.
1129 */
1130 num_replies = max(sc->fqdepth, sc->num_replies);
1131
1132 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1133 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1134 4, 0, /* algnmnt, boundary */
1135 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1136 BUS_SPACE_MAXADDR, /* highaddr */
1137 NULL, NULL, /* filter, filterarg */
1138 rsize, /* maxsize */
1139 1, /* nsegments */
1140 rsize, /* maxsegsize */
1141 0, /* flags */
1142 NULL, NULL, /* lockfunc, lockarg */
1143 &sc->reply_dmat)) {
1144 device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n");
1145 return (ENOMEM);
1146 }
1147 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1148 BUS_DMA_NOWAIT, &sc->reply_map)) {
1149 device_printf(sc->mps_dev, "Cannot allocate replies memory\n");
1150 return (ENOMEM);
1151 }
1152 bzero(sc->reply_frames, rsize);
1153 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1154 mps_memaddr_cb, &sc->reply_busaddr, 0);
1155
1156 return (0);
1157 }
1158
1159 static int
mps_alloc_requests(struct mps_softc * sc)1160 mps_alloc_requests(struct mps_softc *sc)
1161 {
1162 struct mps_command *cm;
1163 struct mps_chain *chain;
1164 int i, rsize, nsegs;
1165
1166 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1167 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1168 16, 0, /* algnmnt, boundary */
1169 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1170 BUS_SPACE_MAXADDR, /* highaddr */
1171 NULL, NULL, /* filter, filterarg */
1172 rsize, /* maxsize */
1173 1, /* nsegments */
1174 rsize, /* maxsegsize */
1175 0, /* flags */
1176 NULL, NULL, /* lockfunc, lockarg */
1177 &sc->req_dmat)) {
1178 device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n");
1179 return (ENOMEM);
1180 }
1181 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1182 BUS_DMA_NOWAIT, &sc->req_map)) {
1183 device_printf(sc->mps_dev, "Cannot allocate request memory\n");
1184 return (ENOMEM);
1185 }
1186 bzero(sc->req_frames, rsize);
1187 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1188 mps_memaddr_cb, &sc->req_busaddr, 0);
1189
1190 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
1191 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1192 16, 0, /* algnmnt, boundary */
1193 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1194 BUS_SPACE_MAXADDR, /* highaddr */
1195 NULL, NULL, /* filter, filterarg */
1196 rsize, /* maxsize */
1197 1, /* nsegments */
1198 rsize, /* maxsegsize */
1199 0, /* flags */
1200 NULL, NULL, /* lockfunc, lockarg */
1201 &sc->chain_dmat)) {
1202 device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n");
1203 return (ENOMEM);
1204 }
1205 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1206 BUS_DMA_NOWAIT, &sc->chain_map)) {
1207 device_printf(sc->mps_dev, "Cannot allocate chain memory\n");
1208 return (ENOMEM);
1209 }
1210 bzero(sc->chain_frames, rsize);
1211 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1212 mps_memaddr_cb, &sc->chain_busaddr, 0);
1213
1214 rsize = MPS_SENSE_LEN * sc->num_reqs;
1215 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1216 1, 0, /* algnmnt, boundary */
1217 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1218 BUS_SPACE_MAXADDR, /* highaddr */
1219 NULL, NULL, /* filter, filterarg */
1220 rsize, /* maxsize */
1221 1, /* nsegments */
1222 rsize, /* maxsegsize */
1223 0, /* flags */
1224 NULL, NULL, /* lockfunc, lockarg */
1225 &sc->sense_dmat)) {
1226 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
1227 return (ENOMEM);
1228 }
1229 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1230 BUS_DMA_NOWAIT, &sc->sense_map)) {
1231 device_printf(sc->mps_dev, "Cannot allocate sense memory\n");
1232 return (ENOMEM);
1233 }
1234 bzero(sc->sense_frames, rsize);
1235 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1236 mps_memaddr_cb, &sc->sense_busaddr, 0);
1237
1238 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2,
1239 M_WAITOK | M_ZERO);
1240 if(!sc->chains) {
1241 device_printf(sc->mps_dev,
1242 "Cannot allocate chains memory %s %d\n",
1243 __func__, __LINE__);
1244 return (ENOMEM);
1245 }
1246 for (i = 0; i < sc->max_chains; i++) {
1247 chain = &sc->chains[i];
1248 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1249 i * sc->facts->IOCRequestFrameSize * 4);
1250 chain->chain_busaddr = sc->chain_busaddr +
1251 i * sc->facts->IOCRequestFrameSize * 4;
1252 mps_free_chain(sc, chain);
1253 sc->chain_free_lowwater++;
1254 }
1255
1256 /* XXX Need to pick a more precise value */
1257 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1258 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1259 1, 0, /* algnmnt, boundary */
1260 BUS_SPACE_MAXADDR, /* lowaddr */
1261 BUS_SPACE_MAXADDR, /* highaddr */
1262 NULL, NULL, /* filter, filterarg */
1263 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1264 nsegs, /* nsegments */
1265 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */
1266 BUS_DMA_ALLOCNOW, /* flags */
1267 busdma_lock_mutex, /* lockfunc */
1268 &sc->mps_mtx, /* lockarg */
1269 &sc->buffer_dmat)) {
1270 device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n");
1271 return (ENOMEM);
1272 }
1273
1274 /*
1275 * SMID 0 cannot be used as a free command per the firmware spec.
1276 * Just drop that command instead of risking accounting bugs.
1277 */
1278 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
1279 M_MPT2, M_WAITOK | M_ZERO);
1280 if(!sc->commands) {
1281 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1282 __func__, __LINE__);
1283 return (ENOMEM);
1284 }
1285 for (i = 1; i < sc->num_reqs; i++) {
1286 cm = &sc->commands[i];
1287 cm->cm_req = sc->req_frames +
1288 i * sc->facts->IOCRequestFrameSize * 4;
1289 cm->cm_req_busaddr = sc->req_busaddr +
1290 i * sc->facts->IOCRequestFrameSize * 4;
1291 cm->cm_sense = &sc->sense_frames[i];
1292 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
1293 cm->cm_desc.Default.SMID = i;
1294 cm->cm_sc = sc;
1295 TAILQ_INIT(&cm->cm_chain_list);
1296 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
1297
1298 /* XXX Is a failure here a critical problem? */
1299 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1300 if (i <= sc->facts->HighPriorityCredit)
1301 mps_free_high_priority_command(sc, cm);
1302 else
1303 mps_free_command(sc, cm);
1304 else {
1305 panic("failed to allocate command %d\n", i);
1306 sc->num_reqs = i;
1307 break;
1308 }
1309 }
1310
1311 return (0);
1312 }
1313
1314 static int
mps_init_queues(struct mps_softc * sc)1315 mps_init_queues(struct mps_softc *sc)
1316 {
1317 int i;
1318
1319 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1320
1321 /*
1322 * According to the spec, we need to use one less reply than we
1323 * have space for on the queue. So sc->num_replies (the number we
1324 * use) should be less than sc->fqdepth (allocated size).
1325 */
1326 if (sc->num_replies >= sc->fqdepth)
1327 return (EINVAL);
1328
1329 /*
1330 * Initialize all of the free queue entries.
1331 */
1332 for (i = 0; i < sc->fqdepth; i++)
1333 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1334 sc->replyfreeindex = sc->num_replies;
1335
1336 return (0);
1337 }
1338
1339 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
1340 * Next are the global settings, if they exist. Highest are the per-unit
1341 * settings, if they exist.
1342 */
1343 static void
mps_get_tunables(struct mps_softc * sc)1344 mps_get_tunables(struct mps_softc *sc)
1345 {
1346 char tmpstr[80];
1347
1348 /* XXX default to some debugging for now */
1349 sc->mps_debug = MPS_INFO|MPS_FAULT;
1350 sc->disable_msix = 0;
1351 sc->disable_msi = 0;
1352 sc->max_chains = MPS_CHAIN_FRAMES;
1353 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD;
1354 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1355
1356 /*
1357 * Grab the global variables.
1358 */
1359 TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug);
1360 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
1361 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
1362 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
1363 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu);
1364 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time);
1365
1366 /* Grab the unit-instance variables */
1367 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
1368 device_get_unit(sc->mps_dev));
1369 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug);
1370
1371 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
1372 device_get_unit(sc->mps_dev));
1373 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1374
1375 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
1376 device_get_unit(sc->mps_dev));
1377 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1378
1379 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
1380 device_get_unit(sc->mps_dev));
1381 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1382
1383 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1384 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids",
1385 device_get_unit(sc->mps_dev));
1386 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1387
1388 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu",
1389 device_get_unit(sc->mps_dev));
1390 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1391
1392 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time",
1393 device_get_unit(sc->mps_dev));
1394 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1395 }
1396
1397 static void
mps_setup_sysctl(struct mps_softc * sc)1398 mps_setup_sysctl(struct mps_softc *sc)
1399 {
1400 struct sysctl_ctx_list *sysctl_ctx = NULL;
1401 struct sysctl_oid *sysctl_tree = NULL;
1402 char tmpstr[80], tmpstr2[80];
1403
1404 /*
1405 * Setup the sysctl variable so the user can change the debug level
1406 * on the fly.
1407 */
1408 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
1409 device_get_unit(sc->mps_dev));
1410 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
1411
1412 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
1413 if (sysctl_ctx != NULL)
1414 sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
1415
1416 if (sysctl_tree == NULL) {
1417 sysctl_ctx_init(&sc->sysctl_ctx);
1418 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1419 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
1420 CTLFLAG_RD, 0, tmpstr);
1421 if (sc->sysctl_tree == NULL)
1422 return;
1423 sysctl_ctx = &sc->sysctl_ctx;
1424 sysctl_tree = sc->sysctl_tree;
1425 }
1426
1427 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1428 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0,
1429 "mps debug level");
1430
1431 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1432 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1433 "Disable the use of MSI-X interrupts");
1434
1435 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1436 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1437 "Disable the use of MSI interrupts");
1438
1439 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1440 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version,
1441 strlen(sc->fw_version), "firmware version");
1442
1443 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1444 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION,
1445 strlen(MPS_DRIVER_VERSION), "driver version");
1446
1447 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1448 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1449 &sc->io_cmds_active, 0, "number of currently active commands");
1450
1451 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1452 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1453 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1454
1455 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1456 OID_AUTO, "chain_free", CTLFLAG_RD,
1457 &sc->chain_free, 0, "number of free chain elements");
1458
1459 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1460 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1461 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1462
1463 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1464 OID_AUTO, "max_chains", CTLFLAG_RD,
1465 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1466
1467 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1468 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1469 "enable SSU to SATA SSD/HDD at shutdown");
1470
1471 #if __FreeBSD_version >= 900030
1472 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1473 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1474 &sc->chain_alloc_fail, "chain allocation failures");
1475 #endif //FreeBSD_version >= 900030
1476
1477 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1478 OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1479 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1480 "spinup after SATA ID error");
1481 }
1482
1483 int
mps_attach(struct mps_softc * sc)1484 mps_attach(struct mps_softc *sc)
1485 {
1486 int error;
1487
1488 mps_get_tunables(sc);
1489
1490 MPS_FUNCTRACE(sc);
1491
1492 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
1493 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
1494 TAILQ_INIT(&sc->event_list);
1495 timevalclear(&sc->lastfail);
1496
1497 if ((error = mps_transition_ready(sc)) != 0) {
1498 mps_printf(sc, "%s failed to transition ready\n", __func__);
1499 return (error);
1500 }
1501
1502 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
1503 M_ZERO|M_NOWAIT);
1504 if(!sc->facts) {
1505 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
1506 __func__, __LINE__);
1507 return (ENOMEM);
1508 }
1509
1510 /*
1511 * Get IOC Facts and allocate all structures based on this information.
1512 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC
1513 * Facts. If relevant values have changed in IOC Facts, this function
1514 * will free all of the memory based on IOC Facts and reallocate that
1515 * memory. If this fails, any allocated memory should already be freed.
1516 */
1517 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) {
1518 mps_dprint(sc, MPS_FAULT, "%s IOC Facts based allocation "
1519 "failed with error %d\n", __func__, error);
1520 return (error);
1521 }
1522
1523 /* Start the periodic watchdog check on the IOC Doorbell */
1524 mps_periodic(sc);
1525
1526 /*
1527 * The portenable will kick off discovery events that will drive the
1528 * rest of the initialization process. The CAM/SAS module will
1529 * hold up the boot sequence until discovery is complete.
1530 */
1531 sc->mps_ich.ich_func = mps_startup;
1532 sc->mps_ich.ich_arg = sc;
1533 if (config_intrhook_establish(&sc->mps_ich) != 0) {
1534 mps_dprint(sc, MPS_ERROR, "Cannot establish MPS config hook\n");
1535 error = EINVAL;
1536 }
1537
1538 /*
1539 * Allow IR to shutdown gracefully when shutdown occurs.
1540 */
1541 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1542 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1543
1544 if (sc->shutdown_eh == NULL)
1545 mps_dprint(sc, MPS_ERROR, "shutdown event registration "
1546 "failed\n");
1547
1548 mps_setup_sysctl(sc);
1549
1550 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
1551
1552 return (error);
1553 }
1554
1555 /* Run through any late-start handlers. */
1556 static void
mps_startup(void * arg)1557 mps_startup(void *arg)
1558 {
1559 struct mps_softc *sc;
1560
1561 sc = (struct mps_softc *)arg;
1562
1563 mps_lock(sc);
1564 mps_unmask_intr(sc);
1565
1566 /* initialize device mapping tables */
1567 mps_base_static_config_pages(sc);
1568 mps_mapping_initialize(sc);
1569 mpssas_startup(sc);
1570 mps_unlock(sc);
1571 }
1572
1573 /* Periodic watchdog. Is called with the driver lock already held. */
1574 static void
mps_periodic(void * arg)1575 mps_periodic(void *arg)
1576 {
1577 struct mps_softc *sc;
1578 uint32_t db;
1579
1580 sc = (struct mps_softc *)arg;
1581 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
1582 return;
1583
1584 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
1585 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1586 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1587 mps_reinit(sc);
1588 }
1589
1590 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
1591 }
1592
1593 static void
mps_log_evt_handler(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * event)1594 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
1595 MPI2_EVENT_NOTIFICATION_REPLY *event)
1596 {
1597 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1598
1599 mps_print_event(sc, event);
1600
1601 switch (event->Event) {
1602 case MPI2_EVENT_LOG_DATA:
1603 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1604 if (sc->mps_debug & MPS_EVENT)
1605 hexdump(event->EventData, event->EventDataLength, NULL, 0);
1606 break;
1607 case MPI2_EVENT_LOG_ENTRY_ADDED:
1608 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1609 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1610 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1611 entry->LogSequence);
1612 break;
1613 default:
1614 break;
1615 }
1616 return;
1617 }
1618
1619 static int
mps_attach_log(struct mps_softc * sc)1620 mps_attach_log(struct mps_softc *sc)
1621 {
1622 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1623
1624 bzero(events, 16);
1625 setbit(events, MPI2_EVENT_LOG_DATA);
1626 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1627
1628 mps_register_events(sc, events, mps_log_evt_handler, NULL,
1629 &sc->mps_log_eh);
1630
1631 return (0);
1632 }
1633
1634 static int
mps_detach_log(struct mps_softc * sc)1635 mps_detach_log(struct mps_softc *sc)
1636 {
1637
1638 if (sc->mps_log_eh != NULL)
1639 mps_deregister_events(sc, sc->mps_log_eh);
1640 return (0);
1641 }
1642
1643 /*
1644 * Free all of the driver resources and detach submodules. Should be called
1645 * without the lock held.
1646 */
1647 int
mps_free(struct mps_softc * sc)1648 mps_free(struct mps_softc *sc)
1649 {
1650 int error;
1651
1652 /* Turn off the watchdog */
1653 mps_lock(sc);
1654 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
1655 mps_unlock(sc);
1656 /* Lock must not be held for this */
1657 callout_drain(&sc->periodic);
1658
1659 if (((error = mps_detach_log(sc)) != 0) ||
1660 ((error = mps_detach_sas(sc)) != 0))
1661 return (error);
1662
1663 mps_detach_user(sc);
1664
1665 /* Put the IOC back in the READY state. */
1666 mps_lock(sc);
1667 if ((error = mps_transition_ready(sc)) != 0) {
1668 mps_unlock(sc);
1669 return (error);
1670 }
1671 mps_unlock(sc);
1672
1673 if (sc->facts != NULL)
1674 free(sc->facts, M_MPT2);
1675
1676 /*
1677 * Free all buffers that are based on IOC Facts. A Diag Reset may need
1678 * to free these buffers too.
1679 */
1680 mps_iocfacts_free(sc);
1681
1682 if (sc->sysctl_tree != NULL)
1683 sysctl_ctx_free(&sc->sysctl_ctx);
1684
1685 /* Deregister the shutdown function */
1686 if (sc->shutdown_eh != NULL)
1687 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1688
1689 mtx_destroy(&sc->mps_mtx);
1690
1691 return (0);
1692 }
1693
1694 static __inline void
mps_complete_command(struct mps_softc * sc,struct mps_command * cm)1695 mps_complete_command(struct mps_softc *sc, struct mps_command *cm)
1696 {
1697 MPS_FUNCTRACE(sc);
1698
1699 if (cm == NULL) {
1700 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n");
1701 return;
1702 }
1703
1704 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
1705 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
1706
1707 if (cm->cm_complete != NULL) {
1708 mps_dprint(sc, MPS_TRACE,
1709 "%s cm %p calling cm_complete %p data %p reply %p\n",
1710 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1711 cm->cm_reply);
1712 cm->cm_complete(sc, cm);
1713 }
1714
1715 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
1716 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm);
1717 wakeup(cm);
1718 }
1719
1720 if (cm->cm_sc->io_cmds_active != 0) {
1721 cm->cm_sc->io_cmds_active--;
1722 } else {
1723 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is "
1724 "out of sync - resynching to 0\n");
1725 }
1726 }
1727
1728
1729 static void
mps_sas_log_info(struct mps_softc * sc,u32 log_info)1730 mps_sas_log_info(struct mps_softc *sc , u32 log_info)
1731 {
1732 union loginfo_type {
1733 u32 loginfo;
1734 struct {
1735 u32 subcode:16;
1736 u32 code:8;
1737 u32 originator:4;
1738 u32 bus_type:4;
1739 } dw;
1740 };
1741 union loginfo_type sas_loginfo;
1742 char *originator_str = NULL;
1743
1744 sas_loginfo.loginfo = log_info;
1745 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1746 return;
1747
1748 /* each nexus loss loginfo */
1749 if (log_info == 0x31170000)
1750 return;
1751
1752 /* eat the loginfos associated with task aborts */
1753 if ((log_info == 30050000 || log_info ==
1754 0x31140000 || log_info == 0x31130000))
1755 return;
1756
1757 switch (sas_loginfo.dw.originator) {
1758 case 0:
1759 originator_str = "IOP";
1760 break;
1761 case 1:
1762 originator_str = "PL";
1763 break;
1764 case 2:
1765 originator_str = "IR";
1766 break;
1767 }
1768
1769 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), "
1770 "code(0x%02x), sub_code(0x%04x)\n", log_info,
1771 originator_str, sas_loginfo.dw.code,
1772 sas_loginfo.dw.subcode);
1773 }
1774
1775 static void
mps_display_reply_info(struct mps_softc * sc,uint8_t * reply)1776 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply)
1777 {
1778 MPI2DefaultReply_t *mpi_reply;
1779 u16 sc_status;
1780
1781 mpi_reply = (MPI2DefaultReply_t*)reply;
1782 sc_status = le16toh(mpi_reply->IOCStatus);
1783 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1784 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1785 }
1786 void
mps_intr(void * data)1787 mps_intr(void *data)
1788 {
1789 struct mps_softc *sc;
1790 uint32_t status;
1791
1792 sc = (struct mps_softc *)data;
1793 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1794
1795 /*
1796 * Check interrupt status register to flush the bus. This is
1797 * needed for both INTx interrupts and driver-driven polling
1798 */
1799 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1800 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1801 return;
1802
1803 mps_lock(sc);
1804 mps_intr_locked(data);
1805 mps_unlock(sc);
1806 return;
1807 }
1808
1809 /*
1810 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1811 * chip. Hopefully this theory is correct.
1812 */
1813 void
mps_intr_msi(void * data)1814 mps_intr_msi(void *data)
1815 {
1816 struct mps_softc *sc;
1817
1818 sc = (struct mps_softc *)data;
1819 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1820 mps_lock(sc);
1821 mps_intr_locked(data);
1822 mps_unlock(sc);
1823 return;
1824 }
1825
1826 /*
1827 * The locking is overly broad and simplistic, but easy to deal with for now.
1828 */
1829 void
mps_intr_locked(void * data)1830 mps_intr_locked(void *data)
1831 {
1832 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1833 struct mps_softc *sc;
1834 struct mps_command *cm = NULL;
1835 uint8_t flags;
1836 u_int pq;
1837 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1838 mps_fw_diagnostic_buffer_t *pBuffer;
1839
1840 sc = (struct mps_softc *)data;
1841
1842 pq = sc->replypostindex;
1843 mps_dprint(sc, MPS_TRACE,
1844 "%s sc %p starting with replypostindex %u\n",
1845 __func__, sc, sc->replypostindex);
1846
1847 for ( ;; ) {
1848 cm = NULL;
1849 desc = &sc->post_queue[sc->replypostindex];
1850 flags = desc->Default.ReplyFlags &
1851 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1852 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1853 || (le32toh(desc->Words.High) == 0xffffffff))
1854 break;
1855
1856 /* increment the replypostindex now, so that event handlers
1857 * and cm completion handlers which decide to do a diag
1858 * reset can zero it without it getting incremented again
1859 * afterwards, and we break out of this loop on the next
1860 * iteration since the reply post queue has been cleared to
1861 * 0xFF and all descriptors look unused (which they are).
1862 */
1863 if (++sc->replypostindex >= sc->pqdepth)
1864 sc->replypostindex = 0;
1865
1866 switch (flags) {
1867 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1868 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1869 cm->cm_reply = NULL;
1870 break;
1871 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1872 {
1873 uint32_t baddr;
1874 uint8_t *reply;
1875
1876 /*
1877 * Re-compose the reply address from the address
1878 * sent back from the chip. The ReplyFrameAddress
1879 * is the lower 32 bits of the physical address of
1880 * particular reply frame. Convert that address to
1881 * host format, and then use that to provide the
1882 * offset against the virtual address base
1883 * (sc->reply_frames).
1884 */
1885 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1886 reply = sc->reply_frames +
1887 (baddr - ((uint32_t)sc->reply_busaddr));
1888 /*
1889 * Make sure the reply we got back is in a valid
1890 * range. If not, go ahead and panic here, since
1891 * we'll probably panic as soon as we deference the
1892 * reply pointer anyway.
1893 */
1894 if ((reply < sc->reply_frames)
1895 || (reply > (sc->reply_frames +
1896 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1897 printf("%s: WARNING: reply %p out of range!\n",
1898 __func__, reply);
1899 printf("%s: reply_frames %p, fqdepth %d, "
1900 "frame size %d\n", __func__,
1901 sc->reply_frames, sc->fqdepth,
1902 sc->facts->ReplyFrameSize * 4);
1903 printf("%s: baddr %#x,\n", __func__, baddr);
1904 /* LSI-TODO. See Linux Code. Need Gracefull exit*/
1905 panic("Reply address out of range");
1906 }
1907 if (le16toh(desc->AddressReply.SMID) == 0) {
1908 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1909 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1910 /*
1911 * If SMID is 0 for Diag Buffer Post,
1912 * this implies that the reply is due to
1913 * a release function with a status that
1914 * the buffer has been released. Set
1915 * the buffer flags accordingly.
1916 */
1917 rel_rep =
1918 (MPI2_DIAG_RELEASE_REPLY *)reply;
1919 if (le16toh(rel_rep->IOCStatus) ==
1920 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1921 {
1922 pBuffer =
1923 &sc->fw_diag_buffer_list[
1924 rel_rep->BufferType];
1925 pBuffer->valid_data = TRUE;
1926 pBuffer->owned_by_firmware =
1927 FALSE;
1928 pBuffer->immediate = FALSE;
1929 }
1930 } else
1931 mps_dispatch_event(sc, baddr,
1932 (MPI2_EVENT_NOTIFICATION_REPLY *)
1933 reply);
1934 } else {
1935 cm = &sc->commands[le16toh(desc->AddressReply.SMID)];
1936 cm->cm_reply = reply;
1937 cm->cm_reply_data =
1938 le32toh(desc->AddressReply.ReplyFrameAddress);
1939 }
1940 break;
1941 }
1942 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1943 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1944 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1945 default:
1946 /* Unhandled */
1947 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n",
1948 desc->Default.ReplyFlags);
1949 cm = NULL;
1950 break;
1951 }
1952
1953
1954 if (cm != NULL) {
1955 // Print Error reply frame
1956 if (cm->cm_reply)
1957 mps_display_reply_info(sc,cm->cm_reply);
1958 mps_complete_command(sc, cm);
1959 }
1960
1961 desc->Words.Low = 0xffffffff;
1962 desc->Words.High = 0xffffffff;
1963 }
1964
1965 if (pq != sc->replypostindex) {
1966 mps_dprint(sc, MPS_TRACE,
1967 "%s sc %p writing postindex %d\n",
1968 __func__, sc, sc->replypostindex);
1969 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex);
1970 }
1971
1972 return;
1973 }
1974
1975 static void
mps_dispatch_event(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * reply)1976 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
1977 MPI2_EVENT_NOTIFICATION_REPLY *reply)
1978 {
1979 struct mps_event_handle *eh;
1980 int event, handled = 0;
1981
1982 event = le16toh(reply->Event);
1983 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1984 if (isset(eh->mask, event)) {
1985 eh->callback(sc, data, reply);
1986 handled++;
1987 }
1988 }
1989
1990 if (handled == 0)
1991 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event));
1992
1993 /*
1994 * This is the only place that the event/reply should be freed.
1995 * Anything wanting to hold onto the event data should have
1996 * already copied it into their own storage.
1997 */
1998 mps_free_reply(sc, data);
1999 }
2000
2001 static void
mps_reregister_events_complete(struct mps_softc * sc,struct mps_command * cm)2002 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
2003 {
2004 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2005
2006 if (cm->cm_reply)
2007 mps_print_event(sc,
2008 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2009
2010 mps_free_command(sc, cm);
2011
2012 /* next, send a port enable */
2013 mpssas_startup(sc);
2014 }
2015
2016 /*
2017 * For both register_events and update_events, the caller supplies a bitmap
2018 * of events that it _wants_. These functions then turn that into a bitmask
2019 * suitable for the controller.
2020 */
2021 int
mps_register_events(struct mps_softc * sc,u32 * mask,mps_evt_callback_t * cb,void * data,struct mps_event_handle ** handle)2022 mps_register_events(struct mps_softc *sc, u32 *mask,
2023 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
2024 {
2025 struct mps_event_handle *eh;
2026 int error = 0;
2027
2028 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
2029 if(!eh) {
2030 device_printf(sc->mps_dev, "Cannot allocate memory %s %d\n",
2031 __func__, __LINE__);
2032 return (ENOMEM);
2033 }
2034 eh->callback = cb;
2035 eh->data = data;
2036 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2037 if (mask != NULL)
2038 error = mps_update_events(sc, eh, mask);
2039 *handle = eh;
2040
2041 return (error);
2042 }
2043
2044 int
mps_update_events(struct mps_softc * sc,struct mps_event_handle * handle,u32 * mask)2045 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
2046 u32 *mask)
2047 {
2048 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2049 MPI2_EVENT_NOTIFICATION_REPLY *reply;
2050 struct mps_command *cm;
2051 int error, i;
2052
2053 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2054
2055 if ((mask != NULL) && (handle != NULL))
2056 bcopy(mask, &handle->mask[0], sizeof(u32) *
2057 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2058
2059 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2060 sc->event_mask[i] = -1;
2061
2062 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2063 sc->event_mask[i] &= ~handle->mask[i];
2064
2065
2066 if ((cm = mps_alloc_command(sc)) == NULL)
2067 return (EBUSY);
2068 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2069 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2070 evtreq->MsgFlags = 0;
2071 evtreq->SASBroadcastPrimitiveMasks = 0;
2072 #ifdef MPS_DEBUG_ALL_EVENTS
2073 {
2074 u_char fullmask[16];
2075 memset(fullmask, 0x00, 16);
2076 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2077 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2078 }
2079 #else
2080 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2081 evtreq->EventMasks[i] =
2082 htole32(sc->event_mask[i]);
2083 #endif
2084 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2085 cm->cm_data = NULL;
2086
2087 error = mps_request_polled(sc, cm);
2088 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2089 if ((reply == NULL) ||
2090 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2091 error = ENXIO;
2092 mps_print_event(sc, reply);
2093 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
2094
2095 mps_free_command(sc, cm);
2096 return (error);
2097 }
2098
2099 static int
mps_reregister_events(struct mps_softc * sc)2100 mps_reregister_events(struct mps_softc *sc)
2101 {
2102 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2103 struct mps_command *cm;
2104 struct mps_event_handle *eh;
2105 int error, i;
2106
2107 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2108
2109 /* first, reregister events */
2110
2111 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2112 sc->event_mask[i] = -1;
2113
2114 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2115 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2116 sc->event_mask[i] &= ~eh->mask[i];
2117 }
2118
2119 if ((cm = mps_alloc_command(sc)) == NULL)
2120 return (EBUSY);
2121 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2122 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2123 evtreq->MsgFlags = 0;
2124 evtreq->SASBroadcastPrimitiveMasks = 0;
2125 #ifdef MPS_DEBUG_ALL_EVENTS
2126 {
2127 u_char fullmask[16];
2128 memset(fullmask, 0x00, 16);
2129 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2130 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2131 }
2132 #else
2133 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2134 evtreq->EventMasks[i] =
2135 htole32(sc->event_mask[i]);
2136 #endif
2137 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2138 cm->cm_data = NULL;
2139 cm->cm_complete = mps_reregister_events_complete;
2140
2141 error = mps_map_command(sc, cm);
2142
2143 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__,
2144 error);
2145 return (error);
2146 }
2147
2148 void
mps_deregister_events(struct mps_softc * sc,struct mps_event_handle * handle)2149 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
2150 {
2151
2152 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2153 free(handle, M_MPT2);
2154 }
2155
2156 /*
2157 * Add a chain element as the next SGE for the specified command.
2158 * Reset cm_sge and cm_sgesize to indicate all the available space.
2159 */
2160 static int
mps_add_chain(struct mps_command * cm)2161 mps_add_chain(struct mps_command *cm)
2162 {
2163 MPI2_SGE_CHAIN32 *sgc;
2164 struct mps_chain *chain;
2165 int space;
2166
2167 if (cm->cm_sglsize < MPS_SGC_SIZE)
2168 panic("MPS: Need SGE Error Code\n");
2169
2170 chain = mps_alloc_chain(cm->cm_sc);
2171 if (chain == NULL)
2172 return (ENOBUFS);
2173
2174 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
2175
2176 /*
2177 * Note: a double-linked list is used to make it easier to
2178 * walk for debugging.
2179 */
2180 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2181
2182 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
2183 sgc->Length = htole16(space);
2184 sgc->NextChainOffset = 0;
2185 /* TODO Looks like bug in Setting sgc->Flags.
2186 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2187 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT
2188 * This is fine.. because we are not using simple element. In case of
2189 * MPI2_SGE_CHAIN32, we have seperate Length and Flags feild.
2190 */
2191 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
2192 sgc->Address = htole32(chain->chain_busaddr);
2193
2194 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
2195 cm->cm_sglsize = space;
2196 return (0);
2197 }
2198
2199 /*
2200 * Add one scatter-gather element (chain, simple, transaction context)
2201 * to the scatter-gather list for a command. Maintain cm_sglsize and
2202 * cm_sge as the remaining size and pointer to the next SGE to fill
2203 * in, respectively.
2204 */
2205 int
mps_push_sge(struct mps_command * cm,void * sgep,size_t len,int segsleft)2206 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
2207 {
2208 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
2209 MPI2_SGE_SIMPLE64 *sge = sgep;
2210 int error, type;
2211 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2212
2213 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
2214
2215 #ifdef INVARIANTS
2216 switch (type) {
2217 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
2218 if (len != tc->DetailsLength + 4)
2219 panic("TC %p length %u or %zu?", tc,
2220 tc->DetailsLength + 4, len);
2221 }
2222 break;
2223 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
2224 /* Driver only uses 32-bit chain elements */
2225 if (len != MPS_SGC_SIZE)
2226 panic("CHAIN %p length %u or %zu?", sgep,
2227 MPS_SGC_SIZE, len);
2228 break;
2229 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
2230 /* Driver only uses 64-bit SGE simple elements */
2231 if (len != MPS_SGE64_SIZE)
2232 panic("SGE simple %p length %u or %zu?", sge,
2233 MPS_SGE64_SIZE, len);
2234 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) &
2235 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
2236 panic("SGE simple %p not marked 64-bit?", sge);
2237
2238 break;
2239 default:
2240 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
2241 }
2242 #endif
2243
2244 /*
2245 * case 1: 1 more segment, enough room for it
2246 * case 2: 2 more segments, enough room for both
2247 * case 3: >=2 more segments, only enough room for 1 and a chain
2248 * case 4: >=1 more segment, enough room for only a chain
2249 * case 5: >=1 more segment, no room for anything (error)
2250 */
2251
2252 /*
2253 * There should be room for at least a chain element, or this
2254 * code is buggy. Case (5).
2255 */
2256 if (cm->cm_sglsize < MPS_SGC_SIZE)
2257 panic("MPS: Need SGE Error Code\n");
2258
2259 if (segsleft >= 2 &&
2260 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
2261 /*
2262 * There are 2 or more segments left to add, and only
2263 * enough room for 1 and a chain. Case (3).
2264 *
2265 * Mark as last element in this chain if necessary.
2266 */
2267 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2268 sge->FlagsLength |= htole32(
2269 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
2270 }
2271
2272 /*
2273 * Add the item then a chain. Do the chain now,
2274 * rather than on the next iteration, to simplify
2275 * understanding the code.
2276 */
2277 cm->cm_sglsize -= len;
2278 bcopy(sgep, cm->cm_sge, len);
2279 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2280 return (mps_add_chain(cm));
2281 }
2282
2283 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
2284 /*
2285 * 1 or more segment, enough room for only a chain.
2286 * Hope the previous element wasn't a Simple entry
2287 * that needed to be marked with
2288 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
2289 */
2290 if ((error = mps_add_chain(cm)) != 0)
2291 return (error);
2292 }
2293
2294 #ifdef INVARIANTS
2295 /* Case 1: 1 more segment, enough room for it. */
2296 if (segsleft == 1 && cm->cm_sglsize < len)
2297 panic("1 seg left and no room? %u versus %zu",
2298 cm->cm_sglsize, len);
2299
2300 /* Case 2: 2 more segments, enough room for both */
2301 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
2302 panic("2 segs left and no room? %u versus %zu",
2303 cm->cm_sglsize, len);
2304 #endif
2305
2306 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2307 /*
2308 * If this is a bi-directional request, need to account for that
2309 * here. Save the pre-filled sge values. These will be used
2310 * either for the 2nd SGL or for a single direction SGL. If
2311 * cm_out_len is non-zero, this is a bi-directional request, so
2312 * fill in the OUT SGL first, then the IN SGL, otherwise just
2313 * fill in the IN SGL. Note that at this time, when filling in
2314 * 2 SGL's for a bi-directional request, they both use the same
2315 * DMA buffer (same cm command).
2316 */
2317 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF;
2318 saved_address_low = sge->Address.Low;
2319 saved_address_high = sge->Address.High;
2320 if (cm->cm_out_len) {
2321 sge->FlagsLength = htole32(cm->cm_out_len |
2322 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2323 MPI2_SGE_FLAGS_END_OF_BUFFER |
2324 MPI2_SGE_FLAGS_HOST_TO_IOC |
2325 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2326 MPI2_SGE_FLAGS_SHIFT));
2327 cm->cm_sglsize -= len;
2328 bcopy(sgep, cm->cm_sge, len);
2329 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
2330 + len);
2331 }
2332 saved_buf_len |=
2333 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2334 MPI2_SGE_FLAGS_END_OF_BUFFER |
2335 MPI2_SGE_FLAGS_LAST_ELEMENT |
2336 MPI2_SGE_FLAGS_END_OF_LIST |
2337 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2338 MPI2_SGE_FLAGS_SHIFT);
2339 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
2340 saved_buf_len |=
2341 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2342 MPI2_SGE_FLAGS_SHIFT);
2343 } else {
2344 saved_buf_len |=
2345 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2346 MPI2_SGE_FLAGS_SHIFT);
2347 }
2348 sge->FlagsLength = htole32(saved_buf_len);
2349 sge->Address.Low = saved_address_low;
2350 sge->Address.High = saved_address_high;
2351 }
2352
2353 cm->cm_sglsize -= len;
2354 bcopy(sgep, cm->cm_sge, len);
2355 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2356 return (0);
2357 }
2358
2359 /*
2360 * Add one dma segment to the scatter-gather list for a command.
2361 */
2362 int
mps_add_dmaseg(struct mps_command * cm,vm_paddr_t pa,size_t len,u_int flags,int segsleft)2363 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2364 int segsleft)
2365 {
2366 MPI2_SGE_SIMPLE64 sge;
2367
2368 /*
2369 * This driver always uses 64-bit address elements for simplicity.
2370 */
2371 bzero(&sge, sizeof(sge));
2372 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2373 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2374 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT));
2375 mps_from_u64(pa, &sge.Address);
2376
2377 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2378 }
2379
2380 static void
mps_data_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)2381 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2382 {
2383 struct mps_softc *sc;
2384 struct mps_command *cm;
2385 u_int i, dir, sflags;
2386
2387 cm = (struct mps_command *)arg;
2388 sc = cm->cm_sc;
2389
2390 /*
2391 * In this case, just print out a warning and let the chip tell the
2392 * user they did the wrong thing.
2393 */
2394 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2395 mps_dprint(sc, MPS_ERROR,
2396 "%s: warning: busdma returned %d segments, "
2397 "more than the %d allowed\n", __func__, nsegs,
2398 cm->cm_max_segs);
2399 }
2400
2401 /*
2402 * Set up DMA direction flags. Bi-directional requests are also handled
2403 * here. In that case, both direction flags will be set.
2404 */
2405 sflags = 0;
2406 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2407 /*
2408 * We have to add a special case for SMP passthrough, there
2409 * is no easy way to generically handle it. The first
2410 * S/G element is used for the command (therefore the
2411 * direction bit needs to be set). The second one is used
2412 * for the reply. We'll leave it to the caller to make
2413 * sure we only have two buffers.
2414 */
2415 /*
2416 * Even though the busdma man page says it doesn't make
2417 * sense to have both direction flags, it does in this case.
2418 * We have one s/g element being accessed in each direction.
2419 */
2420 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2421
2422 /*
2423 * Set the direction flag on the first buffer in the SMP
2424 * passthrough request. We'll clear it for the second one.
2425 */
2426 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2427 MPI2_SGE_FLAGS_END_OF_BUFFER;
2428 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2429 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2430 dir = BUS_DMASYNC_PREWRITE;
2431 } else
2432 dir = BUS_DMASYNC_PREREAD;
2433
2434 for (i = 0; i < nsegs; i++) {
2435 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
2436 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2437 }
2438 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2439 sflags, nsegs - i);
2440 if (error != 0) {
2441 /* Resource shortage, roll back! */
2442 if (ratecheck(&sc->lastfail, &mps_chainfail_interval))
2443 mps_dprint(sc, MPS_INFO, "Out of chain frames, "
2444 "consider increasing hw.mps.max_chains.\n");
2445 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
2446 mps_complete_command(sc, cm);
2447 return;
2448 }
2449 }
2450
2451 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2452 mps_enqueue_request(sc, cm);
2453
2454 return;
2455 }
2456
2457 static void
mps_data_cb2(void * arg,bus_dma_segment_t * segs,int nsegs,bus_size_t mapsize,int error)2458 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2459 int error)
2460 {
2461 mps_data_cb(arg, segs, nsegs, error);
2462 }
2463
2464 /*
2465 * This is the routine to enqueue commands ansynchronously.
2466 * Note that the only error path here is from bus_dmamap_load(), which can
2467 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2468 * assumed that if you have a command in-hand, then you have enough credits
2469 * to use it.
2470 */
2471 int
mps_map_command(struct mps_softc * sc,struct mps_command * cm)2472 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
2473 {
2474 int error = 0;
2475
2476 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
2477 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2478 &cm->cm_uio, mps_data_cb2, cm, 0);
2479 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) {
2480 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2481 cm->cm_data, mps_data_cb, cm, 0);
2482 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2483 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2484 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
2485 } else {
2486 /* Add a zero-length element as needed */
2487 if (cm->cm_sge != NULL)
2488 mps_add_dmaseg(cm, 0, 0, 0, 1);
2489 mps_enqueue_request(sc, cm);
2490 }
2491
2492 return (error);
2493 }
2494
2495 /*
2496 * This is the routine to enqueue commands synchronously. An error of
2497 * EINPROGRESS from mps_map_command() is ignored since the command will
2498 * be executed and enqueued automatically. Other errors come from msleep().
2499 */
2500 int
mps_wait_command(struct mps_softc * sc,struct mps_command * cm,int timeout,int sleep_flag)2501 mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout,
2502 int sleep_flag)
2503 {
2504 int error, rc;
2505 struct timeval cur_time, start_time;
2506
2507 if (sc->mps_flags & MPS_FLAGS_DIAGRESET)
2508 return EBUSY;
2509
2510 cm->cm_complete = NULL;
2511 cm->cm_flags |= (MPS_CM_FLAGS_WAKEUP + MPS_CM_FLAGS_POLLED);
2512 error = mps_map_command(sc, cm);
2513 if ((error != 0) && (error != EINPROGRESS))
2514 return (error);
2515
2516 // Check for context and wait for 50 mSec at a time until time has
2517 // expired or the command has finished. If msleep can't be used, need
2518 // to poll.
2519 if (curthread->td_no_sleeping != 0)
2520 sleep_flag = NO_SLEEP;
2521 getmicrotime(&start_time);
2522 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) {
2523 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
2524 } else {
2525 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
2526 mps_intr_locked(sc);
2527 if (sleep_flag == CAN_SLEEP)
2528 pause("mpswait", hz/20);
2529 else
2530 DELAY(50000);
2531
2532 getmicrotime(&cur_time);
2533 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2534 error = EWOULDBLOCK;
2535 break;
2536 }
2537 }
2538 }
2539
2540 if (error == EWOULDBLOCK) {
2541 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s\n", __func__);
2542 rc = mps_reinit(sc);
2543 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2544 "failed");
2545 error = ETIMEDOUT;
2546 }
2547 return (error);
2548 }
2549
2550 /*
2551 * This is the routine to enqueue a command synchonously and poll for
2552 * completion. Its use should be rare.
2553 */
2554 int
mps_request_polled(struct mps_softc * sc,struct mps_command * cm)2555 mps_request_polled(struct mps_softc *sc, struct mps_command *cm)
2556 {
2557 int error, timeout = 0, rc;
2558 struct timeval cur_time, start_time;
2559
2560 error = 0;
2561
2562 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
2563 cm->cm_complete = NULL;
2564 mps_map_command(sc, cm);
2565
2566 getmicrotime(&start_time);
2567 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
2568 mps_intr_locked(sc);
2569
2570 if (mtx_owned(&sc->mps_mtx))
2571 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
2572 "mpspoll", hz/20);
2573 else
2574 pause("mpsdiag", hz/20);
2575
2576 /*
2577 * Check for real-time timeout and fail if more than 60 seconds.
2578 */
2579 getmicrotime(&cur_time);
2580 timeout = cur_time.tv_sec - start_time.tv_sec;
2581 if (timeout > 60) {
2582 mps_dprint(sc, MPS_FAULT, "polling failed\n");
2583 error = ETIMEDOUT;
2584 break;
2585 }
2586 }
2587
2588 if (error) {
2589 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s\n", __func__);
2590 rc = mps_reinit(sc);
2591 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2592 "failed");
2593 }
2594
2595 return (error);
2596 }
2597
2598 /*
2599 * The MPT driver had a verbose interface for config pages. In this driver,
2600 * reduce it to much simplier terms, similar to the Linux driver.
2601 */
2602 int
mps_read_config_page(struct mps_softc * sc,struct mps_config_params * params)2603 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
2604 {
2605 MPI2_CONFIG_REQUEST *req;
2606 struct mps_command *cm;
2607 int error;
2608
2609 if (sc->mps_flags & MPS_FLAGS_BUSY) {
2610 return (EBUSY);
2611 }
2612
2613 cm = mps_alloc_command(sc);
2614 if (cm == NULL) {
2615 return (EBUSY);
2616 }
2617
2618 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2619 req->Function = MPI2_FUNCTION_CONFIG;
2620 req->Action = params->action;
2621 req->SGLFlags = 0;
2622 req->ChainOffset = 0;
2623 req->PageAddress = params->page_address;
2624 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2625 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2626
2627 hdr = ¶ms->hdr.Ext;
2628 req->ExtPageType = hdr->ExtPageType;
2629 req->ExtPageLength = hdr->ExtPageLength;
2630 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2631 req->Header.PageLength = 0; /* Must be set to zero */
2632 req->Header.PageNumber = hdr->PageNumber;
2633 req->Header.PageVersion = hdr->PageVersion;
2634 } else {
2635 MPI2_CONFIG_PAGE_HEADER *hdr;
2636
2637 hdr = ¶ms->hdr.Struct;
2638 req->Header.PageType = hdr->PageType;
2639 req->Header.PageNumber = hdr->PageNumber;
2640 req->Header.PageLength = hdr->PageLength;
2641 req->Header.PageVersion = hdr->PageVersion;
2642 }
2643
2644 cm->cm_data = params->buffer;
2645 cm->cm_length = params->length;
2646 if (cm->cm_data != NULL) {
2647 cm->cm_sge = &req->PageBufferSGE;
2648 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2649 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
2650 } else
2651 cm->cm_sge = NULL;
2652 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2653
2654 cm->cm_complete_data = params;
2655 if (params->callback != NULL) {
2656 cm->cm_complete = mps_config_complete;
2657 return (mps_map_command(sc, cm));
2658 } else {
2659 error = mps_wait_command(sc, cm, 0, CAN_SLEEP);
2660 if (error) {
2661 mps_dprint(sc, MPS_FAULT,
2662 "Error %d reading config page\n", error);
2663 mps_free_command(sc, cm);
2664 return (error);
2665 }
2666 mps_config_complete(sc, cm);
2667 }
2668
2669 return (0);
2670 }
2671
2672 int
mps_write_config_page(struct mps_softc * sc,struct mps_config_params * params)2673 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
2674 {
2675 return (EINVAL);
2676 }
2677
2678 static void
mps_config_complete(struct mps_softc * sc,struct mps_command * cm)2679 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
2680 {
2681 MPI2_CONFIG_REPLY *reply;
2682 struct mps_config_params *params;
2683
2684 MPS_FUNCTRACE(sc);
2685 params = cm->cm_complete_data;
2686
2687 if (cm->cm_data != NULL) {
2688 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2689 BUS_DMASYNC_POSTREAD);
2690 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2691 }
2692
2693 /*
2694 * XXX KDM need to do more error recovery? This results in the
2695 * device in question not getting probed.
2696 */
2697 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
2698 params->status = MPI2_IOCSTATUS_BUSY;
2699 goto done;
2700 }
2701
2702 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2703 if (reply == NULL) {
2704 params->status = MPI2_IOCSTATUS_BUSY;
2705 goto done;
2706 }
2707 params->status = reply->IOCStatus;
2708 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2709 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2710 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2711 params->hdr.Ext.PageType = reply->Header.PageType;
2712 params->hdr.Ext.PageNumber = reply->Header.PageNumber;
2713 params->hdr.Ext.PageVersion = reply->Header.PageVersion;
2714 } else {
2715 params->hdr.Struct.PageType = reply->Header.PageType;
2716 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2717 params->hdr.Struct.PageLength = reply->Header.PageLength;
2718 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2719 }
2720
2721 done:
2722 mps_free_command(sc, cm);
2723 if (params->callback != NULL)
2724 params->callback(sc, params);
2725
2726 return;
2727 }
2728