1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2009 Yahoo! Inc.
5 * Copyright (c) 2011-2015 LSI Corp.
6 * Copyright (c) 2013-2015 Avago Technologies
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31 *
32 * $FreeBSD: stable/12/sys/dev/mps/mps.c 373239 2023-10-05 20:37:12Z asomers $
33 */
34
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD: stable/12/sys/dev/mps/mps.c 373239 2023-10-05 20:37:12Z asomers $");
37
38 /* Communications core for Avago Technologies (LSI) MPT2 */
39
40 /* TODO Move headers to mpsvar */
41 #include <sys/types.h>
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/selinfo.h>
46 #include <sys/lock.h>
47 #include <sys/mutex.h>
48 #include <sys/module.h>
49 #include <sys/bus.h>
50 #include <sys/conf.h>
51 #include <sys/bio.h>
52 #include <sys/malloc.h>
53 #include <sys/uio.h>
54 #include <sys/sysctl.h>
55 #include <sys/smp.h>
56 #include <sys/queue.h>
57 #include <sys/kthread.h>
58 #include <sys/taskqueue.h>
59 #include <sys/endian.h>
60 #include <sys/eventhandler.h>
61 #include <sys/sbuf.h>
62 #include <sys/priv.h>
63
64 #include <machine/bus.h>
65 #include <machine/resource.h>
66 #include <sys/rman.h>
67 #include <sys/proc.h>
68
69 #include <dev/pci/pcivar.h>
70
71 #include <cam/cam.h>
72 #include <cam/scsi/scsi_all.h>
73
74 #include <dev/mps/mpi/mpi2_type.h>
75 #include <dev/mps/mpi/mpi2.h>
76 #include <dev/mps/mpi/mpi2_ioc.h>
77 #include <dev/mps/mpi/mpi2_sas.h>
78 #include <dev/mps/mpi/mpi2_cnfg.h>
79 #include <dev/mps/mpi/mpi2_init.h>
80 #include <dev/mps/mpi/mpi2_tool.h>
81 #include <dev/mps/mps_ioctl.h>
82 #include <dev/mps/mpsvar.h>
83 #include <dev/mps/mps_table.h>
84
85 static int mps_diag_reset(struct mps_softc *sc, int sleep_flag);
86 static int mps_init_queues(struct mps_softc *sc);
87 static void mps_resize_queues(struct mps_softc *sc);
88 static int mps_message_unit_reset(struct mps_softc *sc, int sleep_flag);
89 static int mps_transition_operational(struct mps_softc *sc);
90 static int mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching);
91 static void mps_iocfacts_free(struct mps_softc *sc);
92 static void mps_startup(void *arg);
93 static int mps_send_iocinit(struct mps_softc *sc);
94 static int mps_alloc_queues(struct mps_softc *sc);
95 static int mps_alloc_hw_queues(struct mps_softc *sc);
96 static int mps_alloc_replies(struct mps_softc *sc);
97 static int mps_alloc_requests(struct mps_softc *sc);
98 static int mps_attach_log(struct mps_softc *sc);
99 static __inline void mps_complete_command(struct mps_softc *sc,
100 struct mps_command *cm);
101 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
102 MPI2_EVENT_NOTIFICATION_REPLY *reply);
103 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
104 static void mps_periodic(void *);
105 static int mps_reregister_events(struct mps_softc *sc);
106 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
107 static int mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
108 static int mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag);
109 static int mps_debug_sysctl(SYSCTL_HANDLER_ARGS);
110 static int mps_dump_reqs(SYSCTL_HANDLER_ARGS);
111 static void mps_parse_debug(struct mps_softc *sc, char *list);
112
113 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
114
115 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
116 MALLOC_DECLARE(M_MPSUSER);
117
118 /*
119 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
120 * any state and back to its initialization state machine.
121 */
122 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
123
124 /* Added this union to smoothly convert le64toh cm->cm_desc.Words.
125 * Compiler only support unint64_t to be passed as argument.
126 * Otherwise it will throw below error
127 * "aggregate value used where an integer was expected"
128 */
129
130 typedef union _reply_descriptor {
131 u64 word;
132 struct {
133 u32 low;
134 u32 high;
135 } u;
136 }reply_descriptor,address_descriptor;
137
138 /* Rate limit chain-fail messages to 1 per minute */
139 static struct timeval mps_chainfail_interval = { 60, 0 };
140
141 /*
142 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
143 * If this function is called from process context, it can sleep
144 * and there is no harm to sleep, in case if this fuction is called
145 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
146 * based on sleep flags driver will call either msleep, pause or DELAY.
147 * msleep and pause are of same variant, but pause is used when mps_mtx
148 * is not hold by driver.
149 *
150 */
151 static int
mps_diag_reset(struct mps_softc * sc,int sleep_flag)152 mps_diag_reset(struct mps_softc *sc,int sleep_flag)
153 {
154 uint32_t reg;
155 int i, error, tries = 0;
156 uint8_t first_wait_done = FALSE;
157
158 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
159
160 /* Clear any pending interrupts */
161 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
162
163 /*
164 * Force NO_SLEEP for threads prohibited to sleep
165 * e.a Thread from interrupt handler are prohibited to sleep.
166 */
167 if (curthread->td_no_sleeping != 0)
168 sleep_flag = NO_SLEEP;
169
170 mps_dprint(sc, MPS_INIT, "sequence start, sleep_flag= %d\n", sleep_flag);
171
172 /* Push the magic sequence */
173 error = ETIMEDOUT;
174 while (tries++ < 20) {
175 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
176 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
177 mpt2_reset_magic[i]);
178 /* wait 100 msec */
179 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
180 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
181 "mpsdiag", hz/10);
182 else if (sleep_flag == CAN_SLEEP)
183 pause("mpsdiag", hz/10);
184 else
185 DELAY(100 * 1000);
186
187 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
188 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
189 error = 0;
190 break;
191 }
192 }
193 if (error) {
194 mps_dprint(sc, MPS_INIT, "sequence failed, error=%d, exit\n",
195 error);
196 return (error);
197 }
198
199 /* Send the actual reset. XXX need to refresh the reg? */
200 reg |= MPI2_DIAG_RESET_ADAPTER;
201 mps_dprint(sc, MPS_INIT, "sequence success, sending reset, reg= 0x%x\n",
202 reg);
203 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, reg);
204
205 /* Wait up to 300 seconds in 50ms intervals */
206 error = ETIMEDOUT;
207 for (i = 0; i < 6000; i++) {
208 /*
209 * Wait 50 msec. If this is the first time through, wait 256
210 * msec to satisfy Diag Reset timing requirements.
211 */
212 if (first_wait_done) {
213 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
214 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
215 "mpsdiag", hz/20);
216 else if (sleep_flag == CAN_SLEEP)
217 pause("mpsdiag", hz/20);
218 else
219 DELAY(50 * 1000);
220 } else {
221 DELAY(256 * 1000);
222 first_wait_done = TRUE;
223 }
224 /*
225 * Check for the RESET_ADAPTER bit to be cleared first, then
226 * wait for the RESET state to be cleared, which takes a little
227 * longer.
228 */
229 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
230 if (reg & MPI2_DIAG_RESET_ADAPTER) {
231 continue;
232 }
233 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
234 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
235 error = 0;
236 break;
237 }
238 }
239 if (error) {
240 mps_dprint(sc, MPS_INIT, "reset failed, error= %d, exit\n",
241 error);
242 return (error);
243 }
244
245 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
246 mps_dprint(sc, MPS_INIT, "diag reset success, exit\n");
247
248 return (0);
249 }
250
251 static int
mps_message_unit_reset(struct mps_softc * sc,int sleep_flag)252 mps_message_unit_reset(struct mps_softc *sc, int sleep_flag)
253 {
254 int error;
255
256 MPS_FUNCTRACE(sc);
257
258 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
259
260 error = 0;
261 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
262 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
263 MPI2_DOORBELL_FUNCTION_SHIFT);
264
265 if (mps_wait_db_ack(sc, 5, sleep_flag) != 0) {
266 mps_dprint(sc, MPS_INIT|MPS_FAULT,
267 "Doorbell handshake failed\n");
268 error = ETIMEDOUT;
269 }
270
271 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
272 return (error);
273 }
274
275 static int
mps_transition_ready(struct mps_softc * sc)276 mps_transition_ready(struct mps_softc *sc)
277 {
278 uint32_t reg, state;
279 int error, tries = 0;
280 int sleep_flags;
281
282 MPS_FUNCTRACE(sc);
283 /* If we are in attach call, do not sleep */
284 sleep_flags = (sc->mps_flags & MPS_FLAGS_ATTACH_DONE)
285 ? CAN_SLEEP:NO_SLEEP;
286 error = 0;
287
288 mps_dprint(sc, MPS_INIT, "%s entered, sleep_flags= %d\n",
289 __func__, sleep_flags);
290
291 while (tries++ < 1200) {
292 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
293 mps_dprint(sc, MPS_INIT, " Doorbell= 0x%x\n", reg);
294
295 /*
296 * Ensure the IOC is ready to talk. If it's not, try
297 * resetting it.
298 */
299 if (reg & MPI2_DOORBELL_USED) {
300 mps_dprint(sc, MPS_INIT, " Not ready, sending diag "
301 "reset\n");
302 mps_diag_reset(sc, sleep_flags);
303 DELAY(50000);
304 continue;
305 }
306
307 /* Is the adapter owned by another peer? */
308 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
309 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
310 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC is under the "
311 "control of another peer host, aborting "
312 "initialization.\n");
313 error = ENXIO;
314 break;
315 }
316
317 state = reg & MPI2_IOC_STATE_MASK;
318 if (state == MPI2_IOC_STATE_READY) {
319 /* Ready to go! */
320 error = 0;
321 break;
322 } else if (state == MPI2_IOC_STATE_FAULT) {
323 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC in fault "
324 "state 0x%x, resetting\n",
325 state & MPI2_DOORBELL_FAULT_CODE_MASK);
326 mps_diag_reset(sc, sleep_flags);
327 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
328 /* Need to take ownership */
329 mps_message_unit_reset(sc, sleep_flags);
330 } else if (state == MPI2_IOC_STATE_RESET) {
331 /* Wait a bit, IOC might be in transition */
332 mps_dprint(sc, MPS_INIT|MPS_FAULT,
333 "IOC in unexpected reset state\n");
334 } else {
335 mps_dprint(sc, MPS_INIT|MPS_FAULT,
336 "IOC in unknown state 0x%x\n", state);
337 error = EINVAL;
338 break;
339 }
340
341 /* Wait 50ms for things to settle down. */
342 DELAY(50000);
343 }
344
345 if (error)
346 mps_dprint(sc, MPS_INIT|MPS_FAULT,
347 "Cannot transition IOC to ready\n");
348 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
349
350 return (error);
351 }
352
353 static int
mps_transition_operational(struct mps_softc * sc)354 mps_transition_operational(struct mps_softc *sc)
355 {
356 uint32_t reg, state;
357 int error;
358
359 MPS_FUNCTRACE(sc);
360
361 error = 0;
362 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
363 mps_dprint(sc, MPS_INIT, "%s entered, Doorbell= 0x%x\n", __func__, reg);
364
365 state = reg & MPI2_IOC_STATE_MASK;
366 if (state != MPI2_IOC_STATE_READY) {
367 mps_dprint(sc, MPS_INIT, "IOC not ready\n");
368 if ((error = mps_transition_ready(sc)) != 0) {
369 mps_dprint(sc, MPS_INIT|MPS_FAULT,
370 "failed to transition ready, exit\n");
371 return (error);
372 }
373 }
374
375 error = mps_send_iocinit(sc);
376 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
377
378 return (error);
379 }
380
381 static void
mps_resize_queues(struct mps_softc * sc)382 mps_resize_queues(struct mps_softc *sc)
383 {
384 u_int reqcr, prireqcr, maxio, sges_per_frame;
385
386 /*
387 * Size the queues. Since the reply queues always need one free
388 * entry, we'll deduct one reply message here. The LSI documents
389 * suggest instead to add a count to the request queue, but I think
390 * that it's better to deduct from reply queue.
391 */
392 prireqcr = MAX(1, sc->max_prireqframes);
393 prireqcr = MIN(prireqcr, sc->facts->HighPriorityCredit);
394
395 reqcr = MAX(2, sc->max_reqframes);
396 reqcr = MIN(reqcr, sc->facts->RequestCredit);
397
398 sc->num_reqs = prireqcr + reqcr;
399 sc->num_prireqs = prireqcr;
400 sc->num_replies = MIN(sc->max_replyframes + sc->max_evtframes,
401 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
402
403 /* Store the request frame size in bytes rather than as 32bit words */
404 sc->reqframesz = sc->facts->IOCRequestFrameSize * 4;
405
406 /*
407 * Max IO Size is Page Size * the following:
408 * ((SGEs per frame - 1 for chain element) * Max Chain Depth)
409 * + 1 for no chain needed in last frame
410 *
411 * If user suggests a Max IO size to use, use the smaller of the
412 * user's value and the calculated value as long as the user's
413 * value is larger than 0. The user's value is in pages.
414 */
415 sges_per_frame = sc->reqframesz / sizeof(MPI2_SGE_SIMPLE64) - 1;
416 maxio = (sges_per_frame * sc->facts->MaxChainDepth + 1) * PAGE_SIZE;
417
418 /*
419 * If I/O size limitation requested, then use it and pass up to CAM.
420 * If not, use MAXPHYS as an optimization hint, but report HW limit.
421 */
422 if (sc->max_io_pages > 0) {
423 maxio = min(maxio, sc->max_io_pages * PAGE_SIZE);
424 sc->maxio = maxio;
425 } else {
426 sc->maxio = maxio;
427 maxio = min(maxio, MAXPHYS);
428 }
429
430 sc->num_chains = (maxio / PAGE_SIZE + sges_per_frame - 2) /
431 sges_per_frame * reqcr;
432 if (sc->max_chains > 0 && sc->max_chains < sc->num_chains)
433 sc->num_chains = sc->max_chains;
434
435 /*
436 * Figure out the number of MSIx-based queues. If the firmware or
437 * user has done something crazy and not allowed enough credit for
438 * the queues to be useful then don't enable multi-queue.
439 */
440 if (sc->facts->MaxMSIxVectors < 2)
441 sc->msi_msgs = 1;
442
443 if (sc->msi_msgs > 1) {
444 sc->msi_msgs = MIN(sc->msi_msgs, mp_ncpus);
445 sc->msi_msgs = MIN(sc->msi_msgs, sc->facts->MaxMSIxVectors);
446 if (sc->num_reqs / sc->msi_msgs < 2)
447 sc->msi_msgs = 1;
448 }
449
450 mps_dprint(sc, MPS_INIT, "Sized queues to q=%d reqs=%d replies=%d\n",
451 sc->msi_msgs, sc->num_reqs, sc->num_replies);
452 }
453
454 /*
455 * This is called during attach and when re-initializing due to a Diag Reset.
456 * IOC Facts is used to allocate many of the structures needed by the driver.
457 * If called from attach, de-allocation is not required because the driver has
458 * not allocated any structures yet, but if called from a Diag Reset, previously
459 * allocated structures based on IOC Facts will need to be freed and re-
460 * allocated bases on the latest IOC Facts.
461 */
462 static int
mps_iocfacts_allocate(struct mps_softc * sc,uint8_t attaching)463 mps_iocfacts_allocate(struct mps_softc *sc, uint8_t attaching)
464 {
465 int error;
466 Mpi2IOCFactsReply_t saved_facts;
467 uint8_t saved_mode, reallocating;
468
469 mps_dprint(sc, MPS_INIT|MPS_TRACE, "%s entered\n", __func__);
470
471 /* Save old IOC Facts and then only reallocate if Facts have changed */
472 if (!attaching) {
473 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
474 }
475
476 /*
477 * Get IOC Facts. In all cases throughout this function, panic if doing
478 * a re-initialization and only return the error if attaching so the OS
479 * can handle it.
480 */
481 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) {
482 if (attaching) {
483 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to get "
484 "IOC Facts with error %d, exit\n", error);
485 return (error);
486 } else {
487 panic("%s failed to get IOC Facts with error %d\n",
488 __func__, error);
489 }
490 }
491
492 MPS_DPRINT_PAGE(sc, MPS_XINFO, iocfacts, sc->facts);
493
494 snprintf(sc->fw_version, sizeof(sc->fw_version),
495 "%02d.%02d.%02d.%02d",
496 sc->facts->FWVersion.Struct.Major,
497 sc->facts->FWVersion.Struct.Minor,
498 sc->facts->FWVersion.Struct.Unit,
499 sc->facts->FWVersion.Struct.Dev);
500
501 snprintf(sc->msg_version, sizeof(sc->msg_version), "%d.%d",
502 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK) >>
503 MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT,
504 (sc->facts->MsgVersion & MPI2_IOCFACTS_MSGVERSION_MINOR_MASK) >>
505 MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT);
506
507 mps_dprint(sc, MPS_INFO, "Firmware: %s, Driver: %s\n", sc->fw_version,
508 MPS_DRIVER_VERSION);
509 mps_dprint(sc, MPS_INFO, "IOCCapabilities: %b\n",
510 sc->facts->IOCCapabilities,
511 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
512 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
513 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
514
515 /*
516 * If the chip doesn't support event replay then a hard reset will be
517 * required to trigger a full discovery. Do the reset here then
518 * retransition to Ready. A hard reset might have already been done,
519 * but it doesn't hurt to do it again. Only do this if attaching, not
520 * for a Diag Reset.
521 */
522 if (attaching && ((sc->facts->IOCCapabilities &
523 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0)) {
524 mps_dprint(sc, MPS_INIT, "No event replay, reseting\n");
525 mps_diag_reset(sc, NO_SLEEP);
526 if ((error = mps_transition_ready(sc)) != 0) {
527 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to "
528 "transition to ready with error %d, exit\n",
529 error);
530 return (error);
531 }
532 }
533
534 /*
535 * Set flag if IR Firmware is loaded. If the RAID Capability has
536 * changed from the previous IOC Facts, log a warning, but only if
537 * checking this after a Diag Reset and not during attach.
538 */
539 saved_mode = sc->ir_firmware;
540 if (sc->facts->IOCCapabilities &
541 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
542 sc->ir_firmware = 1;
543 if (!attaching) {
544 if (sc->ir_firmware != saved_mode) {
545 mps_dprint(sc, MPS_INIT|MPS_FAULT, "new IR/IT mode "
546 "in IOC Facts does not match previous mode\n");
547 }
548 }
549
550 /* Only deallocate and reallocate if relevant IOC Facts have changed */
551 reallocating = FALSE;
552 sc->mps_flags &= ~MPS_FLAGS_REALLOCATED;
553
554 if ((!attaching) &&
555 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
556 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
557 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
558 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
559 (saved_facts.ProductID != sc->facts->ProductID) ||
560 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
561 (saved_facts.IOCRequestFrameSize !=
562 sc->facts->IOCRequestFrameSize) ||
563 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
564 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
565 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
566 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
567 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
568 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
569 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
570 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
571 (saved_facts.MaxPersistentEntries !=
572 sc->facts->MaxPersistentEntries))) {
573 reallocating = TRUE;
574
575 /* Record that we reallocated everything */
576 sc->mps_flags |= MPS_FLAGS_REALLOCATED;
577 }
578
579 /*
580 * Some things should be done if attaching or re-allocating after a Diag
581 * Reset, but are not needed after a Diag Reset if the FW has not
582 * changed.
583 */
584 if (attaching || reallocating) {
585 /*
586 * Check if controller supports FW diag buffers and set flag to
587 * enable each type.
588 */
589 if (sc->facts->IOCCapabilities &
590 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
591 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
592 enabled = TRUE;
593 if (sc->facts->IOCCapabilities &
594 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
595 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
596 enabled = TRUE;
597 if (sc->facts->IOCCapabilities &
598 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
599 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
600 enabled = TRUE;
601
602 /*
603 * Set flag if EEDP is supported and if TLR is supported.
604 */
605 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
606 sc->eedp_enabled = TRUE;
607 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
608 sc->control_TLR = TRUE;
609
610 mps_resize_queues(sc);
611
612 /*
613 * Initialize all Tail Queues
614 */
615 TAILQ_INIT(&sc->req_list);
616 TAILQ_INIT(&sc->high_priority_req_list);
617 TAILQ_INIT(&sc->chain_list);
618 TAILQ_INIT(&sc->tm_list);
619 }
620
621 /*
622 * If doing a Diag Reset and the FW is significantly different
623 * (reallocating will be set above in IOC Facts comparison), then all
624 * buffers based on the IOC Facts will need to be freed before they are
625 * reallocated.
626 */
627 if (reallocating) {
628 mps_iocfacts_free(sc);
629 mpssas_realloc_targets(sc, saved_facts.MaxTargets +
630 saved_facts.MaxVolumes);
631 }
632
633 /*
634 * Any deallocation has been completed. Now start reallocating
635 * if needed. Will only need to reallocate if attaching or if the new
636 * IOC Facts are different from the previous IOC Facts after a Diag
637 * Reset. Targets have already been allocated above if needed.
638 */
639 error = 0;
640 while (attaching || reallocating) {
641 if ((error = mps_alloc_hw_queues(sc)) != 0)
642 break;
643 if ((error = mps_alloc_replies(sc)) != 0)
644 break;
645 if ((error = mps_alloc_requests(sc)) != 0)
646 break;
647 if ((error = mps_alloc_queues(sc)) != 0)
648 break;
649
650 break;
651 }
652 if (error) {
653 mps_dprint(sc, MPS_INIT|MPS_FAULT,
654 "Failed to alloc queues with error %d\n", error);
655 mps_free(sc);
656 return (error);
657 }
658
659 /* Always initialize the queues */
660 bzero(sc->free_queue, sc->fqdepth * 4);
661 mps_init_queues(sc);
662
663 /*
664 * Always get the chip out of the reset state, but only panic if not
665 * attaching. If attaching and there is an error, that is handled by
666 * the OS.
667 */
668 error = mps_transition_operational(sc);
669 if (error != 0) {
670 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to "
671 "transition to operational with error %d\n", error);
672 mps_free(sc);
673 return (error);
674 }
675
676 /*
677 * Finish the queue initialization.
678 * These are set here instead of in mps_init_queues() because the
679 * IOC resets these values during the state transition in
680 * mps_transition_operational(). The free index is set to 1
681 * because the corresponding index in the IOC is set to 0, and the
682 * IOC treats the queues as full if both are set to the same value.
683 * Hence the reason that the queue can't hold all of the possible
684 * replies.
685 */
686 sc->replypostindex = 0;
687 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
688 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
689
690 /*
691 * Attach the subsystems so they can prepare their event masks.
692 * XXX Should be dynamic so that IM/IR and user modules can attach
693 */
694 error = 0;
695 while (attaching) {
696 mps_dprint(sc, MPS_INIT, "Attaching subsystems\n");
697 if ((error = mps_attach_log(sc)) != 0)
698 break;
699 if ((error = mps_attach_sas(sc)) != 0)
700 break;
701 if ((error = mps_attach_user(sc)) != 0)
702 break;
703 break;
704 }
705 if (error) {
706 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to attach all "
707 "subsystems: error %d\n", error);
708 mps_free(sc);
709 return (error);
710 }
711
712 /*
713 * XXX If the number of MSI-X vectors changes during re-init, this
714 * won't see it and adjust.
715 */
716 if (attaching && (error = mps_pci_setup_interrupts(sc)) != 0) {
717 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Failed to setup "
718 "interrupts\n");
719 mps_free(sc);
720 return (error);
721 }
722
723 /*
724 * Set flag if this is a WD controller. This shouldn't ever change, but
725 * reset it after a Diag Reset, just in case.
726 */
727 sc->WD_available = FALSE;
728 if (pci_get_device(sc->mps_dev) == MPI2_MFGPAGE_DEVID_SSS6200)
729 sc->WD_available = TRUE;
730
731 return (error);
732 }
733
734 /*
735 * This is called if memory is being free (during detach for example) and when
736 * buffers need to be reallocated due to a Diag Reset.
737 */
738 static void
mps_iocfacts_free(struct mps_softc * sc)739 mps_iocfacts_free(struct mps_softc *sc)
740 {
741 struct mps_command *cm;
742 int i;
743
744 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
745
746 if (sc->free_busaddr != 0)
747 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
748 if (sc->free_queue != NULL)
749 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
750 sc->queues_map);
751 if (sc->queues_dmat != NULL)
752 bus_dma_tag_destroy(sc->queues_dmat);
753
754 if (sc->chain_frames != NULL) {
755 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
756 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
757 sc->chain_map);
758 }
759 if (sc->chain_dmat != NULL)
760 bus_dma_tag_destroy(sc->chain_dmat);
761
762 if (sc->sense_busaddr != 0)
763 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
764 if (sc->sense_frames != NULL)
765 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
766 sc->sense_map);
767 if (sc->sense_dmat != NULL)
768 bus_dma_tag_destroy(sc->sense_dmat);
769
770 if (sc->reply_busaddr != 0)
771 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
772 if (sc->reply_frames != NULL)
773 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
774 sc->reply_map);
775 if (sc->reply_dmat != NULL)
776 bus_dma_tag_destroy(sc->reply_dmat);
777
778 if (sc->req_busaddr != 0)
779 bus_dmamap_unload(sc->req_dmat, sc->req_map);
780 if (sc->req_frames != NULL)
781 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
782 if (sc->req_dmat != NULL)
783 bus_dma_tag_destroy(sc->req_dmat);
784
785 if (sc->chains != NULL)
786 free(sc->chains, M_MPT2);
787 if (sc->commands != NULL) {
788 for (i = 1; i < sc->num_reqs; i++) {
789 cm = &sc->commands[i];
790 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
791 }
792 free(sc->commands, M_MPT2);
793 }
794 if (sc->buffer_dmat != NULL)
795 bus_dma_tag_destroy(sc->buffer_dmat);
796
797 mps_pci_free_interrupts(sc);
798 free(sc->queues, M_MPT2);
799 sc->queues = NULL;
800 }
801
802 /*
803 * The terms diag reset and hard reset are used interchangeably in the MPI
804 * docs to mean resetting the controller chip. In this code diag reset
805 * cleans everything up, and the hard reset function just sends the reset
806 * sequence to the chip. This should probably be refactored so that every
807 * subsystem gets a reset notification of some sort, and can clean up
808 * appropriately.
809 */
810 int
mps_reinit(struct mps_softc * sc)811 mps_reinit(struct mps_softc *sc)
812 {
813 int error;
814 struct mpssas_softc *sassc;
815
816 sassc = sc->sassc;
817
818 MPS_FUNCTRACE(sc);
819
820 mtx_assert(&sc->mps_mtx, MA_OWNED);
821
822 mps_dprint(sc, MPS_INIT|MPS_INFO, "Reinitializing controller\n");
823 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
824 mps_dprint(sc, MPS_INIT, "Reset already in progress\n");
825 return 0;
826 }
827
828 /* make sure the completion callbacks can recognize they're getting
829 * a NULL cm_reply due to a reset.
830 */
831 sc->mps_flags |= MPS_FLAGS_DIAGRESET;
832
833 /*
834 * Mask interrupts here.
835 */
836 mps_dprint(sc, MPS_INIT, "masking interrupts and resetting\n");
837 mps_mask_intr(sc);
838
839 error = mps_diag_reset(sc, CAN_SLEEP);
840 if (error != 0) {
841 /* XXXSL No need to panic here */
842 panic("%s hard reset failed with error %d\n",
843 __func__, error);
844 }
845
846 /* Restore the PCI state, including the MSI-X registers */
847 mps_pci_restore(sc);
848
849 /* Give the I/O subsystem special priority to get itself prepared */
850 mpssas_handle_reinit(sc);
851
852 /*
853 * Get IOC Facts and allocate all structures based on this information.
854 * The attach function will also call mps_iocfacts_allocate at startup.
855 * If relevant values have changed in IOC Facts, this function will free
856 * all of the memory based on IOC Facts and reallocate that memory.
857 */
858 if ((error = mps_iocfacts_allocate(sc, FALSE)) != 0) {
859 panic("%s IOC Facts based allocation failed with error %d\n",
860 __func__, error);
861 }
862
863 /*
864 * Mapping structures will be re-allocated after getting IOC Page8, so
865 * free these structures here.
866 */
867 mps_mapping_exit(sc);
868
869 /*
870 * The static page function currently read is IOC Page8. Others can be
871 * added in future. It's possible that the values in IOC Page8 have
872 * changed after a Diag Reset due to user modification, so always read
873 * these. Interrupts are masked, so unmask them before getting config
874 * pages.
875 */
876 mps_unmask_intr(sc);
877 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
878 mps_base_static_config_pages(sc);
879
880 /*
881 * Some mapping info is based in IOC Page8 data, so re-initialize the
882 * mapping tables.
883 */
884 mps_mapping_initialize(sc);
885
886 /*
887 * Restart will reload the event masks clobbered by the reset, and
888 * then enable the port.
889 */
890 mps_reregister_events(sc);
891
892 /* the end of discovery will release the simq, so we're done. */
893 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Finished sc %p post %u free %u\n",
894 sc, sc->replypostindex, sc->replyfreeindex);
895
896 mpssas_release_simq_reinit(sassc);
897 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
898
899 return 0;
900 }
901
902 /* Wait for the chip to ACK a word that we've put into its FIFO
903 * Wait for <timeout> seconds. In single loop wait for busy loop
904 * for 500 microseconds.
905 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
906 * */
907 static int
mps_wait_db_ack(struct mps_softc * sc,int timeout,int sleep_flag)908 mps_wait_db_ack(struct mps_softc *sc, int timeout, int sleep_flag)
909 {
910
911 u32 cntdn, count;
912 u32 int_status;
913 u32 doorbell;
914
915 count = 0;
916 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
917 do {
918 int_status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
919 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
920 mps_dprint(sc, MPS_TRACE,
921 "%s: successful count(%d), timeout(%d)\n",
922 __func__, count, timeout);
923 return 0;
924 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
925 doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
926 if ((doorbell & MPI2_IOC_STATE_MASK) ==
927 MPI2_IOC_STATE_FAULT) {
928 mps_dprint(sc, MPS_FAULT,
929 "fault_state(0x%04x)!\n", doorbell);
930 return (EFAULT);
931 }
932 } else if (int_status == 0xFFFFFFFF)
933 goto out;
934
935 /* If it can sleep, sleep for 1 milisecond, else busy loop for
936 * 0.5 milisecond */
937 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP)
938 msleep(&sc->msleep_fake_chan, &sc->mps_mtx, 0,
939 "mpsdba", hz/1000);
940 else if (sleep_flag == CAN_SLEEP)
941 pause("mpsdba", hz/1000);
942 else
943 DELAY(500);
944 count++;
945 } while (--cntdn);
946
947 out:
948 mps_dprint(sc, MPS_FAULT, "%s: failed due to timeout count(%d), "
949 "int_status(%x)!\n", __func__, count, int_status);
950 return (ETIMEDOUT);
951
952 }
953
954 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
955 static int
mps_wait_db_int(struct mps_softc * sc)956 mps_wait_db_int(struct mps_softc *sc)
957 {
958 int retry;
959
960 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
961 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
962 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
963 return (0);
964 DELAY(2000);
965 }
966 return (ETIMEDOUT);
967 }
968
969 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
970 static int
mps_request_sync(struct mps_softc * sc,void * req,MPI2_DEFAULT_REPLY * reply,int req_sz,int reply_sz,int timeout)971 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
972 int req_sz, int reply_sz, int timeout)
973 {
974 uint32_t *data32;
975 uint16_t *data16;
976 int i, count, ioc_sz, residual;
977 int sleep_flags = CAN_SLEEP;
978
979 if (curthread->td_no_sleeping != 0)
980 sleep_flags = NO_SLEEP;
981
982 /* Step 1 */
983 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
984
985 /* Step 2 */
986 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
987 return (EBUSY);
988
989 /* Step 3
990 * Announce that a message is coming through the doorbell. Messages
991 * are pushed at 32bit words, so round up if needed.
992 */
993 count = (req_sz + 3) / 4;
994 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
995 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
996 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
997
998 /* Step 4 */
999 if (mps_wait_db_int(sc) ||
1000 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
1001 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
1002 return (ENXIO);
1003 }
1004 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1005 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
1006 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
1007 return (ENXIO);
1008 }
1009
1010 /* Step 5 */
1011 /* Clock out the message data synchronously in 32-bit dwords*/
1012 data32 = (uint32_t *)req;
1013 for (i = 0; i < count; i++) {
1014 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
1015 if (mps_wait_db_ack(sc, 5, sleep_flags) != 0) {
1016 mps_dprint(sc, MPS_FAULT,
1017 "Timeout while writing doorbell\n");
1018 return (ENXIO);
1019 }
1020 }
1021
1022 /* Step 6 */
1023 /* Clock in the reply in 16-bit words. The total length of the
1024 * message is always in the 4th byte, so clock out the first 2 words
1025 * manually, then loop the rest.
1026 */
1027 data16 = (uint16_t *)reply;
1028 if (mps_wait_db_int(sc) != 0) {
1029 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
1030 return (ENXIO);
1031 }
1032 data16[0] =
1033 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
1034 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1035 if (mps_wait_db_int(sc) != 0) {
1036 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
1037 return (ENXIO);
1038 }
1039 data16[1] =
1040 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
1041 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1042
1043 /* Number of 32bit words in the message */
1044 ioc_sz = reply->MsgLength;
1045
1046 /*
1047 * Figure out how many 16bit words to clock in without overrunning.
1048 * The precision loss with dividing reply_sz can safely be
1049 * ignored because the messages can only be multiples of 32bits.
1050 */
1051 residual = 0;
1052 count = MIN((reply_sz / 4), ioc_sz) * 2;
1053 if (count < ioc_sz * 2) {
1054 residual = ioc_sz * 2 - count;
1055 mps_dprint(sc, MPS_ERROR, "Driver error, throwing away %d "
1056 "residual message words\n", residual);
1057 }
1058
1059 for (i = 2; i < count; i++) {
1060 if (mps_wait_db_int(sc) != 0) {
1061 mps_dprint(sc, MPS_FAULT,
1062 "Timeout reading doorbell %d\n", i);
1063 return (ENXIO);
1064 }
1065 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
1066 MPI2_DOORBELL_DATA_MASK;
1067 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1068 }
1069
1070 /*
1071 * Pull out residual words that won't fit into the provided buffer.
1072 * This keeps the chip from hanging due to a driver programming
1073 * error.
1074 */
1075 while (residual--) {
1076 if (mps_wait_db_int(sc) != 0) {
1077 mps_dprint(sc, MPS_FAULT,
1078 "Timeout reading doorbell\n");
1079 return (ENXIO);
1080 }
1081 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
1082 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1083 }
1084
1085 /* Step 7 */
1086 if (mps_wait_db_int(sc) != 0) {
1087 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
1088 return (ENXIO);
1089 }
1090 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
1091 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
1092 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
1093
1094 return (0);
1095 }
1096
1097 static void
mps_enqueue_request(struct mps_softc * sc,struct mps_command * cm)1098 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
1099 {
1100 reply_descriptor rd;
1101 MPS_FUNCTRACE(sc);
1102 mps_dprint(sc, MPS_TRACE, "SMID %u cm %p ccb %p\n",
1103 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
1104
1105 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
1106 mtx_assert(&sc->mps_mtx, MA_OWNED);
1107
1108 if (++sc->io_cmds_active > sc->io_cmds_highwater)
1109 sc->io_cmds_highwater++;
1110 rd.u.low = cm->cm_desc.Words.Low;
1111 rd.u.high = cm->cm_desc.Words.High;
1112 rd.word = htole64(rd.word);
1113
1114 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY, ("command not busy\n"));
1115 cm->cm_state = MPS_CM_STATE_INQUEUE;
1116
1117 /* TODO-We may need to make below regwrite atomic */
1118 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
1119 rd.u.low);
1120 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
1121 rd.u.high);
1122 }
1123
1124 /*
1125 * Just the FACTS, ma'am.
1126 */
1127 static int
mps_get_iocfacts(struct mps_softc * sc,MPI2_IOC_FACTS_REPLY * facts)1128 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
1129 {
1130 MPI2_DEFAULT_REPLY *reply;
1131 MPI2_IOC_FACTS_REQUEST request;
1132 int error, req_sz, reply_sz;
1133
1134 MPS_FUNCTRACE(sc);
1135 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
1136
1137 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
1138 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
1139 reply = (MPI2_DEFAULT_REPLY *)facts;
1140
1141 bzero(&request, req_sz);
1142 request.Function = MPI2_FUNCTION_IOC_FACTS;
1143 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1144 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error);
1145
1146 return (error);
1147 }
1148
1149 static int
mps_send_iocinit(struct mps_softc * sc)1150 mps_send_iocinit(struct mps_softc *sc)
1151 {
1152 MPI2_IOC_INIT_REQUEST init;
1153 MPI2_DEFAULT_REPLY reply;
1154 int req_sz, reply_sz, error;
1155 struct timeval now;
1156 uint64_t time_in_msec;
1157
1158 MPS_FUNCTRACE(sc);
1159 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
1160
1161 /* Do a quick sanity check on proper initialization */
1162 if ((sc->pqdepth == 0) || (sc->fqdepth == 0) || (sc->reqframesz == 0)
1163 || (sc->replyframesz == 0)) {
1164 mps_dprint(sc, MPS_INIT|MPS_ERROR,
1165 "Driver not fully initialized for IOCInit\n");
1166 return (EINVAL);
1167 }
1168
1169 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1170 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1171 bzero(&init, req_sz);
1172 bzero(&reply, reply_sz);
1173
1174 /*
1175 * Fill in the init block. Note that most addresses are
1176 * deliberately in the lower 32bits of memory. This is a micro-
1177 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1178 */
1179 init.Function = MPI2_FUNCTION_IOC_INIT;
1180 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1181 init.MsgVersion = htole16(MPI2_VERSION);
1182 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1183 init.SystemRequestFrameSize = htole16((uint16_t)(sc->reqframesz / 4));
1184 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1185 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1186 init.SenseBufferAddressHigh = 0;
1187 init.SystemReplyAddressHigh = 0;
1188 init.SystemRequestFrameBaseAddress.High = 0;
1189 init.SystemRequestFrameBaseAddress.Low = htole32((uint32_t)sc->req_busaddr);
1190 init.ReplyDescriptorPostQueueAddress.High = 0;
1191 init.ReplyDescriptorPostQueueAddress.Low = htole32((uint32_t)sc->post_busaddr);
1192 init.ReplyFreeQueueAddress.High = 0;
1193 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1194 getmicrotime(&now);
1195 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1196 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1197 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1198
1199 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1200 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1201 error = ENXIO;
1202
1203 mps_dprint(sc, MPS_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1204 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
1205 return (error);
1206 }
1207
1208 void
mps_memaddr_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1209 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1210 {
1211 bus_addr_t *addr;
1212
1213 addr = arg;
1214 *addr = segs[0].ds_addr;
1215 }
1216
1217 void
mps_memaddr_wait_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1218 mps_memaddr_wait_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1219 {
1220 struct mps_busdma_context *ctx;
1221 int need_unload, need_free;
1222
1223 ctx = (struct mps_busdma_context *)arg;
1224 need_unload = 0;
1225 need_free = 0;
1226
1227 mps_lock(ctx->softc);
1228 ctx->error = error;
1229 ctx->completed = 1;
1230 if ((error == 0) && (ctx->abandoned == 0)) {
1231 *ctx->addr = segs[0].ds_addr;
1232 } else {
1233 if (nsegs != 0)
1234 need_unload = 1;
1235 if (ctx->abandoned != 0)
1236 need_free = 1;
1237 }
1238 if (need_free == 0)
1239 wakeup(ctx);
1240
1241 mps_unlock(ctx->softc);
1242
1243 if (need_unload != 0) {
1244 bus_dmamap_unload(ctx->buffer_dmat,
1245 ctx->buffer_dmamap);
1246 *ctx->addr = 0;
1247 }
1248
1249 if (need_free != 0)
1250 free(ctx, M_MPSUSER);
1251 }
1252
1253 static int
mps_alloc_queues(struct mps_softc * sc)1254 mps_alloc_queues(struct mps_softc *sc)
1255 {
1256 struct mps_queue *q;
1257 u_int nq, i;
1258
1259 nq = sc->msi_msgs;
1260 mps_dprint(sc, MPS_INIT|MPS_XINFO, "Allocating %d I/O queues\n", nq);
1261
1262 sc->queues = malloc(sizeof(struct mps_queue) * nq, M_MPT2,
1263 M_NOWAIT|M_ZERO);
1264 if (sc->queues == NULL)
1265 return (ENOMEM);
1266
1267 for (i = 0; i < nq; i++) {
1268 q = &sc->queues[i];
1269 mps_dprint(sc, MPS_INIT, "Configuring queue %d %p\n", i, q);
1270 q->sc = sc;
1271 q->qnum = i;
1272 }
1273
1274 return (0);
1275 }
1276
1277 static int
mps_alloc_hw_queues(struct mps_softc * sc)1278 mps_alloc_hw_queues(struct mps_softc *sc)
1279 {
1280 bus_addr_t queues_busaddr;
1281 uint8_t *queues;
1282 int qsize, fqsize, pqsize;
1283
1284 /*
1285 * The reply free queue contains 4 byte entries in multiples of 16 and
1286 * aligned on a 16 byte boundary. There must always be an unused entry.
1287 * This queue supplies fresh reply frames for the firmware to use.
1288 *
1289 * The reply descriptor post queue contains 8 byte entries in
1290 * multiples of 16 and aligned on a 16 byte boundary. This queue
1291 * contains filled-in reply frames sent from the firmware to the host.
1292 *
1293 * These two queues are allocated together for simplicity.
1294 */
1295 sc->fqdepth = roundup2(sc->num_replies + 1, 16);
1296 sc->pqdepth = roundup2(sc->num_replies + 1, 16);
1297 fqsize= sc->fqdepth * 4;
1298 pqsize = sc->pqdepth * 8;
1299 qsize = fqsize + pqsize;
1300
1301 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1302 16, 0, /* algnmnt, boundary */
1303 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1304 BUS_SPACE_MAXADDR, /* highaddr */
1305 NULL, NULL, /* filter, filterarg */
1306 qsize, /* maxsize */
1307 1, /* nsegments */
1308 qsize, /* maxsegsize */
1309 0, /* flags */
1310 NULL, NULL, /* lockfunc, lockarg */
1311 &sc->queues_dmat)) {
1312 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues DMA tag\n");
1313 return (ENOMEM);
1314 }
1315 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1316 &sc->queues_map)) {
1317 mps_dprint(sc, MPS_ERROR, "Cannot allocate queues memory\n");
1318 return (ENOMEM);
1319 }
1320 bzero(queues, qsize);
1321 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1322 mps_memaddr_cb, &queues_busaddr, 0);
1323
1324 sc->free_queue = (uint32_t *)queues;
1325 sc->free_busaddr = queues_busaddr;
1326 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1327 sc->post_busaddr = queues_busaddr + fqsize;
1328 mps_dprint(sc, MPS_INIT, "free queue busaddr= %#016jx size= %d\n",
1329 (uintmax_t)sc->free_busaddr, fqsize);
1330 mps_dprint(sc, MPS_INIT, "reply queue busaddr= %#016jx size= %d\n",
1331 (uintmax_t)sc->post_busaddr, pqsize);
1332
1333 return (0);
1334 }
1335
1336 static int
mps_alloc_replies(struct mps_softc * sc)1337 mps_alloc_replies(struct mps_softc *sc)
1338 {
1339 int rsize, num_replies;
1340
1341 /* Store the reply frame size in bytes rather than as 32bit words */
1342 sc->replyframesz = sc->facts->ReplyFrameSize * 4;
1343
1344 /*
1345 * sc->num_replies should be one less than sc->fqdepth. We need to
1346 * allocate space for sc->fqdepth replies, but only sc->num_replies
1347 * replies can be used at once.
1348 */
1349 num_replies = max(sc->fqdepth, sc->num_replies);
1350
1351 rsize = sc->replyframesz * num_replies;
1352 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1353 4, 0, /* algnmnt, boundary */
1354 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1355 BUS_SPACE_MAXADDR, /* highaddr */
1356 NULL, NULL, /* filter, filterarg */
1357 rsize, /* maxsize */
1358 1, /* nsegments */
1359 rsize, /* maxsegsize */
1360 0, /* flags */
1361 NULL, NULL, /* lockfunc, lockarg */
1362 &sc->reply_dmat)) {
1363 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies DMA tag\n");
1364 return (ENOMEM);
1365 }
1366 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1367 BUS_DMA_NOWAIT, &sc->reply_map)) {
1368 mps_dprint(sc, MPS_ERROR, "Cannot allocate replies memory\n");
1369 return (ENOMEM);
1370 }
1371 bzero(sc->reply_frames, rsize);
1372 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1373 mps_memaddr_cb, &sc->reply_busaddr, 0);
1374
1375 mps_dprint(sc, MPS_INIT, "reply frames busaddr= %#016jx size= %d\n",
1376 (uintmax_t)sc->reply_busaddr, rsize);
1377
1378 return (0);
1379 }
1380
1381 static void
mps_load_chains_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)1382 mps_load_chains_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1383 {
1384 struct mps_softc *sc = arg;
1385 struct mps_chain *chain;
1386 bus_size_t bo;
1387 int i, o, s;
1388
1389 if (error != 0)
1390 return;
1391
1392 for (i = 0, o = 0, s = 0; s < nsegs; s++) {
1393 for (bo = 0; bo + sc->reqframesz <= segs[s].ds_len;
1394 bo += sc->reqframesz) {
1395 chain = &sc->chains[i++];
1396 chain->chain =(MPI2_SGE_IO_UNION *)(sc->chain_frames+o);
1397 chain->chain_busaddr = segs[s].ds_addr + bo;
1398 o += sc->reqframesz;
1399 mps_free_chain(sc, chain);
1400 }
1401 if (bo != segs[s].ds_len)
1402 o += segs[s].ds_len - bo;
1403 }
1404 sc->chain_free_lowwater = i;
1405 }
1406
1407 static int
mps_alloc_requests(struct mps_softc * sc)1408 mps_alloc_requests(struct mps_softc *sc)
1409 {
1410 struct mps_command *cm;
1411 int i, rsize, nsegs;
1412
1413 rsize = sc->reqframesz * sc->num_reqs;
1414 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1415 16, 0, /* algnmnt, boundary */
1416 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1417 BUS_SPACE_MAXADDR, /* highaddr */
1418 NULL, NULL, /* filter, filterarg */
1419 rsize, /* maxsize */
1420 1, /* nsegments */
1421 rsize, /* maxsegsize */
1422 0, /* flags */
1423 NULL, NULL, /* lockfunc, lockarg */
1424 &sc->req_dmat)) {
1425 mps_dprint(sc, MPS_ERROR, "Cannot allocate request DMA tag\n");
1426 return (ENOMEM);
1427 }
1428 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1429 BUS_DMA_NOWAIT, &sc->req_map)) {
1430 mps_dprint(sc, MPS_ERROR, "Cannot allocate request memory\n");
1431 return (ENOMEM);
1432 }
1433 bzero(sc->req_frames, rsize);
1434 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1435 mps_memaddr_cb, &sc->req_busaddr, 0);
1436 mps_dprint(sc, MPS_INIT, "request frames busaddr= %#016jx size= %d\n",
1437 (uintmax_t)sc->req_busaddr, rsize);
1438
1439 sc->chains = malloc(sizeof(struct mps_chain) * sc->num_chains, M_MPT2,
1440 M_NOWAIT | M_ZERO);
1441 if (!sc->chains) {
1442 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n");
1443 return (ENOMEM);
1444 }
1445 rsize = sc->reqframesz * sc->num_chains;
1446 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1447 16, 0, /* algnmnt, boundary */
1448 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1449 BUS_SPACE_MAXADDR, /* highaddr */
1450 NULL, NULL, /* filter, filterarg */
1451 rsize, /* maxsize */
1452 howmany(rsize, PAGE_SIZE), /* nsegments */
1453 rsize, /* maxsegsize */
1454 0, /* flags */
1455 NULL, NULL, /* lockfunc, lockarg */
1456 &sc->chain_dmat)) {
1457 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain DMA tag\n");
1458 return (ENOMEM);
1459 }
1460 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1461 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->chain_map)) {
1462 mps_dprint(sc, MPS_ERROR, "Cannot allocate chain memory\n");
1463 return (ENOMEM);
1464 }
1465 if (bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames,
1466 rsize, mps_load_chains_cb, sc, BUS_DMA_NOWAIT)) {
1467 mps_dprint(sc, MPS_ERROR, "Cannot load chain memory\n");
1468 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
1469 sc->chain_map);
1470 return (ENOMEM);
1471 }
1472
1473 rsize = MPS_SENSE_LEN * sc->num_reqs;
1474 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1475 1, 0, /* algnmnt, boundary */
1476 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1477 BUS_SPACE_MAXADDR, /* highaddr */
1478 NULL, NULL, /* filter, filterarg */
1479 rsize, /* maxsize */
1480 1, /* nsegments */
1481 rsize, /* maxsegsize */
1482 0, /* flags */
1483 NULL, NULL, /* lockfunc, lockarg */
1484 &sc->sense_dmat)) {
1485 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense DMA tag\n");
1486 return (ENOMEM);
1487 }
1488 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1489 BUS_DMA_NOWAIT, &sc->sense_map)) {
1490 mps_dprint(sc, MPS_ERROR, "Cannot allocate sense memory\n");
1491 return (ENOMEM);
1492 }
1493 bzero(sc->sense_frames, rsize);
1494 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1495 mps_memaddr_cb, &sc->sense_busaddr, 0);
1496 mps_dprint(sc, MPS_INIT, "sense frames busaddr= %#016jx size= %d\n",
1497 (uintmax_t)sc->sense_busaddr, rsize);
1498
1499 nsegs = (sc->maxio / PAGE_SIZE) + 1;
1500 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
1501 1, 0, /* algnmnt, boundary */
1502 BUS_SPACE_MAXADDR, /* lowaddr */
1503 BUS_SPACE_MAXADDR, /* highaddr */
1504 NULL, NULL, /* filter, filterarg */
1505 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1506 nsegs, /* nsegments */
1507 BUS_SPACE_MAXSIZE_24BIT,/* maxsegsize */
1508 BUS_DMA_ALLOCNOW, /* flags */
1509 busdma_lock_mutex, /* lockfunc */
1510 &sc->mps_mtx, /* lockarg */
1511 &sc->buffer_dmat)) {
1512 mps_dprint(sc, MPS_ERROR, "Cannot allocate buffer DMA tag\n");
1513 return (ENOMEM);
1514 }
1515
1516 /*
1517 * SMID 0 cannot be used as a free command per the firmware spec.
1518 * Just drop that command instead of risking accounting bugs.
1519 */
1520 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
1521 M_MPT2, M_WAITOK | M_ZERO);
1522 for (i = 1; i < sc->num_reqs; i++) {
1523 cm = &sc->commands[i];
1524 cm->cm_req = sc->req_frames + i * sc->reqframesz;
1525 cm->cm_req_busaddr = sc->req_busaddr + i * sc->reqframesz;
1526 cm->cm_sense = &sc->sense_frames[i];
1527 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
1528 cm->cm_desc.Default.SMID = i;
1529 cm->cm_sc = sc;
1530 cm->cm_state = MPS_CM_STATE_BUSY;
1531 TAILQ_INIT(&cm->cm_chain_list);
1532 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
1533
1534 /* XXX Is a failure here a critical problem? */
1535 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1536 if (i <= sc->num_prireqs)
1537 mps_free_high_priority_command(sc, cm);
1538 else
1539 mps_free_command(sc, cm);
1540 else {
1541 panic("failed to allocate command %d\n", i);
1542 sc->num_reqs = i;
1543 break;
1544 }
1545 }
1546
1547 return (0);
1548 }
1549
1550 static int
mps_init_queues(struct mps_softc * sc)1551 mps_init_queues(struct mps_softc *sc)
1552 {
1553 int i;
1554
1555 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1556
1557 /*
1558 * According to the spec, we need to use one less reply than we
1559 * have space for on the queue. So sc->num_replies (the number we
1560 * use) should be less than sc->fqdepth (allocated size).
1561 */
1562 if (sc->num_replies >= sc->fqdepth)
1563 return (EINVAL);
1564
1565 /*
1566 * Initialize all of the free queue entries.
1567 */
1568 for (i = 0; i < sc->fqdepth; i++)
1569 sc->free_queue[i] = sc->reply_busaddr + (i * sc->replyframesz);
1570 sc->replyfreeindex = sc->num_replies;
1571
1572 return (0);
1573 }
1574
1575 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
1576 * Next are the global settings, if they exist. Highest are the per-unit
1577 * settings, if they exist.
1578 */
1579 void
mps_get_tunables(struct mps_softc * sc)1580 mps_get_tunables(struct mps_softc *sc)
1581 {
1582 char tmpstr[80], mps_debug[80];
1583
1584 /* XXX default to some debugging for now */
1585 sc->mps_debug = MPS_INFO|MPS_FAULT;
1586 sc->disable_msix = 0;
1587 sc->disable_msi = 0;
1588 sc->max_msix = MPS_MSIX_MAX;
1589 sc->max_chains = MPS_CHAIN_FRAMES;
1590 sc->max_io_pages = MPS_MAXIO_PAGES;
1591 sc->enable_ssu = MPS_SSU_ENABLE_SSD_DISABLE_HDD;
1592 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1593 sc->use_phynum = 1;
1594 sc->max_reqframes = MPS_REQ_FRAMES;
1595 sc->max_prireqframes = MPS_PRI_REQ_FRAMES;
1596 sc->max_replyframes = MPS_REPLY_FRAMES;
1597 sc->max_evtframes = MPS_EVT_REPLY_FRAMES;
1598
1599 /*
1600 * Grab the global variables.
1601 */
1602 bzero(mps_debug, 80);
1603 if (TUNABLE_STR_FETCH("hw.mps.debug_level", mps_debug, 80) != 0)
1604 mps_parse_debug(sc, mps_debug);
1605 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
1606 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
1607 TUNABLE_INT_FETCH("hw.mps.max_msix", &sc->max_msix);
1608 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
1609 TUNABLE_INT_FETCH("hw.mps.max_io_pages", &sc->max_io_pages);
1610 TUNABLE_INT_FETCH("hw.mps.enable_ssu", &sc->enable_ssu);
1611 TUNABLE_INT_FETCH("hw.mps.spinup_wait_time", &sc->spinup_wait_time);
1612 TUNABLE_INT_FETCH("hw.mps.use_phy_num", &sc->use_phynum);
1613 TUNABLE_INT_FETCH("hw.mps.max_reqframes", &sc->max_reqframes);
1614 TUNABLE_INT_FETCH("hw.mps.max_prireqframes", &sc->max_prireqframes);
1615 TUNABLE_INT_FETCH("hw.mps.max_replyframes", &sc->max_replyframes);
1616 TUNABLE_INT_FETCH("hw.mps.max_evtframes", &sc->max_evtframes);
1617
1618 /* Grab the unit-instance variables */
1619 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
1620 device_get_unit(sc->mps_dev));
1621 bzero(mps_debug, 80);
1622 if (TUNABLE_STR_FETCH(tmpstr, mps_debug, 80) != 0)
1623 mps_parse_debug(sc, mps_debug);
1624
1625 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
1626 device_get_unit(sc->mps_dev));
1627 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1628
1629 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
1630 device_get_unit(sc->mps_dev));
1631 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1632
1633 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_msix",
1634 device_get_unit(sc->mps_dev));
1635 TUNABLE_INT_FETCH(tmpstr, &sc->max_msix);
1636
1637 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
1638 device_get_unit(sc->mps_dev));
1639 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1640
1641 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_io_pages",
1642 device_get_unit(sc->mps_dev));
1643 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages);
1644
1645 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1646 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.exclude_ids",
1647 device_get_unit(sc->mps_dev));
1648 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1649
1650 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_ssu",
1651 device_get_unit(sc->mps_dev));
1652 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1653
1654 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.spinup_wait_time",
1655 device_get_unit(sc->mps_dev));
1656 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1657
1658 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.use_phy_num",
1659 device_get_unit(sc->mps_dev));
1660 TUNABLE_INT_FETCH(tmpstr, &sc->use_phynum);
1661
1662 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_reqframes",
1663 device_get_unit(sc->mps_dev));
1664 TUNABLE_INT_FETCH(tmpstr, &sc->max_reqframes);
1665
1666 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_prireqframes",
1667 device_get_unit(sc->mps_dev));
1668 TUNABLE_INT_FETCH(tmpstr, &sc->max_prireqframes);
1669
1670 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_replyframes",
1671 device_get_unit(sc->mps_dev));
1672 TUNABLE_INT_FETCH(tmpstr, &sc->max_replyframes);
1673
1674 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_evtframes",
1675 device_get_unit(sc->mps_dev));
1676 TUNABLE_INT_FETCH(tmpstr, &sc->max_evtframes);
1677
1678 }
1679
1680 static void
mps_setup_sysctl(struct mps_softc * sc)1681 mps_setup_sysctl(struct mps_softc *sc)
1682 {
1683 struct sysctl_ctx_list *sysctl_ctx = NULL;
1684 struct sysctl_oid *sysctl_tree = NULL;
1685 char tmpstr[80], tmpstr2[80];
1686
1687 /*
1688 * Setup the sysctl variable so the user can change the debug level
1689 * on the fly.
1690 */
1691 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
1692 device_get_unit(sc->mps_dev));
1693 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
1694
1695 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
1696 if (sysctl_ctx != NULL)
1697 sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
1698
1699 if (sysctl_tree == NULL) {
1700 sysctl_ctx_init(&sc->sysctl_ctx);
1701 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1702 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
1703 CTLFLAG_RD, 0, tmpstr);
1704 if (sc->sysctl_tree == NULL)
1705 return;
1706 sysctl_ctx = &sc->sysctl_ctx;
1707 sysctl_tree = sc->sysctl_tree;
1708 }
1709
1710 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1711 OID_AUTO, "debug_level", CTLTYPE_STRING | CTLFLAG_RW |CTLFLAG_MPSAFE,
1712 sc, 0, mps_debug_sysctl, "A", "mps debug level");
1713
1714 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1715 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1716 "Disable the use of MSI-X interrupts");
1717
1718 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1719 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1720 "Disable the use of MSI interrupts");
1721
1722 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1723 OID_AUTO, "max_msix", CTLFLAG_RD, &sc->max_msix, 0,
1724 "User-defined maximum number of MSIX queues");
1725
1726 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1727 OID_AUTO, "msix_msgs", CTLFLAG_RD, &sc->msi_msgs, 0,
1728 "Negotiated number of MSIX queues");
1729
1730 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1731 OID_AUTO, "max_reqframes", CTLFLAG_RD, &sc->max_reqframes, 0,
1732 "Total number of allocated request frames");
1733
1734 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1735 OID_AUTO, "max_prireqframes", CTLFLAG_RD, &sc->max_prireqframes, 0,
1736 "Total number of allocated high priority request frames");
1737
1738 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1739 OID_AUTO, "max_replyframes", CTLFLAG_RD, &sc->max_replyframes, 0,
1740 "Total number of allocated reply frames");
1741
1742 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1743 OID_AUTO, "max_evtframes", CTLFLAG_RD, &sc->max_evtframes, 0,
1744 "Total number of event frames allocated");
1745
1746 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1747 OID_AUTO, "firmware_version", CTLFLAG_RD, sc->fw_version,
1748 strlen(sc->fw_version), "firmware version");
1749
1750 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1751 OID_AUTO, "driver_version", CTLFLAG_RD, MPS_DRIVER_VERSION,
1752 strlen(MPS_DRIVER_VERSION), "driver version");
1753
1754 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1755 OID_AUTO, "msg_version", CTLFLAG_RD, sc->msg_version,
1756 strlen(sc->msg_version), "message interface version (deprecated)");
1757
1758 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1759 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1760 &sc->io_cmds_active, 0, "number of currently active commands");
1761
1762 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1763 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1764 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1765
1766 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1767 OID_AUTO, "chain_free", CTLFLAG_RD,
1768 &sc->chain_free, 0, "number of free chain elements");
1769
1770 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1771 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1772 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1773
1774 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1775 OID_AUTO, "max_chains", CTLFLAG_RD,
1776 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1777
1778 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1779 OID_AUTO, "max_io_pages", CTLFLAG_RD,
1780 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use "
1781 "IOCFacts)");
1782
1783 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1784 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1785 "enable SSU to SATA SSD/HDD at shutdown");
1786
1787 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1788 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1789 &sc->chain_alloc_fail, "chain allocation failures");
1790
1791 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1792 OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1793 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1794 "spinup after SATA ID error");
1795
1796 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1797 OID_AUTO, "mapping_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1798 mps_mapping_dump, "A", "Mapping Table Dump");
1799
1800 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1801 OID_AUTO, "encl_table_dump", CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
1802 mps_mapping_encl_dump, "A", "Enclosure Table Dump");
1803
1804 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1805 OID_AUTO, "dump_reqs", CTLTYPE_OPAQUE | CTLFLAG_RD | CTLFLAG_SKIP, sc, 0,
1806 mps_dump_reqs, "I", "Dump Active Requests");
1807
1808 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1809 OID_AUTO, "use_phy_num", CTLFLAG_RD, &sc->use_phynum, 0,
1810 "Use the phy number for enumeration");
1811 }
1812
1813 static struct mps_debug_string {
1814 char *name;
1815 int flag;
1816 } mps_debug_strings[] = {
1817 {"info", MPS_INFO},
1818 {"fault", MPS_FAULT},
1819 {"event", MPS_EVENT},
1820 {"log", MPS_LOG},
1821 {"recovery", MPS_RECOVERY},
1822 {"error", MPS_ERROR},
1823 {"init", MPS_INIT},
1824 {"xinfo", MPS_XINFO},
1825 {"user", MPS_USER},
1826 {"mapping", MPS_MAPPING},
1827 {"trace", MPS_TRACE}
1828 };
1829
1830 enum mps_debug_level_combiner {
1831 COMB_NONE,
1832 COMB_ADD,
1833 COMB_SUB
1834 };
1835
1836 static int
mps_debug_sysctl(SYSCTL_HANDLER_ARGS)1837 mps_debug_sysctl(SYSCTL_HANDLER_ARGS)
1838 {
1839 struct mps_softc *sc;
1840 struct mps_debug_string *string;
1841 struct sbuf *sbuf;
1842 char *buffer;
1843 size_t sz;
1844 int i, len, debug, error;
1845
1846 sc = (struct mps_softc *)arg1;
1847
1848 error = sysctl_wire_old_buffer(req, 0);
1849 if (error != 0)
1850 return (error);
1851
1852 sbuf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
1853 debug = sc->mps_debug;
1854
1855 sbuf_printf(sbuf, "%#x", debug);
1856
1857 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]);
1858 for (i = 0; i < sz; i++) {
1859 string = &mps_debug_strings[i];
1860 if (debug & string->flag)
1861 sbuf_printf(sbuf, ",%s", string->name);
1862 }
1863
1864 error = sbuf_finish(sbuf);
1865 sbuf_delete(sbuf);
1866
1867 if (error || req->newptr == NULL)
1868 return (error);
1869
1870 len = req->newlen - req->newidx;
1871 if (len == 0)
1872 return (0);
1873
1874 buffer = malloc(len, M_MPT2, M_ZERO|M_WAITOK);
1875 error = SYSCTL_IN(req, buffer, len);
1876
1877 mps_parse_debug(sc, buffer);
1878
1879 free(buffer, M_MPT2);
1880 return (error);
1881 }
1882
1883 static void
mps_parse_debug(struct mps_softc * sc,char * list)1884 mps_parse_debug(struct mps_softc *sc, char *list)
1885 {
1886 struct mps_debug_string *string;
1887 enum mps_debug_level_combiner op;
1888 char *token, *endtoken;
1889 size_t sz;
1890 int flags, i;
1891
1892 if (list == NULL || *list == '\0')
1893 return;
1894
1895 if (*list == '+') {
1896 op = COMB_ADD;
1897 list++;
1898 } else if (*list == '-') {
1899 op = COMB_SUB;
1900 list++;
1901 } else
1902 op = COMB_NONE;
1903 if (*list == '\0')
1904 return;
1905
1906 flags = 0;
1907 sz = sizeof(mps_debug_strings) / sizeof(mps_debug_strings[0]);
1908 while ((token = strsep(&list, ":,")) != NULL) {
1909
1910 /* Handle integer flags */
1911 flags |= strtol(token, &endtoken, 0);
1912 if (token != endtoken)
1913 continue;
1914
1915 /* Handle text flags */
1916 for (i = 0; i < sz; i++) {
1917 string = &mps_debug_strings[i];
1918 if (strcasecmp(token, string->name) == 0) {
1919 flags |= string->flag;
1920 break;
1921 }
1922 }
1923 }
1924
1925 switch (op) {
1926 case COMB_NONE:
1927 sc->mps_debug = flags;
1928 break;
1929 case COMB_ADD:
1930 sc->mps_debug |= flags;
1931 break;
1932 case COMB_SUB:
1933 sc->mps_debug &= (~flags);
1934 break;
1935 }
1936
1937 return;
1938 }
1939
1940 struct mps_dumpreq_hdr {
1941 uint32_t smid;
1942 uint32_t state;
1943 uint32_t numframes;
1944 uint32_t deschi;
1945 uint32_t desclo;
1946 };
1947
1948 static int
mps_dump_reqs(SYSCTL_HANDLER_ARGS)1949 mps_dump_reqs(SYSCTL_HANDLER_ARGS)
1950 {
1951 struct mps_softc *sc;
1952 struct mps_chain *chain, *chain1;
1953 struct mps_command *cm;
1954 struct mps_dumpreq_hdr hdr;
1955 struct sbuf *sb;
1956 uint32_t smid, state;
1957 int i, numreqs, error = 0;
1958
1959 sc = (struct mps_softc *)arg1;
1960
1961 if ((error = priv_check(curthread, PRIV_DRIVER)) != 0) {
1962 printf("priv check error %d\n", error);
1963 return (error);
1964 }
1965
1966 state = MPS_CM_STATE_INQUEUE;
1967 smid = 1;
1968 numreqs = sc->num_reqs;
1969
1970 if (req->newptr != NULL)
1971 return (EINVAL);
1972
1973 if (smid == 0 || smid > sc->num_reqs)
1974 return (EINVAL);
1975 if (numreqs <= 0 || (numreqs + smid > sc->num_reqs))
1976 numreqs = sc->num_reqs;
1977 sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req);
1978
1979 /* Best effort, no locking */
1980 for (i = smid; i < numreqs; i++) {
1981 cm = &sc->commands[i];
1982 if (cm->cm_state != state)
1983 continue;
1984 hdr.smid = i;
1985 hdr.state = cm->cm_state;
1986 hdr.numframes = 1;
1987 hdr.deschi = cm->cm_desc.Words.High;
1988 hdr.desclo = cm->cm_desc.Words.Low;
1989 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link,
1990 chain1)
1991 hdr.numframes++;
1992 sbuf_bcat(sb, &hdr, sizeof(hdr));
1993 sbuf_bcat(sb, cm->cm_req, 128);
1994 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link,
1995 chain1)
1996 sbuf_bcat(sb, chain->chain, 128);
1997 }
1998
1999 error = sbuf_finish(sb);
2000 sbuf_delete(sb);
2001 return (error);
2002 }
2003
2004 int
mps_attach(struct mps_softc * sc)2005 mps_attach(struct mps_softc *sc)
2006 {
2007 int error;
2008
2009 MPS_FUNCTRACE(sc);
2010 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2011
2012 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
2013 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
2014 callout_init_mtx(&sc->device_check_callout, &sc->mps_mtx, 0);
2015 TAILQ_INIT(&sc->event_list);
2016 timevalclear(&sc->lastfail);
2017
2018 if ((error = mps_transition_ready(sc)) != 0) {
2019 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to transition "
2020 "ready\n");
2021 return (error);
2022 }
2023
2024 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
2025 M_ZERO|M_NOWAIT);
2026 if(!sc->facts) {
2027 mps_dprint(sc, MPS_INIT|MPS_FAULT, "Cannot allocate memory, "
2028 "exit\n");
2029 return (ENOMEM);
2030 }
2031
2032 /*
2033 * Get IOC Facts and allocate all structures based on this information.
2034 * A Diag Reset will also call mps_iocfacts_allocate and re-read the IOC
2035 * Facts. If relevant values have changed in IOC Facts, this function
2036 * will free all of the memory based on IOC Facts and reallocate that
2037 * memory. If this fails, any allocated memory should already be freed.
2038 */
2039 if ((error = mps_iocfacts_allocate(sc, TRUE)) != 0) {
2040 mps_dprint(sc, MPS_INIT|MPS_FAULT, "IOC Facts based allocation "
2041 "failed with error %d, exit\n", error);
2042 return (error);
2043 }
2044
2045 /* Start the periodic watchdog check on the IOC Doorbell */
2046 mps_periodic(sc);
2047
2048 /*
2049 * The portenable will kick off discovery events that will drive the
2050 * rest of the initialization process. The CAM/SAS module will
2051 * hold up the boot sequence until discovery is complete.
2052 */
2053 sc->mps_ich.ich_func = mps_startup;
2054 sc->mps_ich.ich_arg = sc;
2055 if (config_intrhook_establish(&sc->mps_ich) != 0) {
2056 mps_dprint(sc, MPS_INIT|MPS_ERROR,
2057 "Cannot establish MPS config hook\n");
2058 error = EINVAL;
2059 }
2060
2061 /*
2062 * Allow IR to shutdown gracefully when shutdown occurs.
2063 */
2064 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
2065 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
2066
2067 if (sc->shutdown_eh == NULL)
2068 mps_dprint(sc, MPS_INIT|MPS_ERROR,
2069 "shutdown event registration failed\n");
2070
2071 mps_setup_sysctl(sc);
2072
2073 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
2074 mps_dprint(sc, MPS_INIT, "%s exit error= %d\n", __func__, error);
2075
2076 return (error);
2077 }
2078
2079 /* Run through any late-start handlers. */
2080 static void
mps_startup(void * arg)2081 mps_startup(void *arg)
2082 {
2083 struct mps_softc *sc;
2084
2085 sc = (struct mps_softc *)arg;
2086 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2087
2088 mps_lock(sc);
2089 mps_unmask_intr(sc);
2090
2091 /* initialize device mapping tables */
2092 mps_base_static_config_pages(sc);
2093 mps_mapping_initialize(sc);
2094 mpssas_startup(sc);
2095 mps_unlock(sc);
2096
2097 mps_dprint(sc, MPS_INIT, "disestablish config intrhook\n");
2098 config_intrhook_disestablish(&sc->mps_ich);
2099 sc->mps_ich.ich_arg = NULL;
2100
2101 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
2102 }
2103
2104 /* Periodic watchdog. Is called with the driver lock already held. */
2105 static void
mps_periodic(void * arg)2106 mps_periodic(void *arg)
2107 {
2108 struct mps_softc *sc;
2109 uint32_t db;
2110
2111 sc = (struct mps_softc *)arg;
2112 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
2113 return;
2114
2115 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
2116 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
2117 mps_dprint(sc, MPS_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
2118 mps_reinit(sc);
2119 }
2120
2121 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
2122 }
2123
2124 static void
mps_log_evt_handler(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * event)2125 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
2126 MPI2_EVENT_NOTIFICATION_REPLY *event)
2127 {
2128 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
2129
2130 MPS_DPRINT_EVENT(sc, generic, event);
2131
2132 switch (event->Event) {
2133 case MPI2_EVENT_LOG_DATA:
2134 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_DATA:\n");
2135 if (sc->mps_debug & MPS_EVENT)
2136 hexdump(event->EventData, event->EventDataLength, NULL, 0);
2137 break;
2138 case MPI2_EVENT_LOG_ENTRY_ADDED:
2139 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
2140 mps_dprint(sc, MPS_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
2141 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
2142 entry->LogSequence);
2143 break;
2144 default:
2145 break;
2146 }
2147 return;
2148 }
2149
2150 static int
mps_attach_log(struct mps_softc * sc)2151 mps_attach_log(struct mps_softc *sc)
2152 {
2153 u32 events[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
2154
2155 bzero(events, 16);
2156 setbit(events, MPI2_EVENT_LOG_DATA);
2157 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
2158
2159 mps_register_events(sc, events, mps_log_evt_handler, NULL,
2160 &sc->mps_log_eh);
2161
2162 return (0);
2163 }
2164
2165 static int
mps_detach_log(struct mps_softc * sc)2166 mps_detach_log(struct mps_softc *sc)
2167 {
2168
2169 if (sc->mps_log_eh != NULL)
2170 mps_deregister_events(sc, sc->mps_log_eh);
2171 return (0);
2172 }
2173
2174 /*
2175 * Free all of the driver resources and detach submodules. Should be called
2176 * without the lock held.
2177 */
2178 int
mps_free(struct mps_softc * sc)2179 mps_free(struct mps_softc *sc)
2180 {
2181 int error;
2182
2183 mps_dprint(sc, MPS_INIT, "%s entered\n", __func__);
2184 /* Turn off the watchdog */
2185 mps_lock(sc);
2186 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
2187 mps_unlock(sc);
2188 /* Lock must not be held for this */
2189 callout_drain(&sc->periodic);
2190 callout_drain(&sc->device_check_callout);
2191
2192 if (((error = mps_detach_log(sc)) != 0) ||
2193 ((error = mps_detach_sas(sc)) != 0)) {
2194 mps_dprint(sc, MPS_INIT|MPS_FAULT, "failed to detach "
2195 "subsystems, exit\n");
2196 return (error);
2197 }
2198
2199 mps_detach_user(sc);
2200
2201 /* Put the IOC back in the READY state. */
2202 mps_lock(sc);
2203 if ((error = mps_transition_ready(sc)) != 0) {
2204 mps_unlock(sc);
2205 return (error);
2206 }
2207 mps_unlock(sc);
2208
2209 if (sc->facts != NULL)
2210 free(sc->facts, M_MPT2);
2211
2212 /*
2213 * Free all buffers that are based on IOC Facts. A Diag Reset may need
2214 * to free these buffers too.
2215 */
2216 mps_iocfacts_free(sc);
2217
2218 if (sc->sysctl_tree != NULL)
2219 sysctl_ctx_free(&sc->sysctl_ctx);
2220
2221 /* Deregister the shutdown function */
2222 if (sc->shutdown_eh != NULL)
2223 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
2224
2225 mtx_destroy(&sc->mps_mtx);
2226 mps_dprint(sc, MPS_INIT, "%s exit\n", __func__);
2227
2228 return (0);
2229 }
2230
2231 static __inline void
mps_complete_command(struct mps_softc * sc,struct mps_command * cm)2232 mps_complete_command(struct mps_softc *sc, struct mps_command *cm)
2233 {
2234 MPS_FUNCTRACE(sc);
2235
2236 if (cm == NULL) {
2237 mps_dprint(sc, MPS_ERROR, "Completing NULL command\n");
2238 return;
2239 }
2240
2241 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
2242 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
2243
2244 if (cm->cm_complete != NULL) {
2245 mps_dprint(sc, MPS_TRACE,
2246 "%s cm %p calling cm_complete %p data %p reply %p\n",
2247 __func__, cm, cm->cm_complete, cm->cm_complete_data,
2248 cm->cm_reply);
2249 cm->cm_complete(sc, cm);
2250 }
2251
2252 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
2253 mps_dprint(sc, MPS_TRACE, "waking up %p\n", cm);
2254 wakeup(cm);
2255 }
2256
2257 if (cm->cm_sc->io_cmds_active != 0) {
2258 cm->cm_sc->io_cmds_active--;
2259 } else {
2260 mps_dprint(sc, MPS_ERROR, "Warning: io_cmds_active is "
2261 "out of sync - resynching to 0\n");
2262 }
2263 }
2264
2265
2266 static void
mps_sas_log_info(struct mps_softc * sc,u32 log_info)2267 mps_sas_log_info(struct mps_softc *sc , u32 log_info)
2268 {
2269 union loginfo_type {
2270 u32 loginfo;
2271 struct {
2272 u32 subcode:16;
2273 u32 code:8;
2274 u32 originator:4;
2275 u32 bus_type:4;
2276 } dw;
2277 };
2278 union loginfo_type sas_loginfo;
2279 char *originator_str = NULL;
2280
2281 sas_loginfo.loginfo = log_info;
2282 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
2283 return;
2284
2285 /* each nexus loss loginfo */
2286 if (log_info == 0x31170000)
2287 return;
2288
2289 /* eat the loginfos associated with task aborts */
2290 if ((log_info == 30050000 || log_info ==
2291 0x31140000 || log_info == 0x31130000))
2292 return;
2293
2294 switch (sas_loginfo.dw.originator) {
2295 case 0:
2296 originator_str = "IOP";
2297 break;
2298 case 1:
2299 originator_str = "PL";
2300 break;
2301 case 2:
2302 originator_str = "IR";
2303 break;
2304 }
2305
2306 mps_dprint(sc, MPS_LOG, "log_info(0x%08x): originator(%s), "
2307 "code(0x%02x), sub_code(0x%04x)\n", log_info,
2308 originator_str, sas_loginfo.dw.code,
2309 sas_loginfo.dw.subcode);
2310 }
2311
2312 static void
mps_display_reply_info(struct mps_softc * sc,uint8_t * reply)2313 mps_display_reply_info(struct mps_softc *sc, uint8_t *reply)
2314 {
2315 MPI2DefaultReply_t *mpi_reply;
2316 u16 sc_status;
2317
2318 mpi_reply = (MPI2DefaultReply_t*)reply;
2319 sc_status = le16toh(mpi_reply->IOCStatus);
2320 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
2321 mps_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
2322 }
2323 void
mps_intr(void * data)2324 mps_intr(void *data)
2325 {
2326 struct mps_softc *sc;
2327 uint32_t status;
2328
2329 sc = (struct mps_softc *)data;
2330 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2331
2332 /*
2333 * Check interrupt status register to flush the bus. This is
2334 * needed for both INTx interrupts and driver-driven polling
2335 */
2336 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
2337 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
2338 return;
2339
2340 mps_lock(sc);
2341 mps_intr_locked(data);
2342 mps_unlock(sc);
2343 return;
2344 }
2345
2346 /*
2347 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
2348 * chip. Hopefully this theory is correct.
2349 */
2350 void
mps_intr_msi(void * data)2351 mps_intr_msi(void *data)
2352 {
2353 struct mps_softc *sc;
2354
2355 sc = (struct mps_softc *)data;
2356 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2357 mps_lock(sc);
2358 mps_intr_locked(data);
2359 mps_unlock(sc);
2360 return;
2361 }
2362
2363 /*
2364 * The locking is overly broad and simplistic, but easy to deal with for now.
2365 */
2366 void
mps_intr_locked(void * data)2367 mps_intr_locked(void *data)
2368 {
2369 MPI2_REPLY_DESCRIPTORS_UNION *desc;
2370 MPI2_DIAG_RELEASE_REPLY *rel_rep;
2371 mps_fw_diagnostic_buffer_t *pBuffer;
2372 struct mps_softc *sc;
2373 struct mps_command *cm = NULL;
2374 uint64_t tdesc;
2375 uint8_t flags;
2376 u_int pq;
2377
2378 sc = (struct mps_softc *)data;
2379
2380 pq = sc->replypostindex;
2381 mps_dprint(sc, MPS_TRACE,
2382 "%s sc %p starting with replypostindex %u\n",
2383 __func__, sc, sc->replypostindex);
2384
2385 for ( ;; ) {
2386 cm = NULL;
2387 desc = &sc->post_queue[sc->replypostindex];
2388
2389 /*
2390 * Copy and clear out the descriptor so that any reentry will
2391 * immediately know that this descriptor has already been
2392 * looked at. There is unfortunate casting magic because the
2393 * MPI API doesn't have a cardinal 64bit type.
2394 */
2395 tdesc = 0xffffffffffffffff;
2396 tdesc = atomic_swap_64((uint64_t *)desc, tdesc);
2397 desc = (MPI2_REPLY_DESCRIPTORS_UNION *)&tdesc;
2398
2399 flags = desc->Default.ReplyFlags &
2400 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
2401 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
2402 || (le32toh(desc->Words.High) == 0xffffffff))
2403 break;
2404
2405 /* increment the replypostindex now, so that event handlers
2406 * and cm completion handlers which decide to do a diag
2407 * reset can zero it without it getting incremented again
2408 * afterwards, and we break out of this loop on the next
2409 * iteration since the reply post queue has been cleared to
2410 * 0xFF and all descriptors look unused (which they are).
2411 */
2412 if (++sc->replypostindex >= sc->pqdepth)
2413 sc->replypostindex = 0;
2414
2415 switch (flags) {
2416 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
2417 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
2418 KASSERT(cm->cm_state == MPS_CM_STATE_INQUEUE,
2419 ("command not inqueue\n"));
2420 cm->cm_state = MPS_CM_STATE_BUSY;
2421 cm->cm_reply = NULL;
2422 break;
2423 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
2424 {
2425 uint32_t baddr;
2426 uint8_t *reply;
2427
2428 /*
2429 * Re-compose the reply address from the address
2430 * sent back from the chip. The ReplyFrameAddress
2431 * is the lower 32 bits of the physical address of
2432 * particular reply frame. Convert that address to
2433 * host format, and then use that to provide the
2434 * offset against the virtual address base
2435 * (sc->reply_frames).
2436 */
2437 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
2438 reply = sc->reply_frames +
2439 (baddr - ((uint32_t)sc->reply_busaddr));
2440 /*
2441 * Make sure the reply we got back is in a valid
2442 * range. If not, go ahead and panic here, since
2443 * we'll probably panic as soon as we deference the
2444 * reply pointer anyway.
2445 */
2446 if ((reply < sc->reply_frames)
2447 || (reply > (sc->reply_frames +
2448 (sc->fqdepth * sc->replyframesz)))) {
2449 printf("%s: WARNING: reply %p out of range!\n",
2450 __func__, reply);
2451 printf("%s: reply_frames %p, fqdepth %d, "
2452 "frame size %d\n", __func__,
2453 sc->reply_frames, sc->fqdepth,
2454 sc->replyframesz);
2455 printf("%s: baddr %#x,\n", __func__, baddr);
2456 /* LSI-TODO. See Linux Code for Graceful exit */
2457 panic("Reply address out of range");
2458 }
2459 if (le16toh(desc->AddressReply.SMID) == 0) {
2460 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
2461 MPI2_FUNCTION_DIAG_BUFFER_POST) {
2462 /*
2463 * If SMID is 0 for Diag Buffer Post,
2464 * this implies that the reply is due to
2465 * a release function with a status that
2466 * the buffer has been released. Set
2467 * the buffer flags accordingly.
2468 */
2469 rel_rep =
2470 (MPI2_DIAG_RELEASE_REPLY *)reply;
2471 if ((le16toh(rel_rep->IOCStatus) &
2472 MPI2_IOCSTATUS_MASK) ==
2473 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
2474 {
2475 pBuffer =
2476 &sc->fw_diag_buffer_list[
2477 rel_rep->BufferType];
2478 pBuffer->valid_data = TRUE;
2479 pBuffer->owned_by_firmware =
2480 FALSE;
2481 pBuffer->immediate = FALSE;
2482 }
2483 } else
2484 mps_dispatch_event(sc, baddr,
2485 (MPI2_EVENT_NOTIFICATION_REPLY *)
2486 reply);
2487 } else {
2488 /*
2489 * Ignore commands not in INQUEUE state
2490 * since they've already been completed
2491 * via another path.
2492 */
2493 cm = &sc->commands[
2494 le16toh(desc->AddressReply.SMID)];
2495 if (cm->cm_state == MPS_CM_STATE_INQUEUE) {
2496 cm->cm_state = MPS_CM_STATE_BUSY;
2497 cm->cm_reply = reply;
2498 cm->cm_reply_data = le32toh(
2499 desc->AddressReply.ReplyFrameAddress);
2500 } else {
2501 mps_dprint(sc, MPS_RECOVERY,
2502 "Bad state for ADDRESS_REPLY status,"
2503 " ignoring state %d cm %p\n",
2504 cm->cm_state, cm);
2505 }
2506 }
2507 break;
2508 }
2509 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
2510 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
2511 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
2512 default:
2513 /* Unhandled */
2514 mps_dprint(sc, MPS_ERROR, "Unhandled reply 0x%x\n",
2515 desc->Default.ReplyFlags);
2516 cm = NULL;
2517 break;
2518 }
2519
2520
2521 if (cm != NULL) {
2522 // Print Error reply frame
2523 if (cm->cm_reply)
2524 mps_display_reply_info(sc,cm->cm_reply);
2525 mps_complete_command(sc, cm);
2526 }
2527 }
2528
2529 if (pq != sc->replypostindex) {
2530 mps_dprint(sc, MPS_TRACE, "%s sc %p writing postindex %d\n",
2531 __func__, sc, sc->replypostindex);
2532 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,
2533 sc->replypostindex);
2534 }
2535
2536 return;
2537 }
2538
2539 static void
mps_dispatch_event(struct mps_softc * sc,uintptr_t data,MPI2_EVENT_NOTIFICATION_REPLY * reply)2540 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
2541 MPI2_EVENT_NOTIFICATION_REPLY *reply)
2542 {
2543 struct mps_event_handle *eh;
2544 int event, handled = 0;
2545
2546 event = le16toh(reply->Event);
2547 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2548 if (isset(eh->mask, event)) {
2549 eh->callback(sc, data, reply);
2550 handled++;
2551 }
2552 }
2553
2554 if (handled == 0)
2555 mps_dprint(sc, MPS_EVENT, "Unhandled event 0x%x\n", le16toh(event));
2556
2557 /*
2558 * This is the only place that the event/reply should be freed.
2559 * Anything wanting to hold onto the event data should have
2560 * already copied it into their own storage.
2561 */
2562 mps_free_reply(sc, data);
2563 }
2564
2565 static void
mps_reregister_events_complete(struct mps_softc * sc,struct mps_command * cm)2566 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
2567 {
2568 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2569
2570 if (cm->cm_reply)
2571 MPS_DPRINT_EVENT(sc, generic,
2572 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2573
2574 mps_free_command(sc, cm);
2575
2576 /* next, send a port enable */
2577 mpssas_startup(sc);
2578 }
2579
2580 /*
2581 * For both register_events and update_events, the caller supplies a bitmap
2582 * of events that it _wants_. These functions then turn that into a bitmask
2583 * suitable for the controller.
2584 */
2585 int
mps_register_events(struct mps_softc * sc,u32 * mask,mps_evt_callback_t * cb,void * data,struct mps_event_handle ** handle)2586 mps_register_events(struct mps_softc *sc, u32 *mask,
2587 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
2588 {
2589 struct mps_event_handle *eh;
2590 int error = 0;
2591
2592 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
2593 eh->callback = cb;
2594 eh->data = data;
2595 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2596 if (mask != NULL)
2597 error = mps_update_events(sc, eh, mask);
2598 *handle = eh;
2599
2600 return (error);
2601 }
2602
2603 int
mps_update_events(struct mps_softc * sc,struct mps_event_handle * handle,u32 * mask)2604 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
2605 u32 *mask)
2606 {
2607 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2608 MPI2_EVENT_NOTIFICATION_REPLY *reply = NULL;
2609 struct mps_command *cm;
2610 int error, i;
2611
2612 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2613
2614 if ((mask != NULL) && (handle != NULL))
2615 bcopy(mask, &handle->mask[0], sizeof(u32) *
2616 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2617
2618 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2619 sc->event_mask[i] = -1;
2620
2621 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2622 sc->event_mask[i] &= ~handle->mask[i];
2623
2624
2625 if ((cm = mps_alloc_command(sc)) == NULL)
2626 return (EBUSY);
2627 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2628 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2629 evtreq->MsgFlags = 0;
2630 evtreq->SASBroadcastPrimitiveMasks = 0;
2631 #ifdef MPS_DEBUG_ALL_EVENTS
2632 {
2633 u_char fullmask[16];
2634 memset(fullmask, 0x00, 16);
2635 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2636 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2637 }
2638 #else
2639 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2640 evtreq->EventMasks[i] =
2641 htole32(sc->event_mask[i]);
2642 #endif
2643 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2644 cm->cm_data = NULL;
2645
2646 error = mps_wait_command(sc, &cm, 60, 0);
2647 if (cm != NULL)
2648 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2649 if ((reply == NULL) ||
2650 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2651 error = ENXIO;
2652
2653 if (reply)
2654 MPS_DPRINT_EVENT(sc, generic, reply);
2655
2656 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
2657
2658 if (cm != NULL)
2659 mps_free_command(sc, cm);
2660 return (error);
2661 }
2662
2663 static int
mps_reregister_events(struct mps_softc * sc)2664 mps_reregister_events(struct mps_softc *sc)
2665 {
2666 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2667 struct mps_command *cm;
2668 struct mps_event_handle *eh;
2669 int error, i;
2670
2671 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
2672
2673 /* first, reregister events */
2674
2675 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2676 sc->event_mask[i] = -1;
2677
2678 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2679 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2680 sc->event_mask[i] &= ~eh->mask[i];
2681 }
2682
2683 if ((cm = mps_alloc_command(sc)) == NULL)
2684 return (EBUSY);
2685 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2686 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2687 evtreq->MsgFlags = 0;
2688 evtreq->SASBroadcastPrimitiveMasks = 0;
2689 #ifdef MPS_DEBUG_ALL_EVENTS
2690 {
2691 u_char fullmask[16];
2692 memset(fullmask, 0x00, 16);
2693 bcopy(fullmask, &evtreq->EventMasks[0], sizeof(u32) *
2694 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS);
2695 }
2696 #else
2697 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2698 evtreq->EventMasks[i] =
2699 htole32(sc->event_mask[i]);
2700 #endif
2701 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2702 cm->cm_data = NULL;
2703 cm->cm_complete = mps_reregister_events_complete;
2704
2705 error = mps_map_command(sc, cm);
2706
2707 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__,
2708 error);
2709 return (error);
2710 }
2711
2712 void
mps_deregister_events(struct mps_softc * sc,struct mps_event_handle * handle)2713 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
2714 {
2715
2716 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2717 free(handle, M_MPT2);
2718 }
2719
2720 /*
2721 * Add a chain element as the next SGE for the specified command.
2722 * Reset cm_sge and cm_sgesize to indicate all the available space.
2723 */
2724 static int
mps_add_chain(struct mps_command * cm)2725 mps_add_chain(struct mps_command *cm)
2726 {
2727 MPI2_SGE_CHAIN32 *sgc;
2728 struct mps_chain *chain;
2729 u_int space;
2730
2731 if (cm->cm_sglsize < MPS_SGC_SIZE)
2732 panic("MPS: Need SGE Error Code\n");
2733
2734 chain = mps_alloc_chain(cm->cm_sc);
2735 if (chain == NULL)
2736 return (ENOBUFS);
2737
2738 space = cm->cm_sc->reqframesz;
2739
2740 /*
2741 * Note: a double-linked list is used to make it easier to
2742 * walk for debugging.
2743 */
2744 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2745
2746 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
2747 sgc->Length = htole16(space);
2748 sgc->NextChainOffset = 0;
2749 /* TODO Looks like bug in Setting sgc->Flags.
2750 * sgc->Flags = ( MPI2_SGE_FLAGS_CHAIN_ELEMENT | MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
2751 * MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT
2752 * This is fine.. because we are not using simple element. In case of
2753 * MPI2_SGE_CHAIN32, we have separate Length and Flags field.
2754 */
2755 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
2756 sgc->Address = htole32(chain->chain_busaddr);
2757
2758 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
2759 cm->cm_sglsize = space;
2760 return (0);
2761 }
2762
2763 /*
2764 * Add one scatter-gather element (chain, simple, transaction context)
2765 * to the scatter-gather list for a command. Maintain cm_sglsize and
2766 * cm_sge as the remaining size and pointer to the next SGE to fill
2767 * in, respectively.
2768 */
2769 int
mps_push_sge(struct mps_command * cm,void * sgep,size_t len,int segsleft)2770 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
2771 {
2772 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
2773 MPI2_SGE_SIMPLE64 *sge = sgep;
2774 int error, type;
2775 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2776
2777 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
2778
2779 #ifdef INVARIANTS
2780 switch (type) {
2781 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
2782 if (len != tc->DetailsLength + 4)
2783 panic("TC %p length %u or %zu?", tc,
2784 tc->DetailsLength + 4, len);
2785 }
2786 break;
2787 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
2788 /* Driver only uses 32-bit chain elements */
2789 if (len != MPS_SGC_SIZE)
2790 panic("CHAIN %p length %u or %zu?", sgep,
2791 MPS_SGC_SIZE, len);
2792 break;
2793 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
2794 /* Driver only uses 64-bit SGE simple elements */
2795 if (len != MPS_SGE64_SIZE)
2796 panic("SGE simple %p length %u or %zu?", sge,
2797 MPS_SGE64_SIZE, len);
2798 if (((le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT) &
2799 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
2800 panic("SGE simple %p not marked 64-bit?", sge);
2801
2802 break;
2803 default:
2804 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
2805 }
2806 #endif
2807
2808 /*
2809 * case 1: 1 more segment, enough room for it
2810 * case 2: 2 more segments, enough room for both
2811 * case 3: >=2 more segments, only enough room for 1 and a chain
2812 * case 4: >=1 more segment, enough room for only a chain
2813 * case 5: >=1 more segment, no room for anything (error)
2814 */
2815
2816 /*
2817 * There should be room for at least a chain element, or this
2818 * code is buggy. Case (5).
2819 */
2820 if (cm->cm_sglsize < MPS_SGC_SIZE)
2821 panic("MPS: Need SGE Error Code\n");
2822
2823 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
2824 /*
2825 * 1 or more segment, enough room for only a chain.
2826 * Hope the previous element wasn't a Simple entry
2827 * that needed to be marked with
2828 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
2829 */
2830 if ((error = mps_add_chain(cm)) != 0)
2831 return (error);
2832 }
2833
2834 if (segsleft >= 2 &&
2835 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
2836 /*
2837 * There are 2 or more segments left to add, and only
2838 * enough room for 1 and a chain. Case (3).
2839 *
2840 * Mark as last element in this chain if necessary.
2841 */
2842 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2843 sge->FlagsLength |= htole32(
2844 MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
2845 }
2846
2847 /*
2848 * Add the item then a chain. Do the chain now,
2849 * rather than on the next iteration, to simplify
2850 * understanding the code.
2851 */
2852 cm->cm_sglsize -= len;
2853 bcopy(sgep, cm->cm_sge, len);
2854 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2855 return (mps_add_chain(cm));
2856 }
2857
2858 #ifdef INVARIANTS
2859 /* Case 1: 1 more segment, enough room for it. */
2860 if (segsleft == 1 && cm->cm_sglsize < len)
2861 panic("1 seg left and no room? %u versus %zu",
2862 cm->cm_sglsize, len);
2863
2864 /* Case 2: 2 more segments, enough room for both */
2865 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
2866 panic("2 segs left and no room? %u versus %zu",
2867 cm->cm_sglsize, len);
2868 #endif
2869
2870 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
2871 /*
2872 * If this is a bi-directional request, need to account for that
2873 * here. Save the pre-filled sge values. These will be used
2874 * either for the 2nd SGL or for a single direction SGL. If
2875 * cm_out_len is non-zero, this is a bi-directional request, so
2876 * fill in the OUT SGL first, then the IN SGL, otherwise just
2877 * fill in the IN SGL. Note that at this time, when filling in
2878 * 2 SGL's for a bi-directional request, they both use the same
2879 * DMA buffer (same cm command).
2880 */
2881 saved_buf_len = le32toh(sge->FlagsLength) & 0x00FFFFFF;
2882 saved_address_low = sge->Address.Low;
2883 saved_address_high = sge->Address.High;
2884 if (cm->cm_out_len) {
2885 sge->FlagsLength = htole32(cm->cm_out_len |
2886 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2887 MPI2_SGE_FLAGS_END_OF_BUFFER |
2888 MPI2_SGE_FLAGS_HOST_TO_IOC |
2889 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2890 MPI2_SGE_FLAGS_SHIFT));
2891 cm->cm_sglsize -= len;
2892 bcopy(sgep, cm->cm_sge, len);
2893 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
2894 + len);
2895 }
2896 saved_buf_len |=
2897 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2898 MPI2_SGE_FLAGS_END_OF_BUFFER |
2899 MPI2_SGE_FLAGS_LAST_ELEMENT |
2900 MPI2_SGE_FLAGS_END_OF_LIST |
2901 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2902 MPI2_SGE_FLAGS_SHIFT);
2903 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
2904 saved_buf_len |=
2905 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2906 MPI2_SGE_FLAGS_SHIFT);
2907 } else {
2908 saved_buf_len |=
2909 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2910 MPI2_SGE_FLAGS_SHIFT);
2911 }
2912 sge->FlagsLength = htole32(saved_buf_len);
2913 sge->Address.Low = saved_address_low;
2914 sge->Address.High = saved_address_high;
2915 }
2916
2917 cm->cm_sglsize -= len;
2918 bcopy(sgep, cm->cm_sge, len);
2919 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2920 return (0);
2921 }
2922
2923 /*
2924 * Add one dma segment to the scatter-gather list for a command.
2925 */
2926 int
mps_add_dmaseg(struct mps_command * cm,vm_paddr_t pa,size_t len,u_int flags,int segsleft)2927 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2928 int segsleft)
2929 {
2930 MPI2_SGE_SIMPLE64 sge;
2931
2932 /*
2933 * This driver always uses 64-bit address elements for simplicity.
2934 */
2935 bzero(&sge, sizeof(sge));
2936 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2937 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2938 sge.FlagsLength = htole32(len | (flags << MPI2_SGE_FLAGS_SHIFT));
2939 mps_from_u64(pa, &sge.Address);
2940
2941 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2942 }
2943
2944 static void
mps_data_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)2945 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2946 {
2947 struct mps_softc *sc;
2948 struct mps_command *cm;
2949 u_int i, dir, sflags;
2950
2951 cm = (struct mps_command *)arg;
2952 sc = cm->cm_sc;
2953
2954 /*
2955 * In this case, just print out a warning and let the chip tell the
2956 * user they did the wrong thing.
2957 */
2958 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2959 mps_dprint(sc, MPS_ERROR,
2960 "%s: warning: busdma returned %d segments, "
2961 "more than the %d allowed\n", __func__, nsegs,
2962 cm->cm_max_segs);
2963 }
2964
2965 /*
2966 * Set up DMA direction flags. Bi-directional requests are also handled
2967 * here. In that case, both direction flags will be set.
2968 */
2969 sflags = 0;
2970 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2971 /*
2972 * We have to add a special case for SMP passthrough, there
2973 * is no easy way to generically handle it. The first
2974 * S/G element is used for the command (therefore the
2975 * direction bit needs to be set). The second one is used
2976 * for the reply. We'll leave it to the caller to make
2977 * sure we only have two buffers.
2978 */
2979 /*
2980 * Even though the busdma man page says it doesn't make
2981 * sense to have both direction flags, it does in this case.
2982 * We have one s/g element being accessed in each direction.
2983 */
2984 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2985
2986 /*
2987 * Set the direction flag on the first buffer in the SMP
2988 * passthrough request. We'll clear it for the second one.
2989 */
2990 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2991 MPI2_SGE_FLAGS_END_OF_BUFFER;
2992 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2993 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2994 dir = BUS_DMASYNC_PREWRITE;
2995 } else
2996 dir = BUS_DMASYNC_PREREAD;
2997
2998 for (i = 0; i < nsegs; i++) {
2999 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
3000 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
3001 }
3002 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
3003 sflags, nsegs - i);
3004 if (error != 0) {
3005 /* Resource shortage, roll back! */
3006 if (ratecheck(&sc->lastfail, &mps_chainfail_interval))
3007 mps_dprint(sc, MPS_INFO, "Out of chain frames, "
3008 "consider increasing hw.mps.max_chains.\n");
3009 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
3010 mps_complete_command(sc, cm);
3011 return;
3012 }
3013 }
3014
3015 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
3016 mps_enqueue_request(sc, cm);
3017
3018 return;
3019 }
3020
3021 static void
mps_data_cb2(void * arg,bus_dma_segment_t * segs,int nsegs,bus_size_t mapsize,int error)3022 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
3023 int error)
3024 {
3025 mps_data_cb(arg, segs, nsegs, error);
3026 }
3027
3028 /*
3029 * This is the routine to enqueue commands ansynchronously.
3030 * Note that the only error path here is from bus_dmamap_load(), which can
3031 * return EINPROGRESS if it is waiting for resources. Other than this, it's
3032 * assumed that if you have a command in-hand, then you have enough credits
3033 * to use it.
3034 */
3035 int
mps_map_command(struct mps_softc * sc,struct mps_command * cm)3036 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
3037 {
3038 int error = 0;
3039
3040 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
3041 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
3042 &cm->cm_uio, mps_data_cb2, cm, 0);
3043 } else if (cm->cm_flags & MPS_CM_FLAGS_USE_CCB) {
3044 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
3045 cm->cm_data, mps_data_cb, cm, 0);
3046 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
3047 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
3048 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
3049 } else {
3050 /* Add a zero-length element as needed */
3051 if (cm->cm_sge != NULL)
3052 mps_add_dmaseg(cm, 0, 0, 0, 1);
3053 mps_enqueue_request(sc, cm);
3054 }
3055
3056 return (error);
3057 }
3058
3059 /*
3060 * This is the routine to enqueue commands synchronously. An error of
3061 * EINPROGRESS from mps_map_command() is ignored since the command will
3062 * be executed and enqueued automatically. Other errors come from msleep().
3063 */
3064 int
mps_wait_command(struct mps_softc * sc,struct mps_command ** cmp,int timeout,int sleep_flag)3065 mps_wait_command(struct mps_softc *sc, struct mps_command **cmp, int timeout,
3066 int sleep_flag)
3067 {
3068 int error, rc;
3069 struct timeval cur_time, start_time;
3070 struct mps_command *cm = *cmp;
3071
3072 if (sc->mps_flags & MPS_FLAGS_DIAGRESET)
3073 return EBUSY;
3074
3075 cm->cm_complete = NULL;
3076 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
3077 error = mps_map_command(sc, cm);
3078 if ((error != 0) && (error != EINPROGRESS))
3079 return (error);
3080
3081 /*
3082 * Check for context and wait for 50 mSec at a time until time has
3083 * expired or the command has finished. If msleep can't be used, need
3084 * to poll.
3085 */
3086 if (curthread->td_no_sleeping != 0)
3087 sleep_flag = NO_SLEEP;
3088 getmicrouptime(&start_time);
3089 if (mtx_owned(&sc->mps_mtx) && sleep_flag == CAN_SLEEP) {
3090 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
3091 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
3092 if (error == EWOULDBLOCK) {
3093 /*
3094 * Record the actual elapsed time in the case of a
3095 * timeout for the message below.
3096 */
3097 getmicrouptime(&cur_time);
3098 timevalsub(&cur_time, &start_time);
3099 }
3100 } else {
3101 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
3102 mps_intr_locked(sc);
3103 if (sleep_flag == CAN_SLEEP)
3104 pause("mpswait", hz/20);
3105 else
3106 DELAY(50000);
3107
3108 getmicrouptime(&cur_time);
3109 timevalsub(&cur_time, &start_time);
3110 if (cur_time.tv_sec > timeout) {
3111 error = EWOULDBLOCK;
3112 break;
3113 }
3114 }
3115 }
3116
3117 if (error == EWOULDBLOCK) {
3118 if (cm->cm_timeout_handler == NULL) {
3119 mps_dprint(sc, MPS_FAULT, "Calling Reinit from %s, timeout=%d,"
3120 " elapsed=%jd\n", __func__, timeout,
3121 (intmax_t)cur_time.tv_sec);
3122 rc = mps_reinit(sc);
3123 mps_dprint(sc, MPS_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
3124 "failed");
3125 } else
3126 cm->cm_timeout_handler(sc, cm);
3127 if (sc->mps_flags & MPS_FLAGS_REALLOCATED) {
3128 /*
3129 * Tell the caller that we freed the command in a
3130 * reinit.
3131 */
3132 *cmp = NULL;
3133 }
3134 error = ETIMEDOUT;
3135 }
3136 return (error);
3137 }
3138
3139 /*
3140 * The MPT driver had a verbose interface for config pages. In this driver,
3141 * reduce it to much simpler terms, similar to the Linux driver.
3142 */
3143 int
mps_read_config_page(struct mps_softc * sc,struct mps_config_params * params)3144 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
3145 {
3146 MPI2_CONFIG_REQUEST *req;
3147 struct mps_command *cm;
3148 int error;
3149
3150 if (sc->mps_flags & MPS_FLAGS_BUSY) {
3151 return (EBUSY);
3152 }
3153
3154 cm = mps_alloc_command(sc);
3155 if (cm == NULL) {
3156 return (EBUSY);
3157 }
3158
3159 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
3160 req->Function = MPI2_FUNCTION_CONFIG;
3161 req->Action = params->action;
3162 req->SGLFlags = 0;
3163 req->ChainOffset = 0;
3164 req->PageAddress = params->page_address;
3165 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
3166 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
3167
3168 hdr = ¶ms->hdr.Ext;
3169 req->ExtPageType = hdr->ExtPageType;
3170 req->ExtPageLength = hdr->ExtPageLength;
3171 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
3172 req->Header.PageLength = 0; /* Must be set to zero */
3173 req->Header.PageNumber = hdr->PageNumber;
3174 req->Header.PageVersion = hdr->PageVersion;
3175 } else {
3176 MPI2_CONFIG_PAGE_HEADER *hdr;
3177
3178 hdr = ¶ms->hdr.Struct;
3179 req->Header.PageType = hdr->PageType;
3180 req->Header.PageNumber = hdr->PageNumber;
3181 req->Header.PageLength = hdr->PageLength;
3182 req->Header.PageVersion = hdr->PageVersion;
3183 }
3184
3185 cm->cm_data = params->buffer;
3186 cm->cm_length = params->length;
3187 if (cm->cm_data != NULL) {
3188 cm->cm_sge = &req->PageBufferSGE;
3189 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
3190 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
3191 } else
3192 cm->cm_sge = NULL;
3193 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
3194
3195 cm->cm_complete_data = params;
3196 if (params->callback != NULL) {
3197 cm->cm_complete = mps_config_complete;
3198 return (mps_map_command(sc, cm));
3199 } else {
3200 error = mps_wait_command(sc, &cm, 0, CAN_SLEEP);
3201 if (error) {
3202 mps_dprint(sc, MPS_FAULT,
3203 "Error %d reading config page\n", error);
3204 if (cm != NULL)
3205 mps_free_command(sc, cm);
3206 return (error);
3207 }
3208 mps_config_complete(sc, cm);
3209 }
3210
3211 return (0);
3212 }
3213
3214 int
mps_write_config_page(struct mps_softc * sc,struct mps_config_params * params)3215 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
3216 {
3217 return (EINVAL);
3218 }
3219
3220 static void
mps_config_complete(struct mps_softc * sc,struct mps_command * cm)3221 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
3222 {
3223 MPI2_CONFIG_REPLY *reply;
3224 struct mps_config_params *params;
3225
3226 MPS_FUNCTRACE(sc);
3227 params = cm->cm_complete_data;
3228
3229 if (cm->cm_data != NULL) {
3230 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
3231 BUS_DMASYNC_POSTREAD);
3232 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
3233 }
3234
3235 /*
3236 * XXX KDM need to do more error recovery? This results in the
3237 * device in question not getting probed.
3238 */
3239 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
3240 params->status = MPI2_IOCSTATUS_BUSY;
3241 goto done;
3242 }
3243
3244 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
3245 if (reply == NULL) {
3246 params->status = MPI2_IOCSTATUS_BUSY;
3247 goto done;
3248 }
3249 params->status = reply->IOCStatus;
3250 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
3251 params->hdr.Ext.ExtPageType = reply->ExtPageType;
3252 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
3253 params->hdr.Ext.PageType = reply->Header.PageType;
3254 params->hdr.Ext.PageNumber = reply->Header.PageNumber;
3255 params->hdr.Ext.PageVersion = reply->Header.PageVersion;
3256 } else {
3257 params->hdr.Struct.PageType = reply->Header.PageType;
3258 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
3259 params->hdr.Struct.PageLength = reply->Header.PageLength;
3260 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
3261 }
3262
3263 done:
3264 mps_free_command(sc, cm);
3265 if (params->callback != NULL)
3266 params->callback(sc, params);
3267
3268 return;
3269 }
3270