1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2009 Yahoo! Inc.
5 * Copyright (c) 2011-2015 LSI Corp.
6 * Copyright (c) 2013-2015 Avago Technologies
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
31 *
32 * $FreeBSD: stable/12/sys/dev/mps/mpsvar.h 373239 2023-10-05 20:37:12Z asomers $
33 */
34
35 #ifndef _MPSVAR_H
36 #define _MPSVAR_H
37
38 #define MPS_DRIVER_VERSION "21.02.00.00-fbsd"
39
40 #define MPS_DB_MAX_WAIT 2500
41
42 #define MPS_REQ_FRAMES 2048
43 #define MPS_PRI_REQ_FRAMES 128
44 #define MPS_EVT_REPLY_FRAMES 32
45 #define MPS_REPLY_FRAMES MPS_REQ_FRAMES
46 #define MPS_CHAIN_FRAMES 16384
47 #define MPS_MAXIO_PAGES (-1)
48 #define MPS_SENSE_LEN SSD_FULL_SIZE
49 #define MPS_MSI_MAX 1
50 #define MPS_MSIX_MAX 16
51 #define MPS_SGE64_SIZE 12
52 #define MPS_SGE32_SIZE 8
53 #define MPS_SGC_SIZE 8
54
55 #define CAN_SLEEP 1
56 #define NO_SLEEP 0
57
58 #define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
59 #define MPS_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
60 #define MPS_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
61
62 #define MPS_SCSI_RI_INVALID_FRAME (0x00000002)
63
64 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
65
66 #include <sys/endian.h>
67
68 /*
69 * host mapping related macro definitions
70 */
71 #define MPS_MAPTABLE_BAD_IDX 0xFFFFFFFF
72 #define MPS_DPM_BAD_IDX 0xFFFF
73 #define MPS_ENCTABLE_BAD_IDX 0xFF
74 #define MPS_MAX_MISSING_COUNT 0x0F
75 #define MPS_DEV_RESERVED 0x20000000
76 #define MPS_MAP_IN_USE 0x10000000
77 #define MPS_MAP_BAD_ID 0xFFFFFFFF
78
79 /*
80 * WarpDrive controller
81 */
82 #define MPS_CHIP_WD_DEVICE_ID 0x007E
83 #define MPS_WD_LSI_OEM 0x80
84 #define MPS_WD_HIDE_EXPOSE_MASK 0x03
85 #define MPS_WD_HIDE_ALWAYS 0x00
86 #define MPS_WD_EXPOSE_ALWAYS 0x01
87 #define MPS_WD_HIDE_IF_VOLUME 0x02
88 #define MPS_WD_RETRY 0x01
89 #define MPS_MAN_PAGE10_SIZE 0x5C /* Hardcode for now */
90 #define MPS_MAX_DISKS_IN_VOL 10
91
92 /*
93 * WarpDrive Event Logging
94 */
95 #define MPI2_WD_LOG_ENTRY 0x8002
96 #define MPI2_WD_SSD_THROTTLING 0x0041
97 #define MPI2_WD_DRIVE_LIFE_WARN 0x0043
98 #define MPI2_WD_DRIVE_LIFE_DEAD 0x0044
99 #define MPI2_WD_RAIL_MON_FAIL 0x004D
100
101 typedef uint8_t u8;
102 typedef uint16_t u16;
103 typedef uint32_t u32;
104 typedef uint64_t u64;
105
106 /**
107 * struct dev_mapping_table - device mapping information
108 * @physical_id: SAS address for drives or WWID for RAID volumes
109 * @device_info: bitfield provides detailed info about the device
110 * @phy_bits: bitfields indicating controller phys
111 * @dpm_entry_num: index of this device in device persistent map table
112 * @dev_handle: device handle for the device pointed by this entry
113 * @id: target id
114 * @missing_count: number of times the device not detected by driver
115 * @hide_flag: Hide this physical disk/not (foreign configuration)
116 * @init_complete: Whether the start of the day checks completed or not
117 */
118 struct dev_mapping_table {
119 u64 physical_id;
120 u32 device_info;
121 u32 phy_bits;
122 u16 dpm_entry_num;
123 u16 dev_handle;
124 u16 reserved1;
125 u16 id;
126 u8 missing_count;
127 u8 init_complete;
128 u8 TLR_bits;
129 u8 reserved2;
130 };
131
132 /**
133 * struct enc_mapping_table - mapping information about an enclosure
134 * @enclosure_id: Logical ID of this enclosure
135 * @start_index: index to the entry in dev_mapping_table
136 * @phy_bits: bitfields indicating controller phys
137 * @dpm_entry_num: index of this enclosure in device persistent map table
138 * @enc_handle: device handle for the enclosure pointed by this entry
139 * @num_slots: number of slots in the enclosure
140 * @start_slot: Starting slot id
141 * @missing_count: number of times the device not detected by driver
142 * @removal_flag: used to mark the device for removal
143 * @skip_search: used as a flag to include/exclude enclosure for search
144 * @init_complete: Whether the start of the day checks completed or not
145 */
146 struct enc_mapping_table {
147 u64 enclosure_id;
148 u32 start_index;
149 u32 phy_bits;
150 u16 dpm_entry_num;
151 u16 enc_handle;
152 u16 num_slots;
153 u16 start_slot;
154 u8 missing_count;
155 u8 removal_flag;
156 u8 skip_search;
157 u8 init_complete;
158 };
159
160 /**
161 * struct map_removal_table - entries to be removed from mapping table
162 * @dpm_entry_num: index of this device in device persistent map table
163 * @dev_handle: device handle for the device pointed by this entry
164 */
165 struct map_removal_table{
166 u16 dpm_entry_num;
167 u16 dev_handle;
168 };
169
170 typedef struct mps_fw_diagnostic_buffer {
171 size_t size;
172 uint8_t extended_type;
173 uint8_t buffer_type;
174 uint8_t force_release;
175 uint32_t product_specific[23];
176 uint8_t immediate;
177 uint8_t enabled;
178 uint8_t valid_data;
179 uint8_t owned_by_firmware;
180 uint32_t unique_id;
181 } mps_fw_diagnostic_buffer_t;
182
183 struct mps_softc;
184 struct mps_command;
185 struct mpssas_softc;
186 union ccb;
187 struct mpssas_target;
188 struct mps_column_map;
189
190 MALLOC_DECLARE(M_MPT2);
191
192 typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t,
193 MPI2_EVENT_NOTIFICATION_REPLY *reply);
194 typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm);
195
196 struct mps_chain {
197 TAILQ_ENTRY(mps_chain) chain_link;
198 MPI2_SGE_IO_UNION *chain;
199 uint32_t chain_busaddr;
200 };
201
202 /*
203 * This needs to be at least 2 to support SMP passthrough.
204 */
205 #define MPS_IOVEC_COUNT 2
206
207 struct mps_command {
208 TAILQ_ENTRY(mps_command) cm_link;
209 TAILQ_ENTRY(mps_command) cm_recovery;
210 struct mps_softc *cm_sc;
211 union ccb *cm_ccb;
212 void *cm_data;
213 u_int cm_length;
214 u_int cm_out_len;
215 struct uio cm_uio;
216 struct iovec cm_iovec[MPS_IOVEC_COUNT];
217 u_int cm_max_segs;
218 u_int cm_sglsize;
219 MPI2_SGE_IO_UNION *cm_sge;
220 uint8_t *cm_req;
221 uint8_t *cm_reply;
222 uint32_t cm_reply_data;
223 mps_command_callback_t *cm_complete;
224 void *cm_complete_data;
225 struct mpssas_target *cm_targ;
226 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
227 u_int cm_lun;
228 u_int cm_flags;
229 #define MPS_CM_FLAGS_POLLED (1 << 0)
230 #define MPS_CM_FLAGS_COMPLETE (1 << 1)
231 #define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2)
232 #define MPS_CM_FLAGS_DATAOUT (1 << 3)
233 #define MPS_CM_FLAGS_DATAIN (1 << 4)
234 #define MPS_CM_FLAGS_WAKEUP (1 << 5)
235 #define MPS_CM_FLAGS_DD_IO (1 << 6)
236 #define MPS_CM_FLAGS_USE_UIO (1 << 7)
237 #define MPS_CM_FLAGS_SMP_PASS (1 << 8)
238 #define MPS_CM_FLAGS_CHAIN_FAILED (1 << 9)
239 #define MPS_CM_FLAGS_ERROR_MASK MPS_CM_FLAGS_CHAIN_FAILED
240 #define MPS_CM_FLAGS_USE_CCB (1 << 10)
241 #define MPS_CM_FLAGS_SATA_ID_TIMEOUT (1 << 11)
242 #define MPS_CM_FLAGS_ON_RECOVERY (1 << 12)
243 #define MPS_CM_FLAGS_TIMEDOUT (1 << 13)
244 u_int cm_state;
245 #define MPS_CM_STATE_FREE 0
246 #define MPS_CM_STATE_BUSY 1
247 #define MPS_CM_STATE_INQUEUE 2
248 bus_dmamap_t cm_dmamap;
249 struct scsi_sense_data *cm_sense;
250 TAILQ_HEAD(, mps_chain) cm_chain_list;
251 uint32_t cm_req_busaddr;
252 uint32_t cm_sense_busaddr;
253 struct callout cm_callout;
254 mps_command_callback_t *cm_timeout_handler;
255 };
256
257 struct mps_column_map {
258 uint16_t dev_handle;
259 uint8_t phys_disk_num;
260 };
261
262 struct mps_event_handle {
263 TAILQ_ENTRY(mps_event_handle) eh_list;
264 mps_evt_callback_t *callback;
265 void *data;
266 u32 mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
267 };
268
269 struct mps_busdma_context {
270 int completed;
271 int abandoned;
272 int error;
273 bus_addr_t *addr;
274 struct mps_softc *softc;
275 bus_dmamap_t buffer_dmamap;
276 bus_dma_tag_t buffer_dmat;
277 };
278
279 struct mps_queue {
280 struct mps_softc *sc;
281 int qnum;
282 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
283 int replypostindex;
284 #ifdef notyet
285 ck_ring_buffer_t *ringmem;
286 ck_ring_buffer_t *chainmem;
287 ck_ring_t req_ring;
288 ck_ring_t chain_ring;
289 #endif
290 bus_dma_tag_t buffer_dmat;
291 int io_cmds_highwater;
292 int chain_free_lowwater;
293 int chain_alloc_fail;
294 struct resource *irq;
295 void *intrhand;
296 int irq_rid;
297 };
298
299 struct mps_softc {
300 device_t mps_dev;
301 struct cdev *mps_cdev;
302 u_int mps_flags;
303 #define MPS_FLAGS_INTX (1 << 0)
304 #define MPS_FLAGS_MSI (1 << 1)
305 #define MPS_FLAGS_BUSY (1 << 2)
306 #define MPS_FLAGS_SHUTDOWN (1 << 3)
307 #define MPS_FLAGS_DIAGRESET (1 << 4)
308 #define MPS_FLAGS_ATTACH_DONE (1 << 5)
309 #define MPS_FLAGS_WD_AVAILABLE (1 << 6)
310 #define MPS_FLAGS_REALLOCATED (1 << 7)
311 u_int mps_debug;
312 u_int msi_msgs;
313 u_int reqframesz;
314 u_int replyframesz;
315 int tm_cmds_active;
316 int io_cmds_active;
317 int io_cmds_highwater;
318 int chain_free;
319 int max_chains;
320 int max_io_pages;
321 u_int maxio;
322 int chain_free_lowwater;
323 u_int enable_ssu;
324 int spinup_wait_time;
325 int use_phynum;
326 uint64_t chain_alloc_fail;
327 struct sysctl_ctx_list sysctl_ctx;
328 struct sysctl_oid *sysctl_tree;
329 char fw_version[16];
330 char msg_version[8];
331 struct mps_command *commands;
332 struct mps_chain *chains;
333 struct callout periodic;
334 struct callout device_check_callout;
335 struct mps_queue *queues;
336
337 struct mpssas_softc *sassc;
338 TAILQ_HEAD(, mps_command) req_list;
339 TAILQ_HEAD(, mps_command) high_priority_req_list;
340 TAILQ_HEAD(, mps_chain) chain_list;
341 TAILQ_HEAD(, mps_command) tm_list;
342 int replypostindex;
343 int replyfreeindex;
344
345 struct resource *mps_regs_resource;
346 bus_space_handle_t mps_bhandle;
347 bus_space_tag_t mps_btag;
348 int mps_regs_rid;
349
350 bus_dma_tag_t mps_parent_dmat;
351 bus_dma_tag_t buffer_dmat;
352
353 MPI2_IOC_FACTS_REPLY *facts;
354 int num_reqs;
355 int num_prireqs;
356 int num_replies;
357 int num_chains;
358 int fqdepth; /* Free queue */
359 int pqdepth; /* Post queue */
360
361 u32 event_mask[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
362 TAILQ_HEAD(, mps_event_handle) event_list;
363 struct mps_event_handle *mps_log_eh;
364
365 struct mtx mps_mtx;
366 struct intr_config_hook mps_ich;
367
368 uint8_t *req_frames;
369 bus_addr_t req_busaddr;
370 bus_dma_tag_t req_dmat;
371 bus_dmamap_t req_map;
372
373 uint8_t *reply_frames;
374 bus_addr_t reply_busaddr;
375 bus_dma_tag_t reply_dmat;
376 bus_dmamap_t reply_map;
377
378 struct scsi_sense_data *sense_frames;
379 bus_addr_t sense_busaddr;
380 bus_dma_tag_t sense_dmat;
381 bus_dmamap_t sense_map;
382
383 uint8_t *chain_frames;
384 bus_dma_tag_t chain_dmat;
385 bus_dmamap_t chain_map;
386
387 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
388 bus_addr_t post_busaddr;
389 uint32_t *free_queue;
390 bus_addr_t free_busaddr;
391 bus_dma_tag_t queues_dmat;
392 bus_dmamap_t queues_map;
393
394 uint8_t *fw_diag_buffer;
395 bus_addr_t fw_diag_busaddr;
396 bus_dma_tag_t fw_diag_dmat;
397 bus_dmamap_t fw_diag_map;
398
399 uint8_t ir_firmware;
400
401 /* static config pages */
402 Mpi2IOCPage8_t ioc_pg8;
403
404 /* host mapping support */
405 struct dev_mapping_table *mapping_table;
406 struct enc_mapping_table *enclosure_table;
407 struct map_removal_table *removal_table;
408 uint8_t *dpm_entry_used;
409 uint8_t *dpm_flush_entry;
410 Mpi2DriverMappingPage0_t *dpm_pg0;
411 uint16_t max_devices;
412 uint16_t max_enclosures;
413 uint16_t max_expanders;
414 uint8_t max_volumes;
415 uint8_t num_enc_table_entries;
416 uint8_t num_rsvd_entries;
417 uint16_t max_dpm_entries;
418 uint8_t is_dpm_enable;
419 uint8_t track_mapping_events;
420 uint32_t pending_map_events;
421
422 /* FW diag Buffer List */
423 mps_fw_diagnostic_buffer_t
424 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
425
426 /* Event Recording IOCTL support */
427 uint32_t events_to_record[4];
428 mps_event_entry_t recorded_events[MPS_EVENT_QUEUE_SIZE];
429 uint8_t event_index;
430 uint32_t event_number;
431
432 /* EEDP and TLR support */
433 uint8_t eedp_enabled;
434 uint8_t control_TLR;
435
436 /* Shutdown Event Handler */
437 eventhandler_tag shutdown_eh;
438
439 /* To track topo events during reset */
440 #define MPS_DIAG_RESET_TIMEOUT 300000
441 uint8_t wait_for_port_enable;
442 uint8_t port_enable_complete;
443 uint8_t msleep_fake_chan;
444
445 /* WD controller */
446 uint8_t WD_available;
447 uint8_t WD_valid_config;
448 uint8_t WD_hide_expose;
449
450 /* Direct Drive for WarpDrive */
451 uint8_t DD_num_phys_disks;
452 uint16_t DD_dev_handle;
453 uint32_t DD_stripe_size;
454 uint32_t DD_stripe_exponent;
455 uint32_t DD_block_size;
456 uint16_t DD_block_exponent;
457 uint64_t DD_max_lba;
458 struct mps_column_map DD_column_map[MPS_MAX_DISKS_IN_VOL];
459
460 /* StartStopUnit command handling at shutdown */
461 uint32_t SSU_refcount;
462 uint8_t SSU_started;
463
464 /* Configuration tunables */
465 u_int disable_msix;
466 u_int disable_msi;
467 u_int max_msix;
468 u_int max_reqframes;
469 u_int max_prireqframes;
470 u_int max_replyframes;
471 u_int max_evtframes;
472 char exclude_ids[80];
473
474 struct timeval lastfail;
475 };
476
477 struct mps_config_params {
478 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
479 u_int action;
480 u_int page_address; /* Attributes, not a phys address */
481 u_int status;
482 void *buffer;
483 u_int length;
484 int timeout;
485 void (*callback)(struct mps_softc *, struct mps_config_params *);
486 void *cbdata;
487 };
488
489 struct scsi_read_capacity_eedp
490 {
491 uint8_t addr[8];
492 uint8_t length[4];
493 uint8_t protect;
494 };
495
496 static __inline uint32_t
mps_regread(struct mps_softc * sc,uint32_t offset)497 mps_regread(struct mps_softc *sc, uint32_t offset)
498 {
499 return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset));
500 }
501
502 static __inline void
mps_regwrite(struct mps_softc * sc,uint32_t offset,uint32_t val)503 mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val)
504 {
505 bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val);
506 }
507
508 /* free_queue must have Little Endian address
509 * TODO- cm_reply_data is unwanted. We can remove it.
510 * */
511 static __inline void
mps_free_reply(struct mps_softc * sc,uint32_t busaddr)512 mps_free_reply(struct mps_softc *sc, uint32_t busaddr)
513 {
514 if (++sc->replyfreeindex >= sc->fqdepth)
515 sc->replyfreeindex = 0;
516 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
517 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
518 }
519
520 static __inline struct mps_chain *
mps_alloc_chain(struct mps_softc * sc)521 mps_alloc_chain(struct mps_softc *sc)
522 {
523 struct mps_chain *chain;
524
525 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
526 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
527 sc->chain_free--;
528 if (sc->chain_free < sc->chain_free_lowwater)
529 sc->chain_free_lowwater = sc->chain_free;
530 } else
531 sc->chain_alloc_fail++;
532 return (chain);
533 }
534
535 static __inline void
mps_free_chain(struct mps_softc * sc,struct mps_chain * chain)536 mps_free_chain(struct mps_softc *sc, struct mps_chain *chain)
537 {
538 sc->chain_free++;
539 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
540 }
541
542 static __inline void
mps_free_command(struct mps_softc * sc,struct mps_command * cm)543 mps_free_command(struct mps_softc *sc, struct mps_command *cm)
544 {
545 struct mps_chain *chain, *chain_temp;
546
547 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
548 ("state not busy: %d\n", cm->cm_state));
549
550 if (cm->cm_reply != NULL)
551 mps_free_reply(sc, cm->cm_reply_data);
552 cm->cm_reply = NULL;
553 cm->cm_flags = 0;
554 cm->cm_complete = NULL;
555 cm->cm_complete_data = NULL;
556 cm->cm_ccb = NULL;
557 cm->cm_targ = NULL;
558 cm->cm_max_segs = 0;
559 cm->cm_lun = 0;
560 cm->cm_state = MPS_CM_STATE_FREE;
561 cm->cm_data = NULL;
562 cm->cm_length = 0;
563 cm->cm_out_len = 0;
564 cm->cm_sglsize = 0;
565 cm->cm_sge = NULL;
566
567 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
568 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
569 mps_free_chain(sc, chain);
570 }
571 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
572 }
573
574 static __inline struct mps_command *
mps_alloc_command(struct mps_softc * sc)575 mps_alloc_command(struct mps_softc *sc)
576 {
577 struct mps_command *cm;
578
579 cm = TAILQ_FIRST(&sc->req_list);
580 if (cm == NULL)
581 return (NULL);
582
583 KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
584 ("mps: Allocating busy command: %d\n", cm->cm_state));
585
586 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
587 cm->cm_state = MPS_CM_STATE_BUSY;
588 cm->cm_timeout_handler = NULL;
589 return (cm);
590 }
591
592 static __inline void
mps_free_high_priority_command(struct mps_softc * sc,struct mps_command * cm)593 mps_free_high_priority_command(struct mps_softc *sc, struct mps_command *cm)
594 {
595 struct mps_chain *chain, *chain_temp;
596
597 KASSERT(cm->cm_state == MPS_CM_STATE_BUSY,
598 ("state not busy: %d\n", cm->cm_state));
599
600 if (cm->cm_reply != NULL)
601 mps_free_reply(sc, cm->cm_reply_data);
602 cm->cm_reply = NULL;
603 cm->cm_flags = 0;
604 cm->cm_complete = NULL;
605 cm->cm_complete_data = NULL;
606 cm->cm_ccb = NULL;
607 cm->cm_targ = NULL;
608 cm->cm_lun = 0;
609 cm->cm_state = MPS_CM_STATE_FREE;
610 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
611 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
612 mps_free_chain(sc, chain);
613 }
614 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
615 }
616
617 static __inline struct mps_command *
mps_alloc_high_priority_command(struct mps_softc * sc)618 mps_alloc_high_priority_command(struct mps_softc *sc)
619 {
620 struct mps_command *cm;
621
622 cm = TAILQ_FIRST(&sc->high_priority_req_list);
623 if (cm == NULL)
624 return (NULL);
625
626 KASSERT(cm->cm_state == MPS_CM_STATE_FREE,
627 ("mps: Allocating high priority busy command: %d\n", cm->cm_state));
628
629 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
630 cm->cm_state = MPS_CM_STATE_BUSY;
631 cm->cm_timeout_handler = NULL;
632 cm->cm_desc.HighPriority.RequestFlags =
633 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
634 return (cm);
635 }
636
637 static __inline void
mps_lock(struct mps_softc * sc)638 mps_lock(struct mps_softc *sc)
639 {
640 mtx_lock(&sc->mps_mtx);
641 }
642
643 static __inline void
mps_unlock(struct mps_softc * sc)644 mps_unlock(struct mps_softc *sc)
645 {
646 mtx_unlock(&sc->mps_mtx);
647 }
648
649 #define MPS_INFO (1 << 0) /* Basic info */
650 #define MPS_FAULT (1 << 1) /* Hardware faults */
651 #define MPS_EVENT (1 << 2) /* Event data from the controller */
652 #define MPS_LOG (1 << 3) /* Log data from the controller */
653 #define MPS_RECOVERY (1 << 4) /* Command error recovery tracing */
654 #define MPS_ERROR (1 << 5) /* Parameter errors, programming bugs */
655 #define MPS_INIT (1 << 6) /* Things related to system init */
656 #define MPS_XINFO (1 << 7) /* More detailed/noisy info */
657 #define MPS_USER (1 << 8) /* Trace user-generated commands */
658 #define MPS_MAPPING (1 << 9) /* Trace device mappings */
659 #define MPS_TRACE (1 << 10) /* Function-by-function trace */
660
661 #define MPS_SSU_DISABLE_SSD_DISABLE_HDD 0
662 #define MPS_SSU_ENABLE_SSD_DISABLE_HDD 1
663 #define MPS_SSU_DISABLE_SSD_ENABLE_HDD 2
664 #define MPS_SSU_ENABLE_SSD_ENABLE_HDD 3
665
666 #define mps_printf(sc, args...) \
667 device_printf((sc)->mps_dev, ##args)
668
669 #define mps_print_field(sc, msg, args...) \
670 printf("\t" msg, ##args)
671
672 #define mps_vprintf(sc, args...) \
673 do { \
674 if (bootverbose) \
675 mps_printf(sc, ##args); \
676 } while (0)
677
678 #define mps_dprint(sc, level, msg, args...) \
679 do { \
680 if ((sc)->mps_debug & (level)) \
681 device_printf((sc)->mps_dev, msg, ##args); \
682 } while (0)
683
684 #define MPS_PRINTFIELD_START(sc, tag...) \
685 mps_printf((sc), ##tag); \
686 mps_print_field((sc), ":\n")
687 #define MPS_PRINTFIELD_END(sc, tag) \
688 mps_printf((sc), tag "\n")
689 #define MPS_PRINTFIELD(sc, facts, attr, fmt) \
690 mps_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
691
692 #define MPS_FUNCTRACE(sc) \
693 mps_dprint((sc), MPS_TRACE, "%s\n", __func__)
694
695 #define CAN_SLEEP 1
696 #define NO_SLEEP 0
697
698 static __inline void
mps_from_u64(uint64_t data,U64 * mps)699 mps_from_u64(uint64_t data, U64 *mps)
700 {
701 (mps)->High = htole32((uint32_t)((data) >> 32));
702 (mps)->Low = htole32((uint32_t)((data) & 0xffffffff));
703 }
704
705 static __inline uint64_t
mps_to_u64(U64 * data)706 mps_to_u64(U64 *data)
707 {
708
709 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
710 }
711
712 static __inline void
mps_mask_intr(struct mps_softc * sc)713 mps_mask_intr(struct mps_softc *sc)
714 {
715 uint32_t mask;
716
717 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
718 mask |= MPI2_HIM_REPLY_INT_MASK;
719 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
720 }
721
722 static __inline void
mps_unmask_intr(struct mps_softc * sc)723 mps_unmask_intr(struct mps_softc *sc)
724 {
725 uint32_t mask;
726
727 mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
728 mask &= ~MPI2_HIM_REPLY_INT_MASK;
729 mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
730 }
731
732 int mps_pci_setup_interrupts(struct mps_softc *sc);
733 void mps_pci_free_interrupts(struct mps_softc *sc);
734 int mps_pci_restore(struct mps_softc *sc);
735
736 void mps_get_tunables(struct mps_softc *sc);
737 int mps_attach(struct mps_softc *sc);
738 int mps_free(struct mps_softc *sc);
739 void mps_intr(void *);
740 void mps_intr_msi(void *);
741 void mps_intr_locked(void *);
742 int mps_register_events(struct mps_softc *, u32 *, mps_evt_callback_t *,
743 void *, struct mps_event_handle **);
744 int mps_restart(struct mps_softc *);
745 int mps_update_events(struct mps_softc *, struct mps_event_handle *, u32 *);
746 void mps_deregister_events(struct mps_softc *, struct mps_event_handle *);
747 int mps_push_sge(struct mps_command *, void *, size_t, int);
748 int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int);
749 int mps_attach_sas(struct mps_softc *sc);
750 int mps_detach_sas(struct mps_softc *sc);
751 int mps_read_config_page(struct mps_softc *, struct mps_config_params *);
752 int mps_write_config_page(struct mps_softc *, struct mps_config_params *);
753 void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int );
754 void mps_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
755 void mpi_init_sge(struct mps_command *cm, void *req, void *sge);
756 int mps_attach_user(struct mps_softc *);
757 void mps_detach_user(struct mps_softc *);
758 void mpssas_record_event(struct mps_softc *sc,
759 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
760
761 int mps_map_command(struct mps_softc *sc, struct mps_command *cm);
762 int mps_wait_command(struct mps_softc *sc, struct mps_command **cm, int timeout,
763 int sleep_flag);
764
765 int mps_config_get_bios_pg3(struct mps_softc *sc, Mpi2ConfigReply_t
766 *mpi_reply, Mpi2BiosPage3_t *config_page);
767 int mps_config_get_raid_volume_pg0(struct mps_softc *sc, Mpi2ConfigReply_t
768 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
769 int mps_config_get_ioc_pg8(struct mps_softc *sc, Mpi2ConfigReply_t *,
770 Mpi2IOCPage8_t *);
771 int mps_config_get_man_pg10(struct mps_softc *sc, Mpi2ConfigReply_t *mpi_reply);
772 int mps_config_get_sas_device_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
773 Mpi2SasDevicePage0_t *, u32 , u16 );
774 int mps_config_get_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
775 Mpi2DriverMappingPage0_t *, u16 );
776 int mps_config_get_raid_volume_pg1(struct mps_softc *sc,
777 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
778 u16 handle);
779 int mps_config_get_volume_wwid(struct mps_softc *sc, u16 volume_handle,
780 u64 *wwid);
781 int mps_config_get_raid_pd_pg0(struct mps_softc *sc,
782 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
783 u32 page_address);
784 void mpssas_ir_shutdown(struct mps_softc *sc, int howto);
785
786 int mps_reinit(struct mps_softc *sc);
787 void mpssas_handle_reinit(struct mps_softc *sc);
788
789 void mps_base_static_config_pages(struct mps_softc *sc);
790 void mps_wd_config_pages(struct mps_softc *sc);
791
792 int mps_mapping_initialize(struct mps_softc *);
793 void mps_mapping_topology_change_event(struct mps_softc *,
794 Mpi2EventDataSasTopologyChangeList_t *);
795 void mps_mapping_free_memory(struct mps_softc *sc);
796 int mps_config_set_dpm_pg0(struct mps_softc *, Mpi2ConfigReply_t *,
797 Mpi2DriverMappingPage0_t *, u16 );
798 void mps_mapping_exit(struct mps_softc *);
799 void mps_mapping_check_devices(void *);
800 int mps_mapping_allocate_memory(struct mps_softc *sc);
801 unsigned int mps_mapping_get_tid(struct mps_softc *, uint64_t , u16);
802 unsigned int mps_mapping_get_tid_from_handle(struct mps_softc *sc,
803 u16 handle);
804 unsigned int mps_mapping_get_raid_tid(struct mps_softc *sc, u64 wwid,
805 u16 volHandle);
806 unsigned int mps_mapping_get_raid_tid_from_handle(struct mps_softc *sc,
807 u16 volHandle);
808 void mps_mapping_enclosure_dev_status_change_event(struct mps_softc *,
809 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
810 void mps_mapping_ir_config_change_event(struct mps_softc *sc,
811 Mpi2EventDataIrConfigChangeList_t *event_data);
812 int mps_mapping_dump(SYSCTL_HANDLER_ARGS);
813 int mps_mapping_encl_dump(SYSCTL_HANDLER_ARGS);
814
815 void mpssas_evt_handler(struct mps_softc *sc, uintptr_t data,
816 MPI2_EVENT_NOTIFICATION_REPLY *event);
817 void mpssas_prepare_remove(struct mpssas_softc *sassc, uint16_t handle);
818 void mpssas_prepare_volume_remove(struct mpssas_softc *sassc, uint16_t handle);
819 int mpssas_startup(struct mps_softc *sc);
820 struct mpssas_target * mpssas_find_target_by_handle(struct mpssas_softc *, int, uint16_t);
821 void mpssas_realloc_targets(struct mps_softc *sc, int maxtargets);
822 struct mps_command * mpssas_alloc_tm(struct mps_softc *sc);
823 void mpssas_free_tm(struct mps_softc *sc, struct mps_command *tm);
824 void mpssas_release_simq_reinit(struct mpssas_softc *sassc);
825 int mpssas_send_reset(struct mps_softc *sc, struct mps_command *tm,
826 uint8_t type);
827
828 SYSCTL_DECL(_hw_mps);
829
830 /* Compatibility shims for different OS versions */
831 #if defined(CAM_PRIORITY_XPT)
832 #define MPS_PRIORITY_XPT CAM_PRIORITY_XPT
833 #else
834 #define MPS_PRIORITY_XPT 5
835 #endif
836
837 #if __FreeBSD_version < 800107
838 // Prior to FreeBSD-8.0 scp3_flags was not defined.
839 #define spc3_flags reserved
840
841 #define SPC3_SID_PROTECT 0x01
842 #define SPC3_SID_3PC 0x08
843 #define SPC3_SID_TPGS_MASK 0x30
844 #define SPC3_SID_TPGS_IMPLICIT 0x10
845 #define SPC3_SID_TPGS_EXPLICIT 0x20
846 #define SPC3_SID_ACC 0x40
847 #define SPC3_SID_SCCS 0x80
848
849 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
850 #endif
851
852 #endif
853
854