1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2016 Avago Technologies
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
29 *
30 * $FreeBSD: stable/10/sys/dev/mpr/mprvar.h 322661 2017-08-18 15:38:08Z ken $
31 */
32
33 #ifndef _MPRVAR_H
34 #define _MPRVAR_H
35
36 #define MPR_DRIVER_VERSION "15.03.00.00-fbsd"
37
38 #define MPR_DB_MAX_WAIT 2500
39
40 #define MPR_REQ_FRAMES 1024
41 #define MPR_EVT_REPLY_FRAMES 32
42 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES
43 #define MPR_CHAIN_FRAMES 2048
44 #define MPR_MAXIO_PAGES (-1)
45 #define MPR_SENSE_LEN SSD_FULL_SIZE
46 #define MPR_MSI_COUNT 1
47 #define MPR_SGE64_SIZE 12
48 #define MPR_SGE32_SIZE 8
49 #define MPR_SGC_SIZE 8
50 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8
51 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16
52
53 /*
54 * PCIe NVMe Specific defines
55 */
56 //SLM-for now just use the same value as a SAS disk
57 #define NVME_QDEPTH MPR_REQ_FRAMES
58 #define PRP_ENTRY_SIZE 8
59 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
60 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
61 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
62 #define HOST_PAGE_SIZE_4K 12
63
64 #define MPR_FUNCTRACE(sc) \
65 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
66
67 #define CAN_SLEEP 1
68 #define NO_SLEEP 0
69
70 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
71 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
72 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
73
74 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810
75
76 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002)
77 #define MPR_STRING_LENGTH 64
78
79 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
80
81 #include <sys/endian.h>
82
83 /*
84 * host mapping related macro definitions
85 */
86 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF
87 #define MPR_DPM_BAD_IDX 0xFFFF
88 #define MPR_ENCTABLE_BAD_IDX 0xFF
89 #define MPR_MAX_MISSING_COUNT 0x0F
90 #define MPR_DEV_RESERVED 0x20000000
91 #define MPR_MAP_IN_USE 0x10000000
92 #define MPR_MAP_BAD_ID 0xFFFFFFFF
93
94 typedef uint8_t u8;
95 typedef uint16_t u16;
96 typedef uint32_t u32;
97 typedef uint64_t u64;
98
99 /**
100 * struct dev_mapping_table - device mapping information
101 * @physical_id: SAS address for drives or WWID for RAID volumes
102 * @device_info: bitfield provides detailed info about the device
103 * @phy_bits: bitfields indicating controller phys
104 * @dpm_entry_num: index of this device in device persistent map table
105 * @dev_handle: device handle for the device pointed by this entry
106 * @id: target id
107 * @missing_count: number of times the device not detected by driver
108 * @hide_flag: Hide this physical disk/not (foreign configuration)
109 * @init_complete: Whether the start of the day checks completed or not
110 * @TLR_bits: Turn TLR support on or off
111 */
112 struct dev_mapping_table {
113 u64 physical_id;
114 u32 device_info;
115 u32 phy_bits;
116 u16 dpm_entry_num;
117 u16 dev_handle;
118 u16 reserved1;
119 u16 id;
120 u8 missing_count;
121 u8 init_complete;
122 u8 TLR_bits;
123 u8 reserved2;
124 };
125
126 /**
127 * struct enc_mapping_table - mapping information about an enclosure
128 * @enclosure_id: Logical ID of this enclosure
129 * @start_index: index to the entry in dev_mapping_table
130 * @phy_bits: bitfields indicating controller phys
131 * @dpm_entry_num: index of this enclosure in device persistent map table
132 * @enc_handle: device handle for the enclosure pointed by this entry
133 * @num_slots: number of slots in the enclosure
134 * @start_slot: Starting slot id
135 * @missing_count: number of times the device not detected by driver
136 * @removal_flag: used to mark the device for removal
137 * @skip_search: used as a flag to include/exclude enclosure for search
138 * @init_complete: Whether the start of the day checks completed or not
139 */
140 struct enc_mapping_table {
141 u64 enclosure_id;
142 u32 start_index;
143 u32 phy_bits;
144 u16 dpm_entry_num;
145 u16 enc_handle;
146 u16 num_slots;
147 u16 start_slot;
148 u8 missing_count;
149 u8 removal_flag;
150 u8 skip_search;
151 u8 init_complete;
152 };
153
154 /**
155 * struct map_removal_table - entries to be removed from mapping table
156 * @dpm_entry_num: index of this device in device persistent map table
157 * @dev_handle: device handle for the device pointed by this entry
158 */
159 struct map_removal_table{
160 u16 dpm_entry_num;
161 u16 dev_handle;
162 };
163
164 typedef struct mpr_fw_diagnostic_buffer {
165 size_t size;
166 uint8_t extended_type;
167 uint8_t buffer_type;
168 uint8_t force_release;
169 uint32_t product_specific[23];
170 uint8_t immediate;
171 uint8_t enabled;
172 uint8_t valid_data;
173 uint8_t owned_by_firmware;
174 uint32_t unique_id;
175 } mpr_fw_diagnostic_buffer_t;
176
177 struct mpr_softc;
178 struct mpr_command;
179 struct mprsas_softc;
180 union ccb;
181 struct mprsas_target;
182 struct mpr_column_map;
183
184 MALLOC_DECLARE(M_MPR);
185
186 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
187 MPI2_EVENT_NOTIFICATION_REPLY *reply);
188 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
189
190 struct mpr_chain {
191 TAILQ_ENTRY(mpr_chain) chain_link;
192 void *chain;
193 uint64_t chain_busaddr;
194 };
195
196 struct mpr_prp_page {
197 TAILQ_ENTRY(mpr_prp_page) prp_page_link;
198 uint64_t *prp_page;
199 uint64_t prp_page_busaddr;
200 };
201
202 /*
203 * This needs to be at least 2 to support SMP passthrough.
204 */
205 #define MPR_IOVEC_COUNT 2
206
207 struct mpr_command {
208 TAILQ_ENTRY(mpr_command) cm_link;
209 TAILQ_ENTRY(mpr_command) cm_recovery;
210 struct mpr_softc *cm_sc;
211 union ccb *cm_ccb;
212 void *cm_data;
213 u_int cm_length;
214 u_int cm_out_len;
215 struct uio cm_uio;
216 struct iovec cm_iovec[MPR_IOVEC_COUNT];
217 u_int cm_max_segs;
218 u_int cm_sglsize;
219 void *cm_sge;
220 uint8_t *cm_req;
221 uint8_t *cm_reply;
222 uint32_t cm_reply_data;
223 mpr_command_callback_t *cm_complete;
224 void *cm_complete_data;
225 struct mprsas_target *cm_targ;
226 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
227 u_int cm_lun;
228 u_int cm_flags;
229 #define MPR_CM_FLAGS_POLLED (1 << 0)
230 #define MPR_CM_FLAGS_COMPLETE (1 << 1)
231 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2)
232 #define MPR_CM_FLAGS_DATAOUT (1 << 3)
233 #define MPR_CM_FLAGS_DATAIN (1 << 4)
234 #define MPR_CM_FLAGS_WAKEUP (1 << 5)
235 #define MPR_CM_FLAGS_USE_UIO (1 << 6)
236 #define MPR_CM_FLAGS_SMP_PASS (1 << 7)
237 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8)
238 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED
239 #define MPR_CM_FLAGS_USE_CCB (1 << 9)
240 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10)
241 u_int cm_state;
242 #define MPR_CM_STATE_FREE 0
243 #define MPR_CM_STATE_BUSY 1
244 #define MPR_CM_STATE_TIMEDOUT 2
245 bus_dmamap_t cm_dmamap;
246 struct scsi_sense_data *cm_sense;
247 uint64_t *nvme_error_response;
248 TAILQ_HEAD(, mpr_chain) cm_chain_list;
249 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list;
250 uint32_t cm_req_busaddr;
251 bus_addr_t cm_sense_busaddr;
252 struct callout cm_callout;
253 };
254
255 struct mpr_column_map {
256 uint16_t dev_handle;
257 uint8_t phys_disk_num;
258 };
259
260 struct mpr_event_handle {
261 TAILQ_ENTRY(mpr_event_handle) eh_list;
262 mpr_evt_callback_t *callback;
263 void *data;
264 uint8_t mask[16];
265 };
266
267 struct mpr_softc {
268 device_t mpr_dev;
269 struct cdev *mpr_cdev;
270 u_int mpr_flags;
271 #define MPR_FLAGS_INTX (1 << 0)
272 #define MPR_FLAGS_MSI (1 << 1)
273 #define MPR_FLAGS_BUSY (1 << 2)
274 #define MPR_FLAGS_SHUTDOWN (1 << 3)
275 #define MPR_FLAGS_DIAGRESET (1 << 4)
276 #define MPR_FLAGS_ATTACH_DONE (1 << 5)
277 #define MPR_FLAGS_GEN35_IOC (1 << 6)
278 #define MPR_FLAGS_REALLOCATED (1 << 7)
279 u_int mpr_debug;
280 u_int disable_msix;
281 u_int disable_msi;
282 int msi_msgs;
283 u_int atomic_desc_capable;
284 int tm_cmds_active;
285 int io_cmds_active;
286 int io_cmds_highwater;
287 int chain_free;
288 int max_chains;
289 int max_io_pages;
290 u_int maxio;
291 int chain_free_lowwater;
292 uint32_t chain_frame_size;
293 uint16_t chain_seg_size;
294 int prp_buffer_size;
295 int prp_pages_free;
296 int prp_pages_free_lowwater;
297 u_int enable_ssu;
298 int spinup_wait_time;
299 int use_phynum;
300 uint64_t chain_alloc_fail;
301 uint64_t prp_page_alloc_fail;
302 struct sysctl_ctx_list sysctl_ctx;
303 struct sysctl_oid *sysctl_tree;
304 char fw_version[16];
305 struct mpr_command *commands;
306 struct mpr_chain *chains;
307 struct mpr_prp_page *prps;
308 struct callout periodic;
309 struct callout device_check_callout;
310
311 struct mprsas_softc *sassc;
312 char tmp_string[MPR_STRING_LENGTH];
313 TAILQ_HEAD(, mpr_command) req_list;
314 TAILQ_HEAD(, mpr_command) high_priority_req_list;
315 TAILQ_HEAD(, mpr_chain) chain_list;
316 TAILQ_HEAD(, mpr_prp_page) prp_page_list;
317 TAILQ_HEAD(, mpr_command) tm_list;
318 int replypostindex;
319 int replyfreeindex;
320
321 struct resource *mpr_regs_resource;
322 bus_space_handle_t mpr_bhandle;
323 bus_space_tag_t mpr_btag;
324 int mpr_regs_rid;
325
326 bus_dma_tag_t mpr_parent_dmat;
327 bus_dma_tag_t buffer_dmat;
328
329 MPI2_IOC_FACTS_REPLY *facts;
330 int num_reqs;
331 int num_replies;
332 int fqdepth; /* Free queue */
333 int pqdepth; /* Post queue */
334
335 uint8_t event_mask[16];
336 TAILQ_HEAD(, mpr_event_handle) event_list;
337 struct mpr_event_handle *mpr_log_eh;
338
339 struct mtx mpr_mtx;
340 struct intr_config_hook mpr_ich;
341 struct resource *mpr_irq[MPR_MSI_COUNT];
342 void *mpr_intrhand[MPR_MSI_COUNT];
343 int mpr_irq_rid[MPR_MSI_COUNT];
344
345 uint8_t *req_frames;
346 bus_addr_t req_busaddr;
347 bus_dma_tag_t req_dmat;
348 bus_dmamap_t req_map;
349
350 uint8_t *reply_frames;
351 bus_addr_t reply_busaddr;
352 bus_dma_tag_t reply_dmat;
353 bus_dmamap_t reply_map;
354
355 struct scsi_sense_data *sense_frames;
356 bus_addr_t sense_busaddr;
357 bus_dma_tag_t sense_dmat;
358 bus_dmamap_t sense_map;
359
360 uint8_t *chain_frames;
361 bus_addr_t chain_busaddr;
362 bus_dma_tag_t chain_dmat;
363 bus_dmamap_t chain_map;
364
365 uint8_t *prp_pages;
366 bus_addr_t prp_page_busaddr;
367 bus_dma_tag_t prp_page_dmat;
368 bus_dmamap_t prp_page_map;
369
370 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
371 bus_addr_t post_busaddr;
372 uint32_t *free_queue;
373 bus_addr_t free_busaddr;
374 bus_dma_tag_t queues_dmat;
375 bus_dmamap_t queues_map;
376
377 uint8_t *fw_diag_buffer;
378 bus_addr_t fw_diag_busaddr;
379 bus_dma_tag_t fw_diag_dmat;
380 bus_dmamap_t fw_diag_map;
381
382 uint8_t ir_firmware;
383
384 /* static config pages */
385 Mpi2IOCPage8_t ioc_pg8;
386 Mpi2IOUnitPage8_t iounit_pg8;
387
388 /* host mapping support */
389 struct dev_mapping_table *mapping_table;
390 struct enc_mapping_table *enclosure_table;
391 struct map_removal_table *removal_table;
392 uint8_t *dpm_entry_used;
393 uint8_t *dpm_flush_entry;
394 Mpi2DriverMappingPage0_t *dpm_pg0;
395 uint16_t max_devices;
396 uint16_t max_enclosures;
397 uint16_t max_expanders;
398 uint8_t max_volumes;
399 uint8_t num_enc_table_entries;
400 uint8_t num_rsvd_entries;
401 uint16_t max_dpm_entries;
402 uint8_t is_dpm_enable;
403 uint8_t track_mapping_events;
404 uint32_t pending_map_events;
405
406 /* FW diag Buffer List */
407 mpr_fw_diagnostic_buffer_t
408 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
409
410 /* Event Recording IOCTL support */
411 uint32_t events_to_record[4];
412 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE];
413 uint8_t event_index;
414 uint32_t event_number;
415
416 /* EEDP and TLR support */
417 uint8_t eedp_enabled;
418 uint8_t control_TLR;
419
420 /* Shutdown Event Handler */
421 eventhandler_tag shutdown_eh;
422
423 /* To track topo events during reset */
424 #define MPR_DIAG_RESET_TIMEOUT 300000
425 uint8_t wait_for_port_enable;
426 uint8_t port_enable_complete;
427 uint8_t msleep_fake_chan;
428
429 /* StartStopUnit command handling at shutdown */
430 uint32_t SSU_refcount;
431 uint8_t SSU_started;
432
433 char exclude_ids[80];
434 struct timeval lastfail;
435 };
436
437 struct mpr_config_params {
438 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
439 u_int action;
440 u_int page_address; /* Attributes, not a phys address */
441 u_int status;
442 void *buffer;
443 u_int length;
444 int timeout;
445 void (*callback)(struct mpr_softc *, struct mpr_config_params *);
446 void *cbdata;
447 };
448
449 struct scsi_read_capacity_eedp
450 {
451 uint8_t addr[8];
452 uint8_t length[4];
453 uint8_t protect;
454 };
455
456 static __inline uint32_t
mpr_regread(struct mpr_softc * sc,uint32_t offset)457 mpr_regread(struct mpr_softc *sc, uint32_t offset)
458 {
459 return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
460 }
461
462 static __inline void
mpr_regwrite(struct mpr_softc * sc,uint32_t offset,uint32_t val)463 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
464 {
465 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
466 }
467
468 /* free_queue must have Little Endian address
469 * TODO- cm_reply_data is unwanted. We can remove it.
470 * */
471 static __inline void
mpr_free_reply(struct mpr_softc * sc,uint32_t busaddr)472 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
473 {
474 if (++sc->replyfreeindex >= sc->fqdepth)
475 sc->replyfreeindex = 0;
476 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
477 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
478 }
479
480 static __inline struct mpr_chain *
mpr_alloc_chain(struct mpr_softc * sc)481 mpr_alloc_chain(struct mpr_softc *sc)
482 {
483 struct mpr_chain *chain;
484
485 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
486 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
487 sc->chain_free--;
488 if (sc->chain_free < sc->chain_free_lowwater)
489 sc->chain_free_lowwater = sc->chain_free;
490 } else
491 sc->chain_alloc_fail++;
492 return (chain);
493 }
494
495 static __inline void
mpr_free_chain(struct mpr_softc * sc,struct mpr_chain * chain)496 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
497 {
498 #if 0
499 bzero(chain->chain, 128);
500 #endif
501 sc->chain_free++;
502 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
503 }
504
505 static __inline struct mpr_prp_page *
mpr_alloc_prp_page(struct mpr_softc * sc)506 mpr_alloc_prp_page(struct mpr_softc *sc)
507 {
508 struct mpr_prp_page *prp_page;
509
510 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) {
511 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link);
512 sc->prp_pages_free--;
513 if (sc->prp_pages_free < sc->prp_pages_free_lowwater)
514 sc->prp_pages_free_lowwater = sc->prp_pages_free;
515 } else
516 sc->prp_page_alloc_fail++;
517 return (prp_page);
518 }
519
520 static __inline void
mpr_free_prp_page(struct mpr_softc * sc,struct mpr_prp_page * prp_page)521 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page)
522 {
523 sc->prp_pages_free++;
524 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link);
525 }
526
527 static __inline void
mpr_free_command(struct mpr_softc * sc,struct mpr_command * cm)528 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
529 {
530 struct mpr_chain *chain, *chain_temp;
531 struct mpr_prp_page *prp_page, *prp_page_temp;
532
533 if (cm->cm_reply != NULL)
534 mpr_free_reply(sc, cm->cm_reply_data);
535 cm->cm_reply = NULL;
536 cm->cm_flags = 0;
537 cm->cm_complete = NULL;
538 cm->cm_complete_data = NULL;
539 cm->cm_ccb = NULL;
540 cm->cm_targ = NULL;
541 cm->cm_max_segs = 0;
542 cm->cm_lun = 0;
543 cm->cm_state = MPR_CM_STATE_FREE;
544 cm->cm_data = NULL;
545 cm->cm_length = 0;
546 cm->cm_out_len = 0;
547 cm->cm_sglsize = 0;
548 cm->cm_sge = NULL;
549
550 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
551 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
552 mpr_free_chain(sc, chain);
553 }
554 TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link,
555 prp_page_temp) {
556 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link);
557 mpr_free_prp_page(sc, prp_page);
558 }
559 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
560 }
561
562 static __inline struct mpr_command *
mpr_alloc_command(struct mpr_softc * sc)563 mpr_alloc_command(struct mpr_softc *sc)
564 {
565 struct mpr_command *cm;
566
567 cm = TAILQ_FIRST(&sc->req_list);
568 if (cm == NULL)
569 return (NULL);
570
571 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
572 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy "
573 "command\n"));
574 cm->cm_state = MPR_CM_STATE_BUSY;
575 return (cm);
576 }
577
578 static __inline void
mpr_free_high_priority_command(struct mpr_softc * sc,struct mpr_command * cm)579 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
580 {
581 struct mpr_chain *chain, *chain_temp;
582
583 if (cm->cm_reply != NULL)
584 mpr_free_reply(sc, cm->cm_reply_data);
585 cm->cm_reply = NULL;
586 cm->cm_flags = 0;
587 cm->cm_complete = NULL;
588 cm->cm_complete_data = NULL;
589 cm->cm_ccb = NULL;
590 cm->cm_targ = NULL;
591 cm->cm_lun = 0;
592 cm->cm_state = MPR_CM_STATE_FREE;
593 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
594 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
595 mpr_free_chain(sc, chain);
596 }
597 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
598 }
599
600 static __inline struct mpr_command *
mpr_alloc_high_priority_command(struct mpr_softc * sc)601 mpr_alloc_high_priority_command(struct mpr_softc *sc)
602 {
603 struct mpr_command *cm;
604
605 cm = TAILQ_FIRST(&sc->high_priority_req_list);
606 if (cm == NULL)
607 return (NULL);
608
609 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
610 KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy "
611 "command\n"));
612 cm->cm_state = MPR_CM_STATE_BUSY;
613 return (cm);
614 }
615
616 static __inline void
mpr_lock(struct mpr_softc * sc)617 mpr_lock(struct mpr_softc *sc)
618 {
619 mtx_lock(&sc->mpr_mtx);
620 }
621
622 static __inline void
mpr_unlock(struct mpr_softc * sc)623 mpr_unlock(struct mpr_softc *sc)
624 {
625 mtx_unlock(&sc->mpr_mtx);
626 }
627
628 #define MPR_INFO (1 << 0) /* Basic info */
629 #define MPR_FAULT (1 << 1) /* Hardware faults */
630 #define MPR_EVENT (1 << 2) /* Event data from the controller */
631 #define MPR_LOG (1 << 3) /* Log data from the controller */
632 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */
633 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */
634 #define MPR_INIT (1 << 6) /* Things related to system init */
635 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */
636 #define MPR_USER (1 << 8) /* Trace user-generated commands */
637 #define MPR_MAPPING (1 << 9) /* Trace device mappings */
638 #define MPR_TRACE (1 << 10) /* Function-by-function trace */
639
640 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0
641 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1
642 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2
643 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3
644
645 #define mpr_printf(sc, args...) \
646 device_printf((sc)->mpr_dev, ##args)
647
648 #define mpr_print_field(sc, msg, args...) \
649 printf("\t" msg, ##args)
650
651 #define mpr_vprintf(sc, args...) \
652 do { \
653 if (bootverbose) \
654 mpr_printf(sc, ##args); \
655 } while (0)
656
657 #define mpr_dprint(sc, level, msg, args...) \
658 do { \
659 if ((sc)->mpr_debug & (level)) \
660 device_printf((sc)->mpr_dev, msg, ##args); \
661 } while (0)
662
663 #define MPR_PRINTFIELD_START(sc, tag...) \
664 mpr_printf((sc), ##tag); \
665 mpr_print_field((sc), ":\n")
666 #define MPR_PRINTFIELD_END(sc, tag) \
667 mpr_printf((sc), tag "\n")
668 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \
669 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
670
671 static __inline void
mpr_from_u64(uint64_t data,U64 * mpr)672 mpr_from_u64(uint64_t data, U64 *mpr)
673 {
674 (mpr)->High = htole32((uint32_t)((data) >> 32));
675 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
676 }
677
678 static __inline uint64_t
mpr_to_u64(U64 * data)679 mpr_to_u64(U64 *data)
680 {
681 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
682 }
683
684 static __inline void
mpr_mask_intr(struct mpr_softc * sc)685 mpr_mask_intr(struct mpr_softc *sc)
686 {
687 uint32_t mask;
688
689 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
690 mask |= MPI2_HIM_REPLY_INT_MASK;
691 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
692 }
693
694 static __inline void
mpr_unmask_intr(struct mpr_softc * sc)695 mpr_unmask_intr(struct mpr_softc *sc)
696 {
697 uint32_t mask;
698
699 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
700 mask &= ~MPI2_HIM_REPLY_INT_MASK;
701 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
702 }
703
704 int mpr_pci_setup_interrupts(struct mpr_softc *sc);
705 int mpr_pci_restore(struct mpr_softc *sc);
706
707 void mpr_get_tunables(struct mpr_softc *sc);
708 int mpr_attach(struct mpr_softc *sc);
709 int mpr_free(struct mpr_softc *sc);
710 void mpr_intr(void *);
711 void mpr_intr_msi(void *);
712 void mpr_intr_locked(void *);
713 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
714 void *, struct mpr_event_handle **);
715 int mpr_restart(struct mpr_softc *);
716 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
717 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
718 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
719 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data,
720 uint32_t data_in_sz, uint32_t data_out_sz);
721 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
722 int mpr_push_ieee_sge(struct mpr_command *, void *, int);
723 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
724 int mpr_attach_sas(struct mpr_softc *sc);
725 int mpr_detach_sas(struct mpr_softc *sc);
726 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
727 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
728 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
729 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
730 int mpr_attach_user(struct mpr_softc *);
731 void mpr_detach_user(struct mpr_softc *);
732 void mprsas_record_event(struct mpr_softc *sc,
733 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
734
735 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
736 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout,
737 int sleep_flag);
738 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm);
739
740 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
741 *mpi_reply, Mpi2BiosPage3_t *config_page);
742 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
743 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
744 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
745 Mpi2IOCPage8_t *);
746 int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
747 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
748 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
749 Mpi2SasDevicePage0_t *, u32 , u16 );
750 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
751 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
752 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t
753 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
754 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
755 Mpi2DriverMappingPage0_t *, u16 );
756 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
757 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
758 u16 handle);
759 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
760 u64 *wwid);
761 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
762 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
763 u32 page_address);
764 void mprsas_ir_shutdown(struct mpr_softc *sc);
765
766 int mpr_reinit(struct mpr_softc *sc);
767 void mprsas_handle_reinit(struct mpr_softc *sc);
768
769 void mpr_base_static_config_pages(struct mpr_softc *sc);
770
771 int mpr_mapping_initialize(struct mpr_softc *);
772 void mpr_mapping_topology_change_event(struct mpr_softc *,
773 Mpi2EventDataSasTopologyChangeList_t *);
774 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc,
775 Mpi26EventDataPCIeTopologyChangeList_t *event_data);
776 void mpr_mapping_free_memory(struct mpr_softc *sc);
777 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
778 Mpi2DriverMappingPage0_t *, u16 );
779 void mpr_mapping_exit(struct mpr_softc *);
780 void mpr_mapping_check_devices(void *);
781 int mpr_mapping_allocate_memory(struct mpr_softc *sc);
782 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);
783 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc,
784 u16 handle);
785 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid,
786 u16 volHandle);
787 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc,
788 u16 volHandle);
789 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
790 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
791 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
792 Mpi2EventDataIrConfigChangeList_t *event_data);
793
794 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
795 MPI2_EVENT_NOTIFICATION_REPLY *event);
796 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
797 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
798 int mprsas_startup(struct mpr_softc *sc);
799 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
800 uint16_t);
801 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
802 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
803 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
804 void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
805 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
806 uint8_t type);
807
808 SYSCTL_DECL(_hw_mpr);
809
810 /* Compatibility shims for different OS versions */
811 #if __FreeBSD_version >= 800001
812 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
813 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
814 #define mpr_kproc_exit(arg) kproc_exit(arg)
815 #else
816 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
817 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
818 #define mpr_kproc_exit(arg) kthread_exit(arg)
819 #endif
820
821 #if defined(CAM_PRIORITY_XPT)
822 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT
823 #else
824 #define MPR_PRIORITY_XPT 5
825 #endif
826
827 #if __FreeBSD_version < 800107
828 // Prior to FreeBSD-8.0 scp3_flags was not defined.
829 #define spc3_flags reserved
830
831 #define SPC3_SID_PROTECT 0x01
832 #define SPC3_SID_3PC 0x08
833 #define SPC3_SID_TPGS_MASK 0x30
834 #define SPC3_SID_TPGS_IMPLICIT 0x10
835 #define SPC3_SID_TPGS_EXPLICIT 0x20
836 #define SPC3_SID_ACC 0x40
837 #define SPC3_SID_SCCS 0x80
838
839 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
840 #endif
841
842 /* Definitions for SCSI unmap translation to NVMe DSM command */
843
844 /* UNMAP block descriptor structure */
845 struct unmap_blk_desc {
846 uint64_t slba;
847 uint32_t nlb;
848 uint32_t resv;
849 };
850
851 /* UNMAP command's data */
852 struct unmap_parm_list {
853 uint16_t unmap_data_len;
854 uint16_t unmap_blk_desc_data_len;
855 uint32_t resv;
856 struct unmap_blk_desc desc[0];
857 };
858
859 /* SCSI ADDITIONAL SENSE Codes */
860 #define FIXED_SENSE_DATA 0x70
861 #define SCSI_ASC_NO_SENSE 0x00
862 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
863 #define SCSI_ASC_LUN_NOT_READY 0x04
864 #define SCSI_ASC_WARNING 0x0B
865 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
866 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
867 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
868 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
869 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
870 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
871 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
872 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
873 #define SCSI_ASC_INVALID_CDB 0x24
874 #define SCSI_ASC_INVALID_LUN 0x25
875 #define SCSI_ASC_INVALID_PARAMETER 0x26
876 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
877 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
878
879 /* SCSI ADDITIONAL SENSE Code Qualifiers */
880 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
881 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
882 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
883 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
884 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
885 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
886 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
887 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
888
889 #endif
890
891