xref: /NextBSD/sys/dev/mly/mlyvar.h (revision 4bf303e5af1834cdd3092175eeca7676420229c4)
1 /*-
2  * Copyright (c) 2000, 2001 Michael Smith
3  * Copyright (c) 2000 BSDi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *	$FreeBSD$
28  */
29 
30 /********************************************************************************
31  ********************************************************************************
32                                                      Driver Parameter Definitions
33  ********************************************************************************
34  ********************************************************************************/
35 
36 /*
37  * The firmware interface allows for a 16-bit command identifier.  A lookup
38  * table this size (256k) would be too expensive, so we cap ourselves at a
39  * reasonable limit.
40  */
41 #define MLY_MAX_COMMANDS	256	/* max commands per controller */
42 
43 /*
44  * The firmware interface allows for a 16-bit s/g list length.  We limit
45  * ourselves to a reasonable maximum and ensure alignment.
46  */
47 #define MLY_MAX_SGENTRIES	64	/* max S/G entries, limit 65535 */
48 
49 /*
50  * The interval at which we poke the controller for status updates (in seconds).
51  */
52 #define MLY_PERIODIC_INTERVAL	1
53 
54 /********************************************************************************
55  ********************************************************************************
56                                                       Cross-version Compatibility
57  ********************************************************************************
58  ********************************************************************************/
59 
60 # include <sys/taskqueue.h>
61 
62 /********************************************************************************
63  ********************************************************************************
64                                                       Driver Variable Definitions
65  ********************************************************************************
66  ********************************************************************************/
67 
68 /*
69  * Debugging levels:
70  *  0 - quiet, only emit warnings
71  *  1 - noisy, emit major function points and things done
72  *  2 - extremely noisy, emit trace items in loops, etc.
73  */
74 #ifdef MLY_DEBUG
75 # define debug(level, fmt, args...)	do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
76 # define debug_called(level)		do { if (level <= MLY_DEBUG) printf("%s: called\n", __func__); } while(0)
77 # define debug_struct(s)		printf("  SIZE %s: %d\n", #s, sizeof(struct s))
78 # define debug_union(s)			printf("  SIZE %s: %d\n", #s, sizeof(union s))
79 # define debug_field(s, f)		printf("  OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
80 extern void		mly_printstate0(void);
81 extern struct mly_softc	*mly_softc0;
82 #else
83 # define debug(level, fmt, args...)
84 # define debug_called(level)
85 # define debug_struct(s)
86 #endif
87 
88 #define mly_printf(sc, fmt, args...)	device_printf(sc->mly_dev, fmt , ##args)
89 
90 /*
91  * Per-device structure, used to save persistent state on devices.
92  *
93  * Note that this isn't really Bus/Target/Lun since we don't support
94  * lun != 0 at this time.
95  */
96 struct mly_btl {
97     int			mb_flags;
98 #define MLY_BTL_PHYSICAL	(1<<0)		/* physical device */
99 #define MLY_BTL_LOGICAL		(1<<1)		/* logical device */
100 #define MLY_BTL_PROTECTED	(1<<2)		/* device is protected - I/O not allowed */
101 #define MLY_BTL_RESCAN		(1<<3)		/* device needs to be rescanned */
102     char		mb_name[16];		/* peripheral attached to this device */
103     int			mb_state;		/* see 8.1 */
104     int			mb_type;		/* see 8.2 */
105 
106     /* physical devices only */
107     int			mb_speed;		/* interface transfer rate */
108     int			mb_width;		/* interface width */
109 };
110 
111 /*
112  * Per-command control structure.
113  */
114 struct mly_command {
115     TAILQ_ENTRY(mly_command)	mc_link;	/* list linkage */
116 
117     struct mly_softc		*mc_sc;		/* controller that owns us */
118     u_int16_t			mc_slot;	/* command slot we occupy */
119     int				mc_flags;
120 #define MLY_CMD_BUSY		(1<<0)		/* command is being run, or ready to run, or not completed */
121 #define MLY_CMD_COMPLETE	(1<<1)		/* command has been completed */
122 #define MLY_CMD_MAPPED		(1<<3)		/* command has had its data mapped */
123 #define MLY_CMD_DATAIN		(1<<4)		/* data moves controller->system */
124 #define MLY_CMD_DATAOUT		(1<<5)		/* data moves system->controller */
125 #define MLY_CMD_CCB		(1<<6)		/* data is ccb. */
126     u_int16_t			mc_status;	/* command completion status */
127     u_int8_t			mc_sense;	/* sense data length */
128     int32_t			mc_resid;	/* I/O residual count */
129 
130     union mly_command_packet	*mc_packet;	/* our controller command */
131     u_int64_t			mc_packetphys;	/* physical address of the mapped packet */
132 
133     void			*mc_data;	/* data buffer */
134     size_t			mc_length;	/* data length */
135     bus_dmamap_t		mc_datamap;	/* DMA map for data */
136 
137     void	(* mc_complete)(struct mly_command *mc);	/* completion handler */
138     void	*mc_private;					/* caller-private data */
139 
140     int				mc_timestamp;
141 };
142 
143 /*
144  * Command slot regulation.
145  *
146  * We can't use slot 0 due to the memory mailbox implementation.
147  */
148 #define MLY_SLOT_START		1
149 #define MLY_SLOT_MAX		(MLY_SLOT_START + MLY_MAX_COMMANDS)
150 
151 /*
152  * Per-controller structure.
153  */
154 struct mly_softc {
155     /* bus connections */
156     device_t		mly_dev;
157     struct cdev *mly_dev_t;
158     struct resource	*mly_regs_resource;	/* register interface window */
159     int			mly_regs_rid;		/* resource ID */
160     bus_dma_tag_t	mly_parent_dmat;	/* parent DMA tag */
161     bus_dma_tag_t	mly_buffer_dmat;	/* data buffer/command DMA tag */
162     struct resource	*mly_irq;		/* interrupt */
163     int			mly_irq_rid;
164     void		*mly_intr;		/* interrupt handle */
165 
166     /* scatter/gather lists and their controller-visible mappings */
167     struct mly_sg_entry	*mly_sg_table;		/* s/g lists */
168     u_int32_t		mly_sg_busaddr;		/* s/g table base address in bus space */
169     bus_dma_tag_t	mly_sg_dmat;		/* s/g buffer DMA tag */
170     bus_dmamap_t	mly_sg_dmamap;		/* map for s/g buffers */
171 
172     /* controller hardware interface */
173     int			mly_hwif;
174 #define MLY_HWIF_I960RX		0
175 #define MLY_HWIF_STRONGARM	1
176     u_int8_t		mly_doorbell_true;	/* xor map to make hardware doorbell 'true' bits into 1s */
177     u_int8_t		mly_command_mailbox;	/* register offsets */
178     u_int8_t		mly_status_mailbox;
179     u_int8_t		mly_idbr;
180     u_int8_t		mly_odbr;
181     u_int8_t		mly_error_status;
182     u_int8_t		mly_interrupt_status;
183     u_int8_t		mly_interrupt_mask;
184     struct mly_mmbox	*mly_mmbox;			/* kernel-space address of memory mailbox */
185     u_int64_t		mly_mmbox_busaddr;		/* bus-space address of memory mailbox */
186     bus_dma_tag_t	mly_mmbox_dmat;			/* memory mailbox DMA tag */
187     bus_dmamap_t	mly_mmbox_dmamap;		/* memory mailbox DMA map */
188     u_int32_t		mly_mmbox_command_index;	/* next index to use */
189     u_int32_t		mly_mmbox_status_index;		/* index we next expect status at */
190 
191     /* controller features, limits and status */
192     struct mtx		mly_lock;
193     int			mly_state;
194 #define	MLY_STATE_OPEN		(1<<1)
195 #define MLY_STATE_INTERRUPTS_ON	(1<<2)
196 #define MLY_STATE_MMBOX_ACTIVE	(1<<3)
197 #define MLY_STATE_CAM_FROZEN	(1<<4)
198     struct mly_ioctl_getcontrollerinfo	*mly_controllerinfo;
199     struct mly_param_controller		*mly_controllerparam;
200     struct mly_btl			mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
201 
202     /* command management */
203     struct mly_command		mly_command[MLY_MAX_COMMANDS];	/* commands */
204     union mly_command_packet	*mly_packet;		/* command packets */
205     bus_dma_tag_t		mly_packet_dmat;	/* packet DMA tag */
206     bus_dmamap_t		mly_packetmap;		/* packet DMA map */
207     u_int64_t			mly_packetphys;		/* packet array base address */
208     TAILQ_HEAD(,mly_command)	mly_free;		/* commands available for reuse */
209     TAILQ_HEAD(,mly_command)	mly_busy;
210     TAILQ_HEAD(,mly_command)	mly_complete;		/* commands which have been returned by the controller */
211     struct mly_qstat		mly_qstat[MLYQ_COUNT];	/* queue statistics */
212 
213     /* health monitoring */
214     u_int32_t			mly_event_change;	/* event status change indicator */
215     u_int32_t			mly_event_counter;	/* next event for which we anticpiate status */
216     u_int32_t			mly_event_waiting;	/* next event the controller will post status for */
217     struct callout		mly_periodic;		/* periodic event handling */
218 
219     /* CAM connection */
220     struct cam_devq		*mly_cam_devq;			/* CAM device queue */
221     struct cam_sim		*mly_cam_sim[MLY_MAX_CHANNELS];	/* CAM SIMs */
222     struct cam_path		*mly_cam_path;			/* rescan path */
223     int				mly_cam_channels;		/* total channel count */
224 
225     /* command-completion task */
226     struct task			mly_task_complete;	/* deferred-completion task */
227     int				mly_qfrzn_cnt;		/* Track simq freezes */
228 
229 #ifdef MLY_DEBUG
230     struct callout		mly_timeout;
231 #endif
232 };
233 
234 #define	MLY_LOCK(sc)		mtx_lock(&(sc)->mly_lock)
235 #define	MLY_UNLOCK(sc)		mtx_unlock(&(sc)->mly_lock)
236 #define	MLY_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->mly_lock, MA_OWNED)
237 
238 /*
239  * Register access helpers.
240  */
241 #define MLY_SET_REG(sc, reg, val)	bus_write_1(sc->mly_regs_resource, reg, val)
242 #define MLY_GET_REG(sc, reg)		bus_read_1 (sc->mly_regs_resource, reg)
243 #define MLY_GET_REG2(sc, reg)		bus_read_2 (sc->mly_regs_resource, reg)
244 #define MLY_GET_REG4(sc, reg)		bus_read_4 (sc->mly_regs_resource, reg)
245 
246 #define MLY_SET_MBOX(sc, mbox, ptr)									\
247 	do {												\
248 	    bus_write_4(sc->mly_regs_resource, mbox,      *((u_int32_t *)ptr));		\
249 	    bus_write_4(sc->mly_regs_resource, mbox +  4, *((u_int32_t *)ptr + 1));	\
250 	    bus_write_4(sc->mly_regs_resource, mbox +  8, *((u_int32_t *)ptr + 2));	\
251 	    bus_write_4(sc->mly_regs_resource, mbox + 12, *((u_int32_t *)ptr + 3));	\
252 	} while(0);
253 #define MLY_GET_MBOX(sc, mbox, ptr)									\
254 	do {												\
255 	    *((u_int32_t *)ptr) = bus_read_4(sc->mly_regs_resource, mbox);		\
256 	    *((u_int32_t *)ptr + 1) = bus_read_4(sc->mly_regs_resource, mbox + 4);	\
257 	    *((u_int32_t *)ptr + 2) = bus_read_4(sc->mly_regs_resource, mbox + 8);	\
258 	    *((u_int32_t *)ptr + 3) = bus_read_4(sc->mly_regs_resource, mbox + 12);	\
259 	} while(0);
260 
261 #define MLY_IDBR_TRUE(sc, mask)								\
262 	((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
263 #define MLY_ODBR_TRUE(sc, mask)								\
264 	((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
265 #define MLY_ERROR_VALID(sc)								\
266 	((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
267 
268 #define MLY_MASK_INTERRUPTS(sc)								\
269 	do {										\
270 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);	\
271 	    sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON;					\
272 	} while(0);
273 #define MLY_UNMASK_INTERRUPTS(sc)							\
274 	do {										\
275 	    MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);	\
276 	    sc->mly_state |= MLY_STATE_INTERRUPTS_ON;					\
277 	} while(0);
278 
279 /*
280  * Bus/target/logical ID-related macros.
281  */
282 #define MLY_LOGDEV_ID(sc, bus, target)	(((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
283 					 MLY_MAX_TARGETS + (target))
284 #define MLY_LOGDEV_BUS(sc, logdev)	(((logdev) / MLY_MAX_TARGETS) + \
285 					 (sc)->mly_controllerinfo->physical_channels_present)
286 #define MLY_LOGDEV_TARGET(sc, logdev)	((logdev) % MLY_MAX_TARGETS)
287 #define MLY_BUS_IS_VIRTUAL(sc, bus)	((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
288 #define MLY_BUS_IS_VALID(sc, bus)	(((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
289 
290 /********************************************************************************
291  * Queue primitives
292  */
293 
294 #define MLYQ_ADD(sc, qname)					\
295 	do {							\
296 	    struct mly_qstat *qs = &(sc)->mly_qstat[qname];	\
297 								\
298 	    qs->q_length++;					\
299 	    if (qs->q_length > qs->q_max)			\
300 		qs->q_max = qs->q_length;			\
301 	} while(0)
302 
303 #define MLYQ_REMOVE(sc, qname)    (sc)->mly_qstat[qname].q_length--
304 #define MLYQ_INIT(sc, qname)			\
305 	do {					\
306 	    sc->mly_qstat[qname].q_length = 0;	\
307 	    sc->mly_qstat[qname].q_max = 0;	\
308 	} while(0)
309 
310 
311 #define MLYQ_COMMAND_QUEUE(name, index)					\
312 static __inline void							\
313 mly_initq_ ## name (struct mly_softc *sc)				\
314 {									\
315     TAILQ_INIT(&sc->mly_ ## name);					\
316     MLYQ_INIT(sc, index);						\
317 }									\
318 static __inline void							\
319 mly_enqueue_ ## name (struct mly_command *mc)				\
320 {									\
321 									\
322     TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
323     MLYQ_ADD(mc->mc_sc, index);						\
324 }									\
325 static __inline void							\
326 mly_requeue_ ## name (struct mly_command *mc)				\
327 {									\
328 									\
329     TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
330     MLYQ_ADD(mc->mc_sc, index);						\
331 }									\
332 static __inline struct mly_command *					\
333 mly_dequeue_ ## name (struct mly_softc *sc)				\
334 {									\
335     struct mly_command	*mc;						\
336 									\
337     if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) {		\
338 	TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link);			\
339 	MLYQ_REMOVE(sc, index);						\
340     }									\
341     return(mc);								\
342 }									\
343 static __inline void							\
344 mly_remove_ ## name (struct mly_command *mc)				\
345 {									\
346 									\
347     TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link);		\
348     MLYQ_REMOVE(mc->mc_sc, index);					\
349 }									\
350 struct hack
351 
352 MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
353 MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
354 MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
355 
356 /********************************************************************************
357  * space-fill a character string
358  */
359 static __inline void
padstr(char * targ,char * src,int len)360 padstr(char *targ, char *src, int len)
361 {
362     while (len-- > 0) {
363 	if (*src != 0) {
364 	    *targ++ = *src++;
365 	} else {
366 	    *targ++ = ' ';
367 	}
368     }
369 }
370