1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #define LINUXKPI_PARAM_PREFIX mlx4_
35
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/etherdevice.h>
40 #include <linux/netdevice.h>
41 #include <linux/inetdevice.h>
42 #include <linux/if_vlan.h>
43 #include <linux/fs.h>
44 #include <linux/rcupdate.h>
45 #include <linux/notifier.h>
46 #include <linux/delay.h>
47
48 #include <net/ipv6.h>
49
50 #include <rdma/ib_smi.h>
51 #include <rdma/ib_user_verbs.h>
52 #include <rdma/ib_addr.h>
53 #include <rdma/ib_cache.h>
54
55 #include <dev/mlx4/driver.h>
56 #include <dev/mlx4/cmd.h>
57 #include <dev/mlx4/qp.h>
58 #include <linux/sched.h>
59 #include <linux/page.h>
60 #include <linux/printk.h>
61 #include "mlx4_ib.h"
62 #include <rdma/mlx4-abi.h>
63 #include "wc.h"
64
65 #define DRV_NAME MLX4_IB_DRV_NAME
66 #ifndef DRV_VERSION
67 #define DRV_VERSION "3.6.0"
68 #endif
69 #define DRV_RELDATE "December 2020"
70
71 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
72 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
73 #define MLX4_IB_CARD_REV_A0 0xA0
74
75 MODULE_AUTHOR("Roland Dreier");
76 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
77 MODULE_LICENSE("Dual BSD/GPL");
78
79 int mlx4_ib_sm_guid_assign = 0;
80 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
81 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
82
83 static const char mlx4_ib_version[] =
84 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
85 DRV_VERSION " (" DRV_RELDATE ")\n";
86
87 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
88
89 static struct workqueue_struct *wq;
90
init_query_mad(struct ib_smp * mad)91 static void init_query_mad(struct ib_smp *mad)
92 {
93 mad->base_version = 1;
94 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
95 mad->class_version = 1;
96 mad->method = IB_MGMT_METHOD_GET;
97 }
98
check_flow_steering_support(struct mlx4_dev * dev)99 static int check_flow_steering_support(struct mlx4_dev *dev)
100 {
101 int eth_num_ports = 0;
102 int ib_num_ports = 0;
103
104 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
105
106 if (dmfs) {
107 int i;
108 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
109 eth_num_ports++;
110 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
111 ib_num_ports++;
112 dmfs &= (!ib_num_ports ||
113 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
114 (!eth_num_ports ||
115 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
116 if (ib_num_ports && mlx4_is_mfunc(dev)) {
117 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
118 dmfs = 0;
119 }
120 }
121 return dmfs;
122 }
123
num_ib_ports(struct mlx4_dev * dev)124 static int num_ib_ports(struct mlx4_dev *dev)
125 {
126 int ib_ports = 0;
127 int i;
128
129 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
130 ib_ports++;
131
132 return ib_ports;
133 }
134
mlx4_ib_get_netdev(struct ib_device * device,u8 port_num)135 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
136 {
137 struct mlx4_ib_dev *ibdev = to_mdev(device);
138 struct net_device *dev;
139
140 rcu_read_lock();
141 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
142
143 #if 0
144 if (dev) {
145 if (mlx4_is_bonded(ibdev->dev)) {
146 struct net_device *upper = NULL;
147
148 upper = netdev_master_upper_dev_get_rcu(dev);
149 if (upper) {
150 struct net_device *active;
151
152 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
153 if (active)
154 dev = active;
155 }
156 }
157 }
158 #endif
159 if (dev)
160 dev_hold(dev);
161
162 rcu_read_unlock();
163 return dev;
164 }
165
mlx4_ib_update_gids_v1(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)166 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
167 struct mlx4_ib_dev *ibdev,
168 u8 port_num)
169 {
170 struct mlx4_cmd_mailbox *mailbox;
171 int err;
172 struct mlx4_dev *dev = ibdev->dev;
173 int i;
174 union ib_gid *gid_tbl;
175
176 mailbox = mlx4_alloc_cmd_mailbox(dev);
177 if (IS_ERR(mailbox))
178 return -ENOMEM;
179
180 gid_tbl = mailbox->buf;
181
182 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
183 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
184
185 err = mlx4_cmd(dev, mailbox->dma,
186 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
188 MLX4_CMD_WRAPPED);
189 if (mlx4_is_bonded(dev))
190 err += mlx4_cmd(dev, mailbox->dma,
191 MLX4_SET_PORT_GID_TABLE << 8 | 2,
192 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
193 MLX4_CMD_WRAPPED);
194
195 mlx4_free_cmd_mailbox(dev, mailbox);
196 return err;
197 }
198
mlx4_ib_update_gids_v1_v2(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)199 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
200 struct mlx4_ib_dev *ibdev,
201 u8 port_num)
202 {
203 struct mlx4_cmd_mailbox *mailbox;
204 int err;
205 struct mlx4_dev *dev = ibdev->dev;
206 int i;
207 struct {
208 union ib_gid gid;
209 __be32 rsrvd1[2];
210 __be16 rsrvd2;
211 u8 type;
212 u8 version;
213 __be32 rsrvd3;
214 } *gid_tbl;
215
216 mailbox = mlx4_alloc_cmd_mailbox(dev);
217 if (IS_ERR(mailbox))
218 return -ENOMEM;
219
220 gid_tbl = mailbox->buf;
221 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
222 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
223 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
224 gid_tbl[i].version = 2;
225 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
226 gid_tbl[i].type = 1;
227 else
228 memset(&gid_tbl[i].gid, 0, 12);
229 }
230 }
231
232 err = mlx4_cmd(dev, mailbox->dma,
233 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
234 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
235 MLX4_CMD_WRAPPED);
236 if (mlx4_is_bonded(dev))
237 err += mlx4_cmd(dev, mailbox->dma,
238 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
239 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
240 MLX4_CMD_WRAPPED);
241
242 mlx4_free_cmd_mailbox(dev, mailbox);
243 return err;
244 }
245
mlx4_ib_update_gids(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u8 port_num)246 static int mlx4_ib_update_gids(struct gid_entry *gids,
247 struct mlx4_ib_dev *ibdev,
248 u8 port_num)
249 {
250 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
251 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
252
253 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
254 }
255
mlx4_ib_add_gid(struct ib_device * device,u8 port_num,unsigned int index,const union ib_gid * gid,const struct ib_gid_attr * attr,void ** context)256 static int mlx4_ib_add_gid(struct ib_device *device,
257 u8 port_num,
258 unsigned int index,
259 const union ib_gid *gid,
260 const struct ib_gid_attr *attr,
261 void **context)
262 {
263 struct mlx4_ib_dev *ibdev = to_mdev(device);
264 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
265 struct mlx4_port_gid_table *port_gid_table;
266 int free = -1, found = -1;
267 int ret = 0;
268 int hw_update = 0;
269 int i;
270 struct gid_entry *gids = NULL;
271
272 if (!rdma_cap_roce_gid_table(device, port_num))
273 return -EINVAL;
274
275 if (port_num > MLX4_MAX_PORTS)
276 return -EINVAL;
277
278 if (!context)
279 return -EINVAL;
280
281 port_gid_table = &iboe->gids[port_num - 1];
282 spin_lock_bh(&iboe->lock);
283 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
284 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
285 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
286 found = i;
287 break;
288 }
289 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
290 free = i; /* HW has space */
291 }
292
293 if (found < 0) {
294 if (free < 0) {
295 ret = -ENOSPC;
296 } else {
297 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
298 if (!port_gid_table->gids[free].ctx) {
299 ret = -ENOMEM;
300 } else {
301 *context = port_gid_table->gids[free].ctx;
302 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
303 port_gid_table->gids[free].gid_type = attr->gid_type;
304 port_gid_table->gids[free].ctx->real_index = free;
305 port_gid_table->gids[free].ctx->refcount = 1;
306 hw_update = 1;
307 }
308 }
309 } else {
310 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
311 *context = ctx;
312 ctx->refcount++;
313 }
314 if (!ret && hw_update) {
315 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
316 if (!gids) {
317 ret = -ENOMEM;
318 } else {
319 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
320 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
321 gids[i].gid_type = port_gid_table->gids[i].gid_type;
322 }
323 }
324 }
325 spin_unlock_bh(&iboe->lock);
326
327 if (!ret && hw_update) {
328 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
329 kfree(gids);
330 }
331
332 return ret;
333 }
334
mlx4_ib_del_gid(struct ib_device * device,u8 port_num,unsigned int index,void ** context)335 static int mlx4_ib_del_gid(struct ib_device *device,
336 u8 port_num,
337 unsigned int index,
338 void **context)
339 {
340 struct gid_cache_context *ctx = *context;
341 struct mlx4_ib_dev *ibdev = to_mdev(device);
342 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
343 struct mlx4_port_gid_table *port_gid_table;
344 int ret = 0;
345 int hw_update = 0;
346 struct gid_entry *gids = NULL;
347
348 if (!rdma_cap_roce_gid_table(device, port_num))
349 return -EINVAL;
350
351 if (port_num > MLX4_MAX_PORTS)
352 return -EINVAL;
353
354 port_gid_table = &iboe->gids[port_num - 1];
355 spin_lock_bh(&iboe->lock);
356 if (ctx) {
357 ctx->refcount--;
358 if (!ctx->refcount) {
359 unsigned int real_index = ctx->real_index;
360
361 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
362 kfree(port_gid_table->gids[real_index].ctx);
363 port_gid_table->gids[real_index].ctx = NULL;
364 hw_update = 1;
365 }
366 }
367 if (!ret && hw_update) {
368 int i;
369
370 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
371 if (!gids) {
372 ret = -ENOMEM;
373 } else {
374 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
375 memcpy(&gids[i].gid,
376 &port_gid_table->gids[i].gid,
377 sizeof(union ib_gid));
378 gids[i].gid_type =
379 port_gid_table->gids[i].gid_type;
380 }
381 }
382 }
383 spin_unlock_bh(&iboe->lock);
384
385 if (!ret && hw_update) {
386 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
387 kfree(gids);
388 }
389 return ret;
390 }
391
mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev * ibdev,u8 port_num,int index)392 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
393 u8 port_num, int index)
394 {
395 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
396 struct gid_cache_context *ctx = NULL;
397 union ib_gid gid;
398 struct mlx4_port_gid_table *port_gid_table;
399 int real_index = -EINVAL;
400 int i;
401 int ret;
402 unsigned long flags;
403 struct ib_gid_attr attr;
404
405 if (port_num > MLX4_MAX_PORTS)
406 return -EINVAL;
407
408 if (mlx4_is_bonded(ibdev->dev))
409 port_num = 1;
410
411 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
412 return index;
413
414 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
415 if (ret)
416 return ret;
417
418 if (attr.ndev)
419 dev_put(attr.ndev);
420
421 if (!memcmp(&gid, &zgid, sizeof(gid)))
422 return -EINVAL;
423
424 spin_lock_irqsave(&iboe->lock, flags);
425 port_gid_table = &iboe->gids[port_num - 1];
426
427 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
428 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
429 attr.gid_type == port_gid_table->gids[i].gid_type) {
430 ctx = port_gid_table->gids[i].ctx;
431 break;
432 }
433 if (ctx)
434 real_index = ctx->real_index;
435 spin_unlock_irqrestore(&iboe->lock, flags);
436 return real_index;
437 }
438
mlx4_ib_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * uhw)439 static int mlx4_ib_query_device(struct ib_device *ibdev,
440 struct ib_device_attr *props,
441 struct ib_udata *uhw)
442 {
443 struct mlx4_ib_dev *dev = to_mdev(ibdev);
444 struct ib_smp *in_mad = NULL;
445 struct ib_smp *out_mad = NULL;
446 int err = -ENOMEM;
447 int have_ib_ports;
448 struct mlx4_uverbs_ex_query_device cmd;
449 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
450 struct mlx4_clock_params clock_params;
451
452 if (uhw->inlen) {
453 if (uhw->inlen < sizeof(cmd))
454 return -EINVAL;
455
456 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
457 if (err)
458 return err;
459
460 if (cmd.comp_mask)
461 return -EINVAL;
462
463 if (cmd.reserved)
464 return -EINVAL;
465 }
466
467 resp.response_length = offsetof(typeof(resp), response_length) +
468 sizeof(resp.response_length);
469 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
470 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
471 if (!in_mad || !out_mad)
472 goto out;
473
474 init_query_mad(in_mad);
475 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
476
477 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
478 1, NULL, NULL, in_mad, out_mad);
479 if (err)
480 goto out;
481
482 memset(props, 0, sizeof *props);
483
484 have_ib_ports = num_ib_ports(dev->dev);
485
486 props->fw_ver = dev->dev->caps.fw_ver;
487 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
488 IB_DEVICE_PORT_ACTIVE_EVENT |
489 IB_DEVICE_SYS_IMAGE_GUID |
490 IB_DEVICE_RC_RNR_NAK_GEN |
491 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
492 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
493 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
494 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
495 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
496 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
497 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
498 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
499 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
500 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
501 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
502 if (dev->dev->caps.max_gso_sz &&
503 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
504 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
505 props->device_cap_flags |= IB_DEVICE_UD_TSO;
506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
507 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
508 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
510 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
511 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
512 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
513 props->device_cap_flags |= IB_DEVICE_XRC;
514 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
515 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
517 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
518 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
519 else
520 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
521 }
522 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
523 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
524
525 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
526
527 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
528 0xffffff;
529 props->vendor_part_id = dev->dev->persist->pdev->device;
530 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
531 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
532
533 props->max_mr_size = ~0ull;
534 props->page_size_cap = dev->dev->caps.page_size_cap;
535 props->max_qp = dev->dev->quotas.qp;
536 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
537 props->max_sge = min(dev->dev->caps.max_sq_sg,
538 dev->dev->caps.max_rq_sg);
539 props->max_sge_rd = MLX4_MAX_SGE_RD;
540 props->max_cq = dev->dev->quotas.cq;
541 props->max_cqe = dev->dev->caps.max_cqes;
542 props->max_mr = dev->dev->quotas.mpt;
543 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
544 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
545 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
546 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
547 props->max_srq = dev->dev->quotas.srq;
548 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
549 props->max_srq_sge = dev->dev->caps.max_srq_sge;
550 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
551 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
552 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
553 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
554 props->masked_atomic_cap = props->atomic_cap;
555 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
556 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
557 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
558 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
559 props->max_mcast_grp;
560 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
561 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
562 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
563
564 if (!mlx4_is_slave(dev->dev))
565 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
566
567 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
568 resp.response_length += sizeof(resp.hca_core_clock_offset);
569 if (!err && !mlx4_is_slave(dev->dev)) {
570 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
571 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
572 }
573 }
574
575 if (uhw->outlen) {
576 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
577 if (err)
578 goto out;
579 }
580 out:
581 kfree(in_mad);
582 kfree(out_mad);
583
584 return err;
585 }
586
587 static enum rdma_link_layer
mlx4_ib_port_link_layer(struct ib_device * device,u8 port_num)588 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
589 {
590 struct mlx4_dev *dev = to_mdev(device)->dev;
591
592 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
593 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
594 }
595
ib_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)596 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
597 struct ib_port_attr *props, int netw_view)
598 {
599 struct ib_smp *in_mad = NULL;
600 struct ib_smp *out_mad = NULL;
601 int ext_active_speed;
602 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
603 int err = -ENOMEM;
604
605 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
606 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
607 if (!in_mad || !out_mad)
608 goto out;
609
610 init_query_mad(in_mad);
611 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
612 in_mad->attr_mod = cpu_to_be32(port);
613
614 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
615 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
616
617 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
618 in_mad, out_mad);
619 if (err)
620 goto out;
621
622
623 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
624 props->lmc = out_mad->data[34] & 0x7;
625 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
626 props->sm_sl = out_mad->data[36] & 0xf;
627 props->state = out_mad->data[32] & 0xf;
628 props->phys_state = out_mad->data[33] >> 4;
629 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
630 if (netw_view)
631 props->gid_tbl_len = out_mad->data[50];
632 else
633 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
634 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
635 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
636 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
637 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
638 props->active_width = out_mad->data[31] & 0xf;
639 props->active_speed = out_mad->data[35] >> 4;
640 props->max_mtu = out_mad->data[41] & 0xf;
641 props->active_mtu = out_mad->data[36] >> 4;
642 props->subnet_timeout = out_mad->data[51] & 0x1f;
643 props->max_vl_num = out_mad->data[37] >> 4;
644 props->init_type_reply = out_mad->data[41] >> 4;
645
646 /* Check if extended speeds (EDR/FDR/...) are supported */
647 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
648 ext_active_speed = out_mad->data[62] >> 4;
649
650 switch (ext_active_speed) {
651 case 1:
652 props->active_speed = IB_SPEED_FDR;
653 break;
654 case 2:
655 props->active_speed = IB_SPEED_EDR;
656 break;
657 }
658 }
659
660 /* If reported active speed is QDR, check if is FDR-10 */
661 if (props->active_speed == IB_SPEED_QDR) {
662 init_query_mad(in_mad);
663 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
664 in_mad->attr_mod = cpu_to_be32(port);
665
666 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
667 NULL, NULL, in_mad, out_mad);
668 if (err)
669 goto out;
670
671 /* Checking LinkSpeedActive for FDR-10 */
672 if (out_mad->data[15] & 0x1)
673 props->active_speed = IB_SPEED_FDR10;
674 }
675
676 /* Avoid wrong speed value returned by FW if the IB link is down. */
677 if (props->state == IB_PORT_DOWN)
678 props->active_speed = IB_SPEED_SDR;
679
680 out:
681 kfree(in_mad);
682 kfree(out_mad);
683 return err;
684 }
685
state_to_phys_state(enum ib_port_state state)686 static u8 state_to_phys_state(enum ib_port_state state)
687 {
688 return state == IB_PORT_ACTIVE ? 5 : 3;
689 }
690
eth_link_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)691 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
692 struct ib_port_attr *props, int netw_view)
693 {
694
695 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
696 struct mlx4_ib_iboe *iboe = &mdev->iboe;
697 struct net_device *ndev;
698 enum ib_mtu tmp;
699 struct mlx4_cmd_mailbox *mailbox;
700 int err = 0;
701 int is_bonded = mlx4_is_bonded(mdev->dev);
702
703 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
704 if (IS_ERR(mailbox))
705 return PTR_ERR(mailbox);
706
707 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
708 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
709 MLX4_CMD_WRAPPED);
710 if (err)
711 goto out;
712
713 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
714 IB_WIDTH_4X : IB_WIDTH_1X;
715 props->active_speed = IB_SPEED_QDR;
716 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
717 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
718 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
719 props->pkey_tbl_len = 1;
720 props->max_mtu = IB_MTU_4096;
721 props->max_vl_num = 2;
722 props->state = IB_PORT_DOWN;
723 props->phys_state = state_to_phys_state(props->state);
724 props->active_mtu = IB_MTU_256;
725 spin_lock_bh(&iboe->lock);
726 ndev = iboe->netdevs[port - 1];
727 if (ndev && is_bonded) {
728 #if 0
729 rcu_read_lock(); /* required to get upper dev */
730 ndev = netdev_master_upper_dev_get_rcu(ndev);
731 rcu_read_unlock();
732 #endif
733 }
734 if (!ndev)
735 goto out_unlock;
736
737 tmp = iboe_get_mtu(ndev->if_mtu);
738 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
739
740 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
741 IB_PORT_ACTIVE : IB_PORT_DOWN;
742 props->phys_state = state_to_phys_state(props->state);
743 out_unlock:
744 spin_unlock_bh(&iboe->lock);
745 out:
746 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
747 return err;
748 }
749
__mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props,int netw_view)750 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
751 struct ib_port_attr *props, int netw_view)
752 {
753 int err;
754
755 memset(props, 0, sizeof *props);
756
757 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
758 ib_link_query_port(ibdev, port, props, netw_view) :
759 eth_link_query_port(ibdev, port, props, netw_view);
760
761 return err;
762 }
763
mlx4_ib_query_port(struct ib_device * ibdev,u8 port,struct ib_port_attr * props)764 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
765 struct ib_port_attr *props)
766 {
767 /* returns host view */
768 return __mlx4_ib_query_port(ibdev, port, props, 0);
769 }
770
__mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid,int netw_view)771 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
772 union ib_gid *gid, int netw_view)
773 {
774 struct ib_smp *in_mad = NULL;
775 struct ib_smp *out_mad = NULL;
776 int err = -ENOMEM;
777 struct mlx4_ib_dev *dev = to_mdev(ibdev);
778 int clear = 0;
779 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
780
781 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
782 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
783 if (!in_mad || !out_mad)
784 goto out;
785
786 init_query_mad(in_mad);
787 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
788 in_mad->attr_mod = cpu_to_be32(port);
789
790 if (mlx4_is_mfunc(dev->dev) && netw_view)
791 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
792
793 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
794 if (err)
795 goto out;
796
797 memcpy(gid->raw, out_mad->data + 8, 8);
798
799 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
800 if (index) {
801 /* For any index > 0, return the null guid */
802 err = 0;
803 clear = 1;
804 goto out;
805 }
806 }
807
808 init_query_mad(in_mad);
809 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
810 in_mad->attr_mod = cpu_to_be32(index / 8);
811
812 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
813 NULL, NULL, in_mad, out_mad);
814 if (err)
815 goto out;
816
817 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
818
819 out:
820 if (clear)
821 memset(gid->raw + 8, 0, 8);
822 kfree(in_mad);
823 kfree(out_mad);
824 return err;
825 }
826
mlx4_ib_query_gid(struct ib_device * ibdev,u8 port,int index,union ib_gid * gid)827 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
828 union ib_gid *gid)
829 {
830 int ret;
831
832 if (rdma_protocol_ib(ibdev, port))
833 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
834
835 if (!rdma_protocol_roce(ibdev, port))
836 return -ENODEV;
837
838 if (!rdma_cap_roce_gid_table(ibdev, port))
839 return -ENODEV;
840
841 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
842 if (ret == -EAGAIN) {
843 memcpy(gid, &zgid, sizeof(*gid));
844 return 0;
845 }
846
847 return ret;
848 }
849
mlx4_ib_query_sl2vl(struct ib_device * ibdev,u8 port,u64 * sl2vl_tbl)850 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
851 {
852 union sl2vl_tbl_to_u64 sl2vl64;
853 struct ib_smp *in_mad = NULL;
854 struct ib_smp *out_mad = NULL;
855 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
856 int err = -ENOMEM;
857 int jj;
858
859 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
860 *sl2vl_tbl = 0;
861 return 0;
862 }
863
864 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
865 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
866 if (!in_mad || !out_mad)
867 goto out;
868
869 init_query_mad(in_mad);
870 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
871 in_mad->attr_mod = 0;
872
873 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
874 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
875
876 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
877 in_mad, out_mad);
878 if (err)
879 goto out;
880
881 for (jj = 0; jj < 8; jj++)
882 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
883 *sl2vl_tbl = sl2vl64.sl64;
884
885 out:
886 kfree(in_mad);
887 kfree(out_mad);
888 return err;
889 }
890
mlx4_init_sl2vl_tbl(struct mlx4_ib_dev * mdev)891 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
892 {
893 u64 sl2vl;
894 int i;
895 int err;
896
897 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
898 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
899 continue;
900 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
901 if (err) {
902 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
903 i, err);
904 sl2vl = 0;
905 }
906 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
907 }
908 }
909
__mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey,int netw_view)910 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
911 u16 *pkey, int netw_view)
912 {
913 struct ib_smp *in_mad = NULL;
914 struct ib_smp *out_mad = NULL;
915 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
916 int err = -ENOMEM;
917
918 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
919 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
920 if (!in_mad || !out_mad)
921 goto out;
922
923 init_query_mad(in_mad);
924 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
925 in_mad->attr_mod = cpu_to_be32(index / 32);
926
927 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
928 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
929
930 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
931 in_mad, out_mad);
932 if (err)
933 goto out;
934
935 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
936
937 out:
938 kfree(in_mad);
939 kfree(out_mad);
940 return err;
941 }
942
mlx4_ib_query_pkey(struct ib_device * ibdev,u8 port,u16 index,u16 * pkey)943 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
944 {
945 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
946 }
947
mlx4_ib_modify_device(struct ib_device * ibdev,int mask,struct ib_device_modify * props)948 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
949 struct ib_device_modify *props)
950 {
951 struct mlx4_cmd_mailbox *mailbox;
952 unsigned long flags;
953
954 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
955 return -EOPNOTSUPP;
956
957 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
958 return 0;
959
960 if (mlx4_is_slave(to_mdev(ibdev)->dev))
961 return -EOPNOTSUPP;
962
963 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
964 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
965 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
966
967 /*
968 * If possible, pass node desc to FW, so it can generate
969 * a 144 trap. If cmd fails, just ignore.
970 */
971 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
972 if (IS_ERR(mailbox))
973 return 0;
974
975 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
976 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
977 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
978
979 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
980
981 return 0;
982 }
983
mlx4_ib_SET_PORT(struct mlx4_ib_dev * dev,u8 port,int reset_qkey_viols,u32 cap_mask)984 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
985 u32 cap_mask)
986 {
987 struct mlx4_cmd_mailbox *mailbox;
988 int err;
989
990 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
991 if (IS_ERR(mailbox))
992 return PTR_ERR(mailbox);
993
994 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
995 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
996 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
997 } else {
998 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
999 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1000 }
1001
1002 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1003 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1004 MLX4_CMD_WRAPPED);
1005
1006 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1007 return err;
1008 }
1009
mlx4_ib_modify_port(struct ib_device * ibdev,u8 port,int mask,struct ib_port_modify * props)1010 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1011 struct ib_port_modify *props)
1012 {
1013 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1014 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1015 struct ib_port_attr attr;
1016 u32 cap_mask;
1017 int err;
1018
1019 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1020 * of whether port link layer is ETH or IB. For ETH ports, qkey
1021 * violations and port capabilities are not meaningful.
1022 */
1023 if (is_eth)
1024 return 0;
1025
1026 mutex_lock(&mdev->cap_mask_mutex);
1027
1028 err = mlx4_ib_query_port(ibdev, port, &attr);
1029 if (err)
1030 goto out;
1031
1032 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1033 ~props->clr_port_cap_mask;
1034
1035 err = mlx4_ib_SET_PORT(mdev, port,
1036 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1037 cap_mask);
1038
1039 out:
1040 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1041 return err;
1042 }
1043
mlx4_ib_alloc_ucontext(struct ib_device * ibdev,struct ib_udata * udata)1044 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1045 struct ib_udata *udata)
1046 {
1047 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1048 struct mlx4_ib_ucontext *context;
1049 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1050 struct mlx4_ib_alloc_ucontext_resp resp;
1051 int err;
1052
1053 if (!dev->ib_active)
1054 return ERR_PTR(-EAGAIN);
1055
1056 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1057 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1058 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1059 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1060 } else {
1061 resp.dev_caps = dev->dev->caps.userspace_caps;
1062 resp.qp_tab_size = dev->dev->caps.num_qps;
1063 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1064 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1065 resp.cqe_size = dev->dev->caps.cqe_size;
1066 }
1067
1068 context = kzalloc(sizeof(*context), GFP_KERNEL);
1069 if (!context)
1070 return ERR_PTR(-ENOMEM);
1071
1072 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1073 if (err) {
1074 kfree(context);
1075 return ERR_PTR(err);
1076 }
1077
1078 INIT_LIST_HEAD(&context->db_page_list);
1079 mutex_init(&context->db_page_mutex);
1080
1081 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1082 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1083 else
1084 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1085
1086 if (err) {
1087 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1088 kfree(context);
1089 return ERR_PTR(-EFAULT);
1090 }
1091
1092 return &context->ibucontext;
1093 }
1094
mlx4_ib_dealloc_ucontext(struct ib_ucontext * ibcontext)1095 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1096 {
1097 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1098
1099 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1100 kfree(context);
1101
1102 return 0;
1103 }
1104
mlx4_ib_vma_open(struct vm_area_struct * area)1105 static void mlx4_ib_vma_open(struct vm_area_struct *area)
1106 {
1107 /* vma_open is called when a new VMA is created on top of our VMA.
1108 * This is done through either mremap flow or split_vma (usually due
1109 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1110 * vma, as this VMA is strongly hardware related. Therefore we set the
1111 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1112 * calling us again and trying to do incorrect actions. We assume that
1113 * the original vma size is exactly a single page that there will be no
1114 * "splitting" operations on.
1115 */
1116 area->vm_ops = NULL;
1117 }
1118
mlx4_ib_vma_close(struct vm_area_struct * area)1119 static void mlx4_ib_vma_close(struct vm_area_struct *area)
1120 {
1121 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1122
1123 /* It's guaranteed that all VMAs opened on a FD are closed before the
1124 * file itself is closed, therefore no sync is needed with the regular
1125 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1126 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1127 * The close operation is usually called under mm->mmap_sem except when
1128 * process is exiting. The exiting case is handled explicitly as part
1129 * of mlx4_ib_disassociate_ucontext.
1130 */
1131 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1132 area->vm_private_data;
1133
1134 /* set the vma context pointer to null in the mlx4_ib driver's private
1135 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1136 */
1137 mlx4_ib_vma_priv_data->vma = NULL;
1138 }
1139
1140 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1141 .open = mlx4_ib_vma_open,
1142 .close = mlx4_ib_vma_close
1143 };
1144
mlx4_ib_set_vma_data(struct vm_area_struct * vma,struct mlx4_ib_vma_private_data * vma_private_data)1145 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1146 struct mlx4_ib_vma_private_data *vma_private_data)
1147 {
1148 vma_private_data->vma = vma;
1149 vma->vm_private_data = vma_private_data;
1150 vma->vm_ops = &mlx4_ib_vm_ops;
1151 }
1152
mlx4_ib_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)1153 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1154 {
1155 struct mlx4_ib_dev *dev = to_mdev(context->device);
1156 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1157
1158 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1159 return -EINVAL;
1160
1161 if (vma->vm_pgoff == 0) {
1162 /* We prevent double mmaping on same context */
1163 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1164 return -EINVAL;
1165
1166 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1167
1168 if (io_remap_pfn_range(vma, vma->vm_start,
1169 to_mucontext(context)->uar.pfn,
1170 PAGE_SIZE, vma->vm_page_prot))
1171 return -EAGAIN;
1172
1173 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1174
1175 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1176 /* We prevent double mmaping on same context */
1177 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1178 return -EINVAL;
1179
1180 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1181
1182 if (io_remap_pfn_range(vma, vma->vm_start,
1183 to_mucontext(context)->uar.pfn +
1184 dev->dev->caps.num_uars,
1185 PAGE_SIZE, vma->vm_page_prot))
1186 return -EAGAIN;
1187
1188 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1189
1190 } else if (vma->vm_pgoff == 3) {
1191 struct mlx4_clock_params params;
1192 int ret;
1193
1194 /* We prevent double mmaping on same context */
1195 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1196 return -EINVAL;
1197
1198 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1199
1200 if (ret)
1201 return ret;
1202
1203 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1204 if (io_remap_pfn_range(vma, vma->vm_start,
1205 (pci_resource_start(dev->dev->persist->pdev,
1206 params.bar) +
1207 params.offset)
1208 >> PAGE_SHIFT,
1209 PAGE_SIZE, vma->vm_page_prot))
1210 return -EAGAIN;
1211
1212 mlx4_ib_set_vma_data(vma,
1213 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1214 } else {
1215 return -EINVAL;
1216 }
1217
1218 return 0;
1219 }
1220
mlx4_ib_alloc_pd(struct ib_device * ibdev,struct ib_ucontext * context,struct ib_udata * udata)1221 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1222 struct ib_ucontext *context,
1223 struct ib_udata *udata)
1224 {
1225 struct mlx4_ib_pd *pd;
1226 int err;
1227
1228 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1229 if (!pd)
1230 return ERR_PTR(-ENOMEM);
1231
1232 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1233 if (err) {
1234 kfree(pd);
1235 return ERR_PTR(err);
1236 }
1237
1238 if (context)
1239 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1240 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1241 kfree(pd);
1242 return ERR_PTR(-EFAULT);
1243 }
1244
1245 return &pd->ibpd;
1246 }
1247
mlx4_ib_dealloc_pd(struct ib_pd * pd)1248 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1249 {
1250 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1251 kfree(pd);
1252
1253 return 0;
1254 }
1255
mlx4_ib_alloc_xrcd(struct ib_device * ibdev,struct ib_ucontext * context,struct ib_udata * udata)1256 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1257 struct ib_ucontext *context,
1258 struct ib_udata *udata)
1259 {
1260 struct mlx4_ib_xrcd *xrcd;
1261 struct ib_cq_init_attr cq_attr = {};
1262 int err;
1263
1264 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1265 return ERR_PTR(-ENOSYS);
1266
1267 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1268 if (!xrcd)
1269 return ERR_PTR(-ENOMEM);
1270
1271 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1272 if (err)
1273 goto err1;
1274
1275 xrcd->pd = ib_alloc_pd(ibdev, 0);
1276 if (IS_ERR(xrcd->pd)) {
1277 err = PTR_ERR(xrcd->pd);
1278 goto err2;
1279 }
1280
1281 cq_attr.cqe = 1;
1282 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1283 if (IS_ERR(xrcd->cq)) {
1284 err = PTR_ERR(xrcd->cq);
1285 goto err3;
1286 }
1287
1288 return &xrcd->ibxrcd;
1289
1290 err3:
1291 ib_dealloc_pd(xrcd->pd);
1292 err2:
1293 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1294 err1:
1295 kfree(xrcd);
1296 return ERR_PTR(err);
1297 }
1298
mlx4_ib_dealloc_xrcd(struct ib_xrcd * xrcd)1299 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1300 {
1301 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1302 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1303 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1304 kfree(xrcd);
1305
1306 return 0;
1307 }
1308
add_gid_entry(struct ib_qp * ibqp,union ib_gid * gid)1309 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1310 {
1311 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1312 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1313 struct mlx4_ib_gid_entry *ge;
1314
1315 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1316 if (!ge)
1317 return -ENOMEM;
1318
1319 ge->gid = *gid;
1320 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1321 ge->port = mqp->port;
1322 ge->added = 1;
1323 }
1324
1325 mutex_lock(&mqp->mutex);
1326 list_add_tail(&ge->list, &mqp->gid_list);
1327 mutex_unlock(&mqp->mutex);
1328
1329 return 0;
1330 }
1331
mlx4_ib_delete_counters_table(struct mlx4_ib_dev * ibdev,struct mlx4_ib_counters * ctr_table)1332 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1333 struct mlx4_ib_counters *ctr_table)
1334 {
1335 struct counter_index *counter, *tmp_count;
1336
1337 mutex_lock(&ctr_table->mutex);
1338 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1339 list) {
1340 if (counter->allocated)
1341 mlx4_counter_free(ibdev->dev, counter->index);
1342 list_del(&counter->list);
1343 kfree(counter);
1344 }
1345 mutex_unlock(&ctr_table->mutex);
1346 }
1347
mlx4_ib_add_mc(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,union ib_gid * gid)1348 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1349 union ib_gid *gid)
1350 {
1351 struct net_device *ndev;
1352 int ret = 0;
1353
1354 if (!mqp->port)
1355 return 0;
1356
1357 spin_lock_bh(&mdev->iboe.lock);
1358 ndev = mdev->iboe.netdevs[mqp->port - 1];
1359 if (ndev)
1360 dev_hold(ndev);
1361 spin_unlock_bh(&mdev->iboe.lock);
1362
1363 if (ndev) {
1364 ret = 1;
1365 dev_put(ndev);
1366 }
1367
1368 return ret;
1369 }
1370
1371 struct mlx4_ib_steering {
1372 struct list_head list;
1373 struct mlx4_flow_reg_id reg_id;
1374 union ib_gid gid;
1375 };
1376
1377 #define LAST_ETH_FIELD vlan_tag
1378 #define LAST_IB_FIELD sl
1379 #define LAST_IPV4_FIELD dst_ip
1380 #define LAST_TCP_UDP_FIELD src_port
1381
1382 /* Field is the last supported field */
1383 #define FIELDS_NOT_SUPPORTED(filter, field)\
1384 memchr_inv((void *)&filter.field +\
1385 sizeof(filter.field), 0,\
1386 sizeof(filter) -\
1387 offsetof(typeof(filter), field) -\
1388 sizeof(filter.field))
1389
parse_flow_attr(struct mlx4_dev * dev,u32 qp_num,union ib_flow_spec * ib_spec,struct _rule_hw * mlx4_spec)1390 static int parse_flow_attr(struct mlx4_dev *dev,
1391 u32 qp_num,
1392 union ib_flow_spec *ib_spec,
1393 struct _rule_hw *mlx4_spec)
1394 {
1395 enum mlx4_net_trans_rule_id type;
1396
1397 switch (ib_spec->type) {
1398 case IB_FLOW_SPEC_ETH:
1399 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1400 return -ENOTSUPP;
1401
1402 type = MLX4_NET_TRANS_RULE_ID_ETH;
1403 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1404 ETH_ALEN);
1405 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1406 ETH_ALEN);
1407 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1408 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1409 break;
1410 case IB_FLOW_SPEC_IB:
1411 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1412 return -ENOTSUPP;
1413
1414 type = MLX4_NET_TRANS_RULE_ID_IB;
1415 mlx4_spec->ib.l3_qpn =
1416 cpu_to_be32(qp_num);
1417 mlx4_spec->ib.qpn_mask =
1418 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1419 break;
1420
1421
1422 case IB_FLOW_SPEC_IPV4:
1423 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1424 return -ENOTSUPP;
1425
1426 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1427 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1428 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1429 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1430 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1431 break;
1432
1433 case IB_FLOW_SPEC_TCP:
1434 case IB_FLOW_SPEC_UDP:
1435 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1436 return -ENOTSUPP;
1437
1438 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1439 MLX4_NET_TRANS_RULE_ID_TCP :
1440 MLX4_NET_TRANS_RULE_ID_UDP;
1441 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1442 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1443 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1444 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1445 break;
1446
1447 default:
1448 return -EINVAL;
1449 }
1450 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1451 mlx4_hw_rule_sz(dev, type) < 0)
1452 return -EINVAL;
1453 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1454 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1455 return mlx4_hw_rule_sz(dev, type);
1456 }
1457
1458 struct default_rules {
1459 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1460 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1461 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1462 __u8 link_layer;
1463 };
1464 static const struct default_rules default_table[] = {
1465 {
1466 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1467 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1468 .rules_create_list = {IB_FLOW_SPEC_IB},
1469 .link_layer = IB_LINK_LAYER_INFINIBAND
1470 }
1471 };
1472
__mlx4_ib_default_rules_match(struct ib_qp * qp,struct ib_flow_attr * flow_attr)1473 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1474 struct ib_flow_attr *flow_attr)
1475 {
1476 int i, j, k;
1477 void *ib_flow;
1478 const struct default_rules *pdefault_rules = default_table;
1479 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1480
1481 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1482 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1483 memset(&field_types, 0, sizeof(field_types));
1484
1485 if (link_layer != pdefault_rules->link_layer)
1486 continue;
1487
1488 ib_flow = flow_attr + 1;
1489 /* we assume the specs are sorted */
1490 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1491 j < flow_attr->num_of_specs; k++) {
1492 union ib_flow_spec *current_flow =
1493 (union ib_flow_spec *)ib_flow;
1494
1495 /* same layer but different type */
1496 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1497 (pdefault_rules->mandatory_fields[k] &
1498 IB_FLOW_SPEC_LAYER_MASK)) &&
1499 (current_flow->type !=
1500 pdefault_rules->mandatory_fields[k]))
1501 goto out;
1502
1503 /* same layer, try match next one */
1504 if (current_flow->type ==
1505 pdefault_rules->mandatory_fields[k]) {
1506 j++;
1507 ib_flow +=
1508 ((union ib_flow_spec *)ib_flow)->size;
1509 }
1510 }
1511
1512 ib_flow = flow_attr + 1;
1513 for (j = 0; j < flow_attr->num_of_specs;
1514 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1515 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1516 /* same layer and same type */
1517 if (((union ib_flow_spec *)ib_flow)->type ==
1518 pdefault_rules->mandatory_not_fields[k])
1519 goto out;
1520
1521 return i;
1522 }
1523 out:
1524 return -1;
1525 }
1526
__mlx4_ib_create_default_rules(struct mlx4_ib_dev * mdev,struct ib_qp * qp,const struct default_rules * pdefault_rules,struct _rule_hw * mlx4_spec)1527 static int __mlx4_ib_create_default_rules(
1528 struct mlx4_ib_dev *mdev,
1529 struct ib_qp *qp,
1530 const struct default_rules *pdefault_rules,
1531 struct _rule_hw *mlx4_spec) {
1532 int size = 0;
1533 int i;
1534
1535 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1536 int ret;
1537 union ib_flow_spec ib_spec;
1538 switch (pdefault_rules->rules_create_list[i]) {
1539 case 0:
1540 /* no rule */
1541 continue;
1542 case IB_FLOW_SPEC_IB:
1543 ib_spec.type = IB_FLOW_SPEC_IB;
1544 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1545
1546 break;
1547 default:
1548 /* invalid rule */
1549 return -EINVAL;
1550 }
1551 /* We must put empty rule, qpn is being ignored */
1552 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1553 mlx4_spec);
1554 if (ret < 0) {
1555 pr_info("invalid parsing\n");
1556 return -EINVAL;
1557 }
1558
1559 mlx4_spec = (void *)mlx4_spec + ret;
1560 size += ret;
1561 }
1562 return size;
1563 }
1564
__mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain,enum mlx4_net_trans_promisc_mode flow_type,u64 * reg_id)1565 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1566 int domain,
1567 enum mlx4_net_trans_promisc_mode flow_type,
1568 u64 *reg_id)
1569 {
1570 int ret, i;
1571 int size = 0;
1572 void *ib_flow;
1573 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1574 struct mlx4_cmd_mailbox *mailbox;
1575 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1576 int default_flow;
1577
1578 static const u16 __mlx4_domain[] = {
1579 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1580 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1581 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1582 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1583 };
1584
1585 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1586 pr_err("Invalid priority value %d\n", flow_attr->priority);
1587 return -EINVAL;
1588 }
1589
1590 if (domain >= IB_FLOW_DOMAIN_NUM) {
1591 pr_err("Invalid domain value %d\n", domain);
1592 return -EINVAL;
1593 }
1594
1595 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1596 return -EINVAL;
1597
1598 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1599 if (IS_ERR(mailbox))
1600 return PTR_ERR(mailbox);
1601 ctrl = mailbox->buf;
1602
1603 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1604 flow_attr->priority);
1605 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1606 ctrl->port = flow_attr->port;
1607 ctrl->qpn = cpu_to_be32(qp->qp_num);
1608
1609 ib_flow = flow_attr + 1;
1610 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1611 /* Add default flows */
1612 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1613 if (default_flow >= 0) {
1614 ret = __mlx4_ib_create_default_rules(
1615 mdev, qp, default_table + default_flow,
1616 mailbox->buf + size);
1617 if (ret < 0) {
1618 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1619 return -EINVAL;
1620 }
1621 size += ret;
1622 }
1623 for (i = 0; i < flow_attr->num_of_specs; i++) {
1624 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1625 mailbox->buf + size);
1626 if (ret < 0) {
1627 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1628 return -EINVAL;
1629 }
1630 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1631 size += ret;
1632 }
1633
1634 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1635 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1636 MLX4_CMD_WRAPPED);
1637 if (ret == -ENOMEM)
1638 pr_err("mcg table is full. Fail to register network rule.\n");
1639 else if (ret == -ENXIO)
1640 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1641 else if (ret)
1642 pr_err("Invalid argument. Fail to register network rule.\n");
1643
1644 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1645 return ret;
1646 }
1647
__mlx4_ib_destroy_flow(struct mlx4_dev * dev,u64 reg_id)1648 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1649 {
1650 int err;
1651 err = mlx4_cmd(dev, reg_id, 0, 0,
1652 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1653 MLX4_CMD_WRAPPED);
1654 if (err)
1655 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1656 (long long)reg_id);
1657 return err;
1658 }
1659
mlx4_ib_tunnel_steer_add(struct ib_qp * qp,struct ib_flow_attr * flow_attr,u64 * reg_id)1660 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1661 u64 *reg_id)
1662 {
1663 void *ib_flow;
1664 union ib_flow_spec *ib_spec;
1665 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1666 int err = 0;
1667
1668 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1669 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1670 return 0; /* do nothing */
1671
1672 ib_flow = flow_attr + 1;
1673 ib_spec = (union ib_flow_spec *)ib_flow;
1674
1675 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1676 return 0; /* do nothing */
1677
1678 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1679 flow_attr->port, qp->qp_num,
1680 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1681 reg_id);
1682 return err;
1683 }
1684
mlx4_ib_add_dont_trap_rule(struct mlx4_dev * dev,struct ib_flow_attr * flow_attr,enum mlx4_net_trans_promisc_mode * type)1685 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1686 struct ib_flow_attr *flow_attr,
1687 enum mlx4_net_trans_promisc_mode *type)
1688 {
1689 int err = 0;
1690
1691 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1692 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1693 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1694 return -EOPNOTSUPP;
1695 }
1696
1697 if (flow_attr->num_of_specs == 0) {
1698 type[0] = MLX4_FS_MC_SNIFFER;
1699 type[1] = MLX4_FS_UC_SNIFFER;
1700 } else {
1701 union ib_flow_spec *ib_spec;
1702
1703 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1704 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1705 return -EINVAL;
1706
1707 /* if all is zero than MC and UC */
1708 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1709 type[0] = MLX4_FS_MC_SNIFFER;
1710 type[1] = MLX4_FS_UC_SNIFFER;
1711 } else {
1712 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1713 ib_spec->eth.mask.dst_mac[1],
1714 ib_spec->eth.mask.dst_mac[2],
1715 ib_spec->eth.mask.dst_mac[3],
1716 ib_spec->eth.mask.dst_mac[4],
1717 ib_spec->eth.mask.dst_mac[5]};
1718
1719 /* Above xor was only on MC bit, non empty mask is valid
1720 * only if this bit is set and rest are zero.
1721 */
1722 if (!is_zero_ether_addr(&mac[0]))
1723 return -EINVAL;
1724
1725 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1726 type[0] = MLX4_FS_MC_SNIFFER;
1727 else
1728 type[0] = MLX4_FS_UC_SNIFFER;
1729 }
1730 }
1731
1732 return err;
1733 }
1734
mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain)1735 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1736 struct ib_flow_attr *flow_attr,
1737 int domain)
1738 {
1739 int err = 0, i = 0, j = 0;
1740 struct mlx4_ib_flow *mflow;
1741 enum mlx4_net_trans_promisc_mode type[2];
1742 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1743 int is_bonded = mlx4_is_bonded(dev);
1744
1745 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1746 return ERR_PTR(-EINVAL);
1747
1748 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1749 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1750 return ERR_PTR(-EOPNOTSUPP);
1751
1752 memset(type, 0, sizeof(type));
1753
1754 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1755 if (!mflow) {
1756 err = -ENOMEM;
1757 goto err_free;
1758 }
1759
1760 switch (flow_attr->type) {
1761 case IB_FLOW_ATTR_NORMAL:
1762 /* If dont trap flag (continue match) is set, under specific
1763 * condition traffic be replicated to given qp,
1764 * without stealing it
1765 */
1766 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1767 err = mlx4_ib_add_dont_trap_rule(dev,
1768 flow_attr,
1769 type);
1770 if (err)
1771 goto err_free;
1772 } else {
1773 type[0] = MLX4_FS_REGULAR;
1774 }
1775 break;
1776
1777 case IB_FLOW_ATTR_ALL_DEFAULT:
1778 type[0] = MLX4_FS_ALL_DEFAULT;
1779 break;
1780
1781 case IB_FLOW_ATTR_MC_DEFAULT:
1782 type[0] = MLX4_FS_MC_DEFAULT;
1783 break;
1784
1785 case IB_FLOW_ATTR_SNIFFER:
1786 type[0] = MLX4_FS_MIRROR_RX_PORT;
1787 type[1] = MLX4_FS_MIRROR_SX_PORT;
1788 break;
1789
1790 default:
1791 err = -EINVAL;
1792 goto err_free;
1793 }
1794
1795 while (i < ARRAY_SIZE(type) && type[i]) {
1796 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1797 &mflow->reg_id[i].id);
1798 if (err)
1799 goto err_create_flow;
1800 if (is_bonded) {
1801 /* Application always sees one port so the mirror rule
1802 * must be on port #2
1803 */
1804 flow_attr->port = 2;
1805 err = __mlx4_ib_create_flow(qp, flow_attr,
1806 domain, type[j],
1807 &mflow->reg_id[j].mirror);
1808 flow_attr->port = 1;
1809 if (err)
1810 goto err_create_flow;
1811 j++;
1812 }
1813
1814 i++;
1815 }
1816
1817 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1818 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1819 &mflow->reg_id[i].id);
1820 if (err)
1821 goto err_create_flow;
1822
1823 if (is_bonded) {
1824 flow_attr->port = 2;
1825 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1826 &mflow->reg_id[j].mirror);
1827 flow_attr->port = 1;
1828 if (err)
1829 goto err_create_flow;
1830 j++;
1831 }
1832 /* function to create mirror rule */
1833 i++;
1834 }
1835
1836 return &mflow->ibflow;
1837
1838 err_create_flow:
1839 while (i) {
1840 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1841 mflow->reg_id[i].id);
1842 i--;
1843 }
1844
1845 while (j) {
1846 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1847 mflow->reg_id[j].mirror);
1848 j--;
1849 }
1850 err_free:
1851 kfree(mflow);
1852 return ERR_PTR(err);
1853 }
1854
mlx4_ib_destroy_flow(struct ib_flow * flow_id)1855 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1856 {
1857 int err, ret = 0;
1858 int i = 0;
1859 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1860 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1861
1862 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1863 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1864 if (err)
1865 ret = err;
1866 if (mflow->reg_id[i].mirror) {
1867 err = __mlx4_ib_destroy_flow(mdev->dev,
1868 mflow->reg_id[i].mirror);
1869 if (err)
1870 ret = err;
1871 }
1872 i++;
1873 }
1874
1875 kfree(mflow);
1876 return ret;
1877 }
1878
mlx4_ib_mcg_attach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1879 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1880 {
1881 int err;
1882 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1883 struct mlx4_dev *dev = mdev->dev;
1884 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1885 struct mlx4_ib_steering *ib_steering = NULL;
1886 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1887 struct mlx4_flow_reg_id reg_id;
1888
1889 if (mdev->dev->caps.steering_mode ==
1890 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1891 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1892 if (!ib_steering)
1893 return -ENOMEM;
1894 }
1895
1896 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1897 !!(mqp->flags &
1898 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1899 prot, ®_id.id);
1900 if (err) {
1901 pr_err("multicast attach op failed, err %d\n", err);
1902 goto err_malloc;
1903 }
1904
1905 reg_id.mirror = 0;
1906 if (mlx4_is_bonded(dev)) {
1907 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1908 (mqp->port == 1) ? 2 : 1,
1909 !!(mqp->flags &
1910 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1911 prot, ®_id.mirror);
1912 if (err)
1913 goto err_add;
1914 }
1915
1916 err = add_gid_entry(ibqp, gid);
1917 if (err)
1918 goto err_add;
1919
1920 if (ib_steering) {
1921 memcpy(ib_steering->gid.raw, gid->raw, 16);
1922 ib_steering->reg_id = reg_id;
1923 mutex_lock(&mqp->mutex);
1924 list_add(&ib_steering->list, &mqp->steering_rules);
1925 mutex_unlock(&mqp->mutex);
1926 }
1927 return 0;
1928
1929 err_add:
1930 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1931 prot, reg_id.id);
1932 if (reg_id.mirror)
1933 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1934 prot, reg_id.mirror);
1935 err_malloc:
1936 kfree(ib_steering);
1937
1938 return err;
1939 }
1940
find_gid_entry(struct mlx4_ib_qp * qp,u8 * raw)1941 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1942 {
1943 struct mlx4_ib_gid_entry *ge;
1944 struct mlx4_ib_gid_entry *tmp;
1945 struct mlx4_ib_gid_entry *ret = NULL;
1946
1947 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1948 if (!memcmp(raw, ge->gid.raw, 16)) {
1949 ret = ge;
1950 break;
1951 }
1952 }
1953
1954 return ret;
1955 }
1956
mlx4_ib_mcg_detach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1957 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1958 {
1959 int err;
1960 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1961 struct mlx4_dev *dev = mdev->dev;
1962 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1963 struct net_device *ndev;
1964 struct mlx4_ib_gid_entry *ge;
1965 struct mlx4_flow_reg_id reg_id = {0, 0};
1966 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1967
1968 if (mdev->dev->caps.steering_mode ==
1969 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1970 struct mlx4_ib_steering *ib_steering;
1971
1972 mutex_lock(&mqp->mutex);
1973 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1974 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1975 list_del(&ib_steering->list);
1976 break;
1977 }
1978 }
1979 mutex_unlock(&mqp->mutex);
1980 if (&ib_steering->list == &mqp->steering_rules) {
1981 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1982 return -EINVAL;
1983 }
1984 reg_id = ib_steering->reg_id;
1985 kfree(ib_steering);
1986 }
1987
1988 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1989 prot, reg_id.id);
1990 if (err)
1991 return err;
1992
1993 if (mlx4_is_bonded(dev)) {
1994 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1995 prot, reg_id.mirror);
1996 if (err)
1997 return err;
1998 }
1999
2000 mutex_lock(&mqp->mutex);
2001 ge = find_gid_entry(mqp, gid->raw);
2002 if (ge) {
2003 spin_lock_bh(&mdev->iboe.lock);
2004 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2005 if (ndev)
2006 dev_hold(ndev);
2007 spin_unlock_bh(&mdev->iboe.lock);
2008 if (ndev)
2009 dev_put(ndev);
2010 list_del(&ge->list);
2011 kfree(ge);
2012 } else
2013 pr_warn("could not find mgid entry\n");
2014
2015 mutex_unlock(&mqp->mutex);
2016
2017 return 0;
2018 }
2019
init_node_data(struct mlx4_ib_dev * dev)2020 static int init_node_data(struct mlx4_ib_dev *dev)
2021 {
2022 struct ib_smp *in_mad = NULL;
2023 struct ib_smp *out_mad = NULL;
2024 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2025 int err = -ENOMEM;
2026
2027 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2028 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2029 if (!in_mad || !out_mad)
2030 goto out;
2031
2032 init_query_mad(in_mad);
2033 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2034 if (mlx4_is_master(dev->dev))
2035 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2036
2037 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2038 if (err)
2039 goto out;
2040
2041 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2042
2043 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2044
2045 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2046 if (err)
2047 goto out;
2048
2049 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2050 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2051
2052 out:
2053 kfree(in_mad);
2054 kfree(out_mad);
2055 return err;
2056 }
2057
show_hca(struct device * device,struct device_attribute * attr,char * buf)2058 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2059 char *buf)
2060 {
2061 struct mlx4_ib_dev *dev =
2062 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2063 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2064 }
2065
show_rev(struct device * device,struct device_attribute * attr,char * buf)2066 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2067 char *buf)
2068 {
2069 struct mlx4_ib_dev *dev =
2070 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2071 return sprintf(buf, "%x\n", dev->dev->rev_id);
2072 }
2073
show_board(struct device * device,struct device_attribute * attr,char * buf)2074 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2075 char *buf)
2076 {
2077 struct mlx4_ib_dev *dev =
2078 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2079 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2080 dev->dev->board_id);
2081 }
2082
2083 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
2084 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
2085 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
2086
2087 static struct device_attribute *mlx4_class_attributes[] = {
2088 &dev_attr_hw_rev,
2089 &dev_attr_hca_type,
2090 &dev_attr_board_id
2091 };
2092
2093 struct diag_counter {
2094 const char *name;
2095 u32 offset;
2096 };
2097
2098 #define DIAG_COUNTER(_name, _offset) \
2099 { .name = #_name, .offset = _offset }
2100
2101 static const struct diag_counter diag_basic[] = {
2102 DIAG_COUNTER(rq_num_lle, 0x00),
2103 DIAG_COUNTER(sq_num_lle, 0x04),
2104 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2105 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2106 DIAG_COUNTER(rq_num_lpe, 0x18),
2107 DIAG_COUNTER(sq_num_lpe, 0x1C),
2108 DIAG_COUNTER(rq_num_wrfe, 0x20),
2109 DIAG_COUNTER(sq_num_wrfe, 0x24),
2110 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2111 DIAG_COUNTER(sq_num_bre, 0x34),
2112 DIAG_COUNTER(sq_num_rire, 0x44),
2113 DIAG_COUNTER(rq_num_rire, 0x48),
2114 DIAG_COUNTER(sq_num_rae, 0x4C),
2115 DIAG_COUNTER(rq_num_rae, 0x50),
2116 DIAG_COUNTER(sq_num_roe, 0x54),
2117 DIAG_COUNTER(sq_num_tree, 0x5C),
2118 DIAG_COUNTER(sq_num_rree, 0x64),
2119 DIAG_COUNTER(rq_num_rnr, 0x68),
2120 DIAG_COUNTER(sq_num_rnr, 0x6C),
2121 DIAG_COUNTER(rq_num_oos, 0x100),
2122 DIAG_COUNTER(sq_num_oos, 0x104),
2123 };
2124
2125 static const struct diag_counter diag_ext[] = {
2126 DIAG_COUNTER(rq_num_dup, 0x130),
2127 DIAG_COUNTER(sq_num_to, 0x134),
2128 };
2129
2130 static const struct diag_counter diag_device_only[] = {
2131 DIAG_COUNTER(num_cqovf, 0x1A0),
2132 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2133 };
2134
mlx4_ib_alloc_hw_stats(struct ib_device * ibdev,u8 port_num)2135 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2136 u8 port_num)
2137 {
2138 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2139 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2140
2141 if (!diag[!!port_num].name)
2142 return NULL;
2143
2144 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2145 diag[!!port_num].num_counters,
2146 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2147 }
2148
mlx4_ib_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u8 port,int index)2149 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2150 struct rdma_hw_stats *stats,
2151 u8 port, int index)
2152 {
2153 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2154 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2155 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2156 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2157 int ret;
2158 int i;
2159
2160 ret = mlx4_query_diag_counters(dev->dev,
2161 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2162 diag[!!port].offset, hw_value,
2163 diag[!!port].num_counters, port);
2164
2165 if (ret)
2166 return ret;
2167
2168 for (i = 0; i < diag[!!port].num_counters; i++)
2169 stats->value[i] = hw_value[i];
2170
2171 return diag[!!port].num_counters;
2172 }
2173
__mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev,const char *** name,u32 ** offset,u32 * num,bool port)2174 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2175 const char ***name,
2176 u32 **offset,
2177 u32 *num,
2178 bool port)
2179 {
2180 u32 num_counters;
2181
2182 num_counters = ARRAY_SIZE(diag_basic);
2183
2184 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2185 num_counters += ARRAY_SIZE(diag_ext);
2186
2187 if (!port)
2188 num_counters += ARRAY_SIZE(diag_device_only);
2189
2190 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2191 if (!*name)
2192 return -ENOMEM;
2193
2194 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2195 if (!*offset)
2196 goto err_name;
2197
2198 *num = num_counters;
2199
2200 return 0;
2201
2202 err_name:
2203 kfree(*name);
2204 return -ENOMEM;
2205 }
2206
mlx4_ib_fill_diag_counters(struct mlx4_ib_dev * ibdev,const char ** name,u32 * offset,bool port)2207 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2208 const char **name,
2209 u32 *offset,
2210 bool port)
2211 {
2212 int i;
2213 int j;
2214
2215 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2216 name[i] = diag_basic[i].name;
2217 offset[i] = diag_basic[i].offset;
2218 }
2219
2220 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2221 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2222 name[j] = diag_ext[i].name;
2223 offset[j] = diag_ext[i].offset;
2224 }
2225 }
2226
2227 if (!port) {
2228 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2229 name[j] = diag_device_only[i].name;
2230 offset[j] = diag_device_only[i].offset;
2231 }
2232 }
2233 }
2234
mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev)2235 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2236 {
2237 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2238 int i;
2239 int ret;
2240 bool per_port = !!(ibdev->dev->caps.flags2 &
2241 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2242
2243 if (mlx4_is_slave(ibdev->dev))
2244 return 0;
2245
2246 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2247 /* i == 1 means we are building port counters */
2248 if (i && !per_port)
2249 continue;
2250
2251 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2252 &diag[i].offset,
2253 &diag[i].num_counters, i);
2254 if (ret)
2255 goto err_alloc;
2256
2257 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2258 diag[i].offset, i);
2259 }
2260
2261 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2262 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2263
2264 return 0;
2265
2266 err_alloc:
2267 if (i) {
2268 kfree(diag[i - 1].name);
2269 kfree(diag[i - 1].offset);
2270 }
2271
2272 return ret;
2273 }
2274
mlx4_ib_diag_cleanup(struct mlx4_ib_dev * ibdev)2275 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2276 {
2277 int i;
2278
2279 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2280 kfree(ibdev->diag_counters[i].offset);
2281 kfree(ibdev->diag_counters[i].name);
2282 }
2283 }
2284
2285 #define MLX4_IB_INVALID_MAC ((u64)-1)
mlx4_ib_update_qps(struct mlx4_ib_dev * ibdev,struct net_device * dev,int port)2286 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2287 struct net_device *dev,
2288 int port)
2289 {
2290 u64 new_smac = 0;
2291 u64 release_mac = MLX4_IB_INVALID_MAC;
2292 struct mlx4_ib_qp *qp;
2293
2294 new_smac = mlx4_mac_to_u64(IF_LLADDR(dev));
2295
2296 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2297
2298 /* no need for update QP1 and mac registration in non-SRIOV */
2299 if (!mlx4_is_mfunc(ibdev->dev))
2300 return;
2301
2302 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2303 qp = ibdev->qp1_proxy[port - 1];
2304 if (qp) {
2305 int new_smac_index;
2306 u64 old_smac;
2307 struct mlx4_update_qp_params update_params;
2308
2309 mutex_lock(&qp->mutex);
2310 old_smac = qp->pri.smac;
2311 if (new_smac == old_smac)
2312 goto unlock;
2313
2314 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2315
2316 if (new_smac_index < 0)
2317 goto unlock;
2318
2319 update_params.smac_index = new_smac_index;
2320 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2321 &update_params)) {
2322 release_mac = new_smac;
2323 goto unlock;
2324 }
2325 /* if old port was zero, no mac was yet registered for this QP */
2326 if (qp->pri.smac_port)
2327 release_mac = old_smac;
2328 qp->pri.smac = new_smac;
2329 qp->pri.smac_port = port;
2330 qp->pri.smac_index = new_smac_index;
2331 }
2332
2333 unlock:
2334 if (release_mac != MLX4_IB_INVALID_MAC)
2335 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2336 if (qp)
2337 mutex_unlock(&qp->mutex);
2338 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2339 }
2340
mlx4_ib_scan_netdevs(struct mlx4_ib_dev * ibdev,struct net_device * dev,unsigned long event)2341 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2342 struct net_device *dev,
2343 unsigned long event)
2344
2345 {
2346 struct mlx4_ib_iboe *iboe;
2347 int update_qps_port = -1;
2348 int port;
2349
2350 iboe = &ibdev->iboe;
2351
2352 spin_lock_bh(&iboe->lock);
2353 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2354
2355 iboe->netdevs[port - 1] =
2356 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2357
2358 if (dev == iboe->netdevs[port - 1] &&
2359 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2360 event == NETDEV_UP || event == NETDEV_CHANGE))
2361 update_qps_port = port;
2362
2363 }
2364 spin_unlock_bh(&iboe->lock);
2365
2366 if (update_qps_port > 0)
2367 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2368 }
2369
mlx4_ib_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2370 static int mlx4_ib_netdev_event(struct notifier_block *this,
2371 unsigned long event, void *ptr)
2372 {
2373 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2374 struct mlx4_ib_dev *ibdev;
2375
2376 if (!net_eq(dev_net(dev), &init_net))
2377 return NOTIFY_DONE;
2378
2379 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2380 mlx4_ib_scan_netdevs(ibdev, dev, event);
2381
2382 return NOTIFY_DONE;
2383 }
2384
init_pkeys(struct mlx4_ib_dev * ibdev)2385 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2386 {
2387 int port;
2388 int slave;
2389 int i;
2390
2391 if (mlx4_is_master(ibdev->dev)) {
2392 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2393 ++slave) {
2394 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2395 for (i = 0;
2396 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2397 ++i) {
2398 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2399 /* master has the identity virt2phys pkey mapping */
2400 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2401 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2402 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2403 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2404 }
2405 }
2406 }
2407 /* initialize pkey cache */
2408 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2409 for (i = 0;
2410 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2411 ++i)
2412 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2413 (i) ? 0 : 0xFFFF;
2414 }
2415 }
2416 }
2417
mlx4_ib_alloc_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2418 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2419 {
2420 int i, j, eq = 0, total_eqs = 0;
2421
2422 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2423 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2424 if (!ibdev->eq_table)
2425 return;
2426
2427 for (i = 1; i <= dev->caps.num_ports; i++) {
2428 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2429 j++, total_eqs++) {
2430 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2431 continue;
2432 ibdev->eq_table[eq] = total_eqs;
2433 if (!mlx4_assign_eq(dev, i,
2434 &ibdev->eq_table[eq]))
2435 eq++;
2436 else
2437 ibdev->eq_table[eq] = -1;
2438 }
2439 }
2440
2441 for (i = eq; i < dev->caps.num_comp_vectors;
2442 ibdev->eq_table[i++] = -1)
2443 ;
2444
2445 /* Advertise the new number of EQs to clients */
2446 ibdev->ib_dev.num_comp_vectors = eq;
2447 }
2448
mlx4_ib_free_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2449 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2450 {
2451 int i;
2452 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2453
2454 /* no eqs were allocated */
2455 if (!ibdev->eq_table)
2456 return;
2457
2458 /* Reset the advertised EQ number */
2459 ibdev->ib_dev.num_comp_vectors = 0;
2460
2461 for (i = 0; i < total_eqs; i++)
2462 mlx4_release_eq(dev, ibdev->eq_table[i]);
2463
2464 kfree(ibdev->eq_table);
2465 ibdev->eq_table = NULL;
2466 }
2467
mlx4_port_immutable(struct ib_device * ibdev,u8 port_num,struct ib_port_immutable * immutable)2468 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2469 struct ib_port_immutable *immutable)
2470 {
2471 struct ib_port_attr attr;
2472 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2473 int err;
2474
2475 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2476 if (err)
2477 return err;
2478
2479 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2480 immutable->gid_tbl_len = attr.gid_tbl_len;
2481
2482 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2483 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2484 } else {
2485 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2486 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2487 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2488 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2489 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2490 }
2491
2492 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2493
2494 return 0;
2495 }
2496
get_fw_ver_str(struct ib_device * device,char * str,size_t str_len)2497 static void get_fw_ver_str(struct ib_device *device, char *str,
2498 size_t str_len)
2499 {
2500 struct mlx4_ib_dev *dev =
2501 container_of(device, struct mlx4_ib_dev, ib_dev);
2502 snprintf(str, str_len, "%d.%d.%d",
2503 (int) (dev->dev->caps.fw_ver >> 32),
2504 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2505 (int) dev->dev->caps.fw_ver & 0xffff);
2506 }
2507
mlx4_ib_add(struct mlx4_dev * dev)2508 static void *mlx4_ib_add(struct mlx4_dev *dev)
2509 {
2510 struct mlx4_ib_dev *ibdev;
2511 int num_ports;
2512 int i, j;
2513 int err;
2514 struct mlx4_ib_iboe *iboe;
2515 int ib_num_ports = 0;
2516 int num_req_counters;
2517 int allocated;
2518 u32 counter_index;
2519 struct counter_index *new_counter_index = NULL;
2520
2521 pr_info_once("%s", mlx4_ib_version);
2522
2523 num_ports = 0;
2524 mlx4_foreach_ib_transport_port(i, dev)
2525 num_ports++;
2526
2527 /* No point in registering a device with no ports... */
2528 if (num_ports == 0)
2529 return NULL;
2530
2531 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2532 if (!ibdev) {
2533 dev_err(&dev->persist->pdev->dev,
2534 "Device struct alloc failed\n");
2535 return NULL;
2536 }
2537
2538 iboe = &ibdev->iboe;
2539
2540 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2541 goto err_dealloc;
2542
2543 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2544 goto err_pd;
2545
2546 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2547 PAGE_SIZE);
2548 if (!ibdev->uar_map)
2549 goto err_uar;
2550 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2551
2552 ibdev->dev = dev;
2553 ibdev->bond_next_port = 0;
2554
2555 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2556 ibdev->ib_dev.owner = THIS_MODULE;
2557 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2558 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2559 ibdev->num_ports = num_ports;
2560 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2561 1 : ibdev->num_ports;
2562 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2563 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2564 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2565 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2566 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2567
2568 if (dev->caps.userspace_caps)
2569 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2570 else
2571 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2572
2573 ibdev->ib_dev.uverbs_cmd_mask =
2574 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2575 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2576 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2577 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2578 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2579 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2580 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2581 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2582 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2583 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2584 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2585 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2586 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2587 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2588 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2589 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2590 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2591 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2592 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2593 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2594 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2595 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2596 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2597 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2598
2599 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2600 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2601 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2602 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2603 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2604 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2605 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2606 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2607 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2608 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2609 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2610 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2611 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2612 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2613 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2614 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2615 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2616 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2617 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2618 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2619 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2620 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2621 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2622 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2623 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2624 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2625 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2626 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2627 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2628 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2629 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2630 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2631 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2632 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2633 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2634 ibdev->ib_dev.reg_phys_mr = mlx4_ib_reg_phys_mr;
2635 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2636 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2637 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2638 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2639 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2640 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2641 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2642 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2643
2644 if (!mlx4_is_slave(ibdev->dev)) {
2645 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2646 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2647 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2648 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2649 }
2650
2651 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2652 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2653 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2654 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2655
2656 ibdev->ib_dev.uverbs_cmd_mask |=
2657 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2658 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2659 }
2660
2661 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2662 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2663 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2664 ibdev->ib_dev.uverbs_cmd_mask |=
2665 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2666 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2667 }
2668
2669 if (check_flow_steering_support(dev)) {
2670 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2671 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2672 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2673
2674 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2675 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2676 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2677 }
2678
2679 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2680 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2681 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2682 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2683
2684 mlx4_ib_alloc_eqs(dev, ibdev);
2685
2686 spin_lock_init(&iboe->lock);
2687
2688 if (init_node_data(ibdev))
2689 goto err_map;
2690 mlx4_init_sl2vl_tbl(ibdev);
2691
2692 for (i = 0; i < ibdev->num_ports; ++i) {
2693 mutex_init(&ibdev->counters_table[i].mutex);
2694 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2695 }
2696
2697 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2698 for (i = 0; i < num_req_counters; ++i) {
2699 mutex_init(&ibdev->qp1_proxy_lock[i]);
2700 allocated = 0;
2701 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2702 IB_LINK_LAYER_ETHERNET) {
2703 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2704 /* if failed to allocate a new counter, use default */
2705 if (err)
2706 counter_index =
2707 mlx4_get_default_counter_index(dev,
2708 i + 1);
2709 else
2710 allocated = 1;
2711 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2712 counter_index = mlx4_get_default_counter_index(dev,
2713 i + 1);
2714 }
2715 new_counter_index = kmalloc(sizeof(*new_counter_index),
2716 GFP_KERNEL);
2717 if (!new_counter_index) {
2718 if (allocated)
2719 mlx4_counter_free(ibdev->dev, counter_index);
2720 goto err_counter;
2721 }
2722 new_counter_index->index = counter_index;
2723 new_counter_index->allocated = allocated;
2724 list_add_tail(&new_counter_index->list,
2725 &ibdev->counters_table[i].counters_list);
2726 ibdev->counters_table[i].default_counter = counter_index;
2727 pr_info("counter index %d for port %d allocated %d\n",
2728 counter_index, i + 1, allocated);
2729 }
2730 if (mlx4_is_bonded(dev))
2731 for (i = 1; i < ibdev->num_ports ; ++i) {
2732 new_counter_index =
2733 kmalloc(sizeof(struct counter_index),
2734 GFP_KERNEL);
2735 if (!new_counter_index)
2736 goto err_counter;
2737 new_counter_index->index = counter_index;
2738 new_counter_index->allocated = 0;
2739 list_add_tail(&new_counter_index->list,
2740 &ibdev->counters_table[i].counters_list);
2741 ibdev->counters_table[i].default_counter =
2742 counter_index;
2743 }
2744
2745 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2746 ib_num_ports++;
2747
2748 spin_lock_init(&ibdev->sm_lock);
2749 mutex_init(&ibdev->cap_mask_mutex);
2750 INIT_LIST_HEAD(&ibdev->qp_list);
2751 spin_lock_init(&ibdev->reset_flow_resource_lock);
2752
2753 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2754 ib_num_ports) {
2755 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2756 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2757 MLX4_IB_UC_STEER_QPN_ALIGN,
2758 &ibdev->steer_qpn_base, 0);
2759 if (err)
2760 goto err_counter;
2761
2762 ibdev->ib_uc_qpns_bitmap =
2763 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2764 sizeof(long),
2765 GFP_KERNEL);
2766 if (!ibdev->ib_uc_qpns_bitmap) {
2767 dev_err(&dev->persist->pdev->dev,
2768 "bit map alloc failed\n");
2769 goto err_steer_qp_release;
2770 }
2771
2772 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2773
2774 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2775 dev, ibdev->steer_qpn_base,
2776 ibdev->steer_qpn_base +
2777 ibdev->steer_qpn_count - 1);
2778 if (err)
2779 goto err_steer_free_bitmap;
2780 }
2781
2782 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2783 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2784
2785 if (mlx4_ib_alloc_diag_counters(ibdev))
2786 goto err_steer_free_bitmap;
2787
2788 if (ib_register_device(&ibdev->ib_dev, NULL))
2789 goto err_diag_counters;
2790
2791 if (mlx4_ib_mad_init(ibdev))
2792 goto err_reg;
2793
2794 if (mlx4_ib_init_sriov(ibdev))
2795 goto err_mad;
2796
2797 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2798 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2799 if (!iboe->nb.notifier_call) {
2800 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2801 err = register_netdevice_notifier(&iboe->nb);
2802 if (err) {
2803 iboe->nb.notifier_call = NULL;
2804 goto err_notif;
2805 }
2806 }
2807 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2808 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2809 if (err) {
2810 goto err_notif;
2811 }
2812 }
2813 }
2814
2815 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2816 if (device_create_file(&ibdev->ib_dev.dev,
2817 mlx4_class_attributes[j]))
2818 goto err_notif;
2819 }
2820
2821 ibdev->ib_active = true;
2822
2823 if (mlx4_is_mfunc(ibdev->dev))
2824 init_pkeys(ibdev);
2825
2826 /* create paravirt contexts for any VFs which are active */
2827 if (mlx4_is_master(ibdev->dev)) {
2828 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2829 if (j == mlx4_master_func_num(ibdev->dev))
2830 continue;
2831 if (mlx4_is_slave_active(ibdev->dev, j))
2832 do_slave_init(ibdev, j, 1);
2833 }
2834 }
2835 return ibdev;
2836
2837 err_notif:
2838 if (ibdev->iboe.nb.notifier_call) {
2839 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2840 pr_warn("failure unregistering notifier\n");
2841 ibdev->iboe.nb.notifier_call = NULL;
2842 }
2843 flush_workqueue(wq);
2844
2845 mlx4_ib_close_sriov(ibdev);
2846
2847 err_mad:
2848 mlx4_ib_mad_cleanup(ibdev);
2849
2850 err_reg:
2851 ib_unregister_device(&ibdev->ib_dev);
2852
2853 err_diag_counters:
2854 mlx4_ib_diag_cleanup(ibdev);
2855
2856 err_steer_free_bitmap:
2857 kfree(ibdev->ib_uc_qpns_bitmap);
2858
2859 err_steer_qp_release:
2860 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2861 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2862 ibdev->steer_qpn_count);
2863 err_counter:
2864 for (i = 0; i < ibdev->num_ports; ++i)
2865 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2866
2867 err_map:
2868 iounmap(ibdev->uar_map);
2869
2870 err_uar:
2871 mlx4_uar_free(dev, &ibdev->priv_uar);
2872
2873 err_pd:
2874 mlx4_pd_free(dev, ibdev->priv_pdn);
2875
2876 err_dealloc:
2877 ib_dealloc_device(&ibdev->ib_dev);
2878
2879 return NULL;
2880 }
2881
mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev * dev,int count,int * qpn)2882 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2883 {
2884 int offset;
2885
2886 WARN_ON(!dev->ib_uc_qpns_bitmap);
2887
2888 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2889 dev->steer_qpn_count,
2890 get_count_order(count));
2891 if (offset < 0)
2892 return offset;
2893
2894 *qpn = dev->steer_qpn_base + offset;
2895 return 0;
2896 }
2897
mlx4_ib_steer_qp_free(struct mlx4_ib_dev * dev,u32 qpn,int count)2898 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2899 {
2900 if (!qpn ||
2901 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2902 return;
2903
2904 BUG_ON(qpn < dev->steer_qpn_base);
2905
2906 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2907 qpn - dev->steer_qpn_base,
2908 get_count_order(count));
2909 }
2910
mlx4_ib_steer_qp_reg(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,int is_attach)2911 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2912 int is_attach)
2913 {
2914 int err;
2915 size_t flow_size;
2916 struct ib_flow_attr *flow = NULL;
2917 struct ib_flow_spec_ib *ib_spec;
2918
2919 if (is_attach) {
2920 flow_size = sizeof(struct ib_flow_attr) +
2921 sizeof(struct ib_flow_spec_ib);
2922 flow = kzalloc(flow_size, GFP_KERNEL);
2923 if (!flow)
2924 return -ENOMEM;
2925 flow->port = mqp->port;
2926 flow->num_of_specs = 1;
2927 flow->size = flow_size;
2928 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2929 ib_spec->type = IB_FLOW_SPEC_IB;
2930 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2931 /* Add an empty rule for IB L2 */
2932 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2933
2934 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2935 IB_FLOW_DOMAIN_NIC,
2936 MLX4_FS_REGULAR,
2937 &mqp->reg_id);
2938 } else {
2939 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2940 }
2941 kfree(flow);
2942 return err;
2943 }
2944
mlx4_ib_remove(struct mlx4_dev * dev,void * ibdev_ptr)2945 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2946 {
2947 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2948 int p;
2949
2950 ibdev->ib_active = false;
2951 flush_workqueue(wq);
2952
2953 mlx4_ib_close_sriov(ibdev);
2954 mlx4_ib_mad_cleanup(ibdev);
2955 ib_unregister_device(&ibdev->ib_dev);
2956 mlx4_ib_diag_cleanup(ibdev);
2957 if (ibdev->iboe.nb.notifier_call) {
2958 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2959 pr_warn("failure unregistering notifier\n");
2960 ibdev->iboe.nb.notifier_call = NULL;
2961 }
2962
2963 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2964 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2965 ibdev->steer_qpn_count);
2966 kfree(ibdev->ib_uc_qpns_bitmap);
2967 }
2968
2969 iounmap(ibdev->uar_map);
2970 for (p = 0; p < ibdev->num_ports; ++p)
2971 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2972
2973 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2974 mlx4_CLOSE_PORT(dev, p);
2975
2976 mlx4_ib_free_eqs(dev, ibdev);
2977
2978 mlx4_uar_free(dev, &ibdev->priv_uar);
2979 mlx4_pd_free(dev, ibdev->priv_pdn);
2980 ib_dealloc_device(&ibdev->ib_dev);
2981 }
2982
do_slave_init(struct mlx4_ib_dev * ibdev,int slave,int do_init)2983 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2984 {
2985 struct mlx4_ib_demux_work **dm = NULL;
2986 struct mlx4_dev *dev = ibdev->dev;
2987 int i;
2988 unsigned long flags;
2989 struct mlx4_active_ports actv_ports;
2990 unsigned int ports;
2991 unsigned int first_port;
2992
2993 if (!mlx4_is_master(dev))
2994 return;
2995
2996 actv_ports = mlx4_get_active_ports(dev, slave);
2997 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2998 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2999
3000 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3001 if (!dm) {
3002 pr_err("failed to allocate memory for tunneling qp update\n");
3003 return;
3004 }
3005
3006 for (i = 0; i < ports; i++) {
3007 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3008 if (!dm[i]) {
3009 pr_err("failed to allocate memory for tunneling qp update work struct\n");
3010 while (--i >= 0)
3011 kfree(dm[i]);
3012 goto out;
3013 }
3014 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3015 dm[i]->port = first_port + i + 1;
3016 dm[i]->slave = slave;
3017 dm[i]->do_init = do_init;
3018 dm[i]->dev = ibdev;
3019 }
3020 /* initialize or tear down tunnel QPs for the slave */
3021 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3022 if (!ibdev->sriov.is_going_down) {
3023 for (i = 0; i < ports; i++)
3024 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3025 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3026 } else {
3027 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3028 for (i = 0; i < ports; i++)
3029 kfree(dm[i]);
3030 }
3031 out:
3032 kfree(dm);
3033 return;
3034 }
3035
mlx4_ib_handle_catas_error(struct mlx4_ib_dev * ibdev)3036 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3037 {
3038 struct mlx4_ib_qp *mqp;
3039 unsigned long flags_qp;
3040 unsigned long flags_cq;
3041 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3042 struct list_head cq_notify_list;
3043 struct mlx4_cq *mcq;
3044 unsigned long flags;
3045
3046 pr_warn("mlx4_ib_handle_catas_error was started\n");
3047 INIT_LIST_HEAD(&cq_notify_list);
3048
3049 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3050 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3051
3052 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3053 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3054 if (mqp->sq.tail != mqp->sq.head) {
3055 send_mcq = to_mcq(mqp->ibqp.send_cq);
3056 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3057 if (send_mcq->mcq.comp &&
3058 mqp->ibqp.send_cq->comp_handler) {
3059 if (!send_mcq->mcq.reset_notify_added) {
3060 send_mcq->mcq.reset_notify_added = 1;
3061 list_add_tail(&send_mcq->mcq.reset_notify,
3062 &cq_notify_list);
3063 }
3064 }
3065 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3066 }
3067 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3068 /* Now, handle the QP's receive queue */
3069 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3070 /* no handling is needed for SRQ */
3071 if (!mqp->ibqp.srq) {
3072 if (mqp->rq.tail != mqp->rq.head) {
3073 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3074 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3075 if (recv_mcq->mcq.comp &&
3076 mqp->ibqp.recv_cq->comp_handler) {
3077 if (!recv_mcq->mcq.reset_notify_added) {
3078 recv_mcq->mcq.reset_notify_added = 1;
3079 list_add_tail(&recv_mcq->mcq.reset_notify,
3080 &cq_notify_list);
3081 }
3082 }
3083 spin_unlock_irqrestore(&recv_mcq->lock,
3084 flags_cq);
3085 }
3086 }
3087 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3088 }
3089
3090 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3091 mcq->comp(mcq);
3092 }
3093 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3094 pr_warn("mlx4_ib_handle_catas_error ended\n");
3095 }
3096
handle_bonded_port_state_event(struct work_struct * work)3097 static void handle_bonded_port_state_event(struct work_struct *work)
3098 {
3099 struct ib_event_work *ew =
3100 container_of(work, struct ib_event_work, work);
3101 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3102 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3103 int i;
3104 struct ib_event ibev;
3105
3106 kfree(ew);
3107 spin_lock_bh(&ibdev->iboe.lock);
3108 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3109 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3110 enum ib_port_state curr_port_state;
3111
3112 if (!curr_netdev)
3113 continue;
3114
3115 curr_port_state =
3116 (netif_running(curr_netdev) &&
3117 netif_carrier_ok(curr_netdev)) ?
3118 IB_PORT_ACTIVE : IB_PORT_DOWN;
3119
3120 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3121 curr_port_state : IB_PORT_ACTIVE;
3122 }
3123 spin_unlock_bh(&ibdev->iboe.lock);
3124
3125 ibev.device = &ibdev->ib_dev;
3126 ibev.element.port_num = 1;
3127 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3128 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3129
3130 ib_dispatch_event(&ibev);
3131 }
3132
mlx4_ib_sl2vl_update(struct mlx4_ib_dev * mdev,int port)3133 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3134 {
3135 u64 sl2vl;
3136 int err;
3137
3138 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3139 if (err) {
3140 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3141 port, err);
3142 sl2vl = 0;
3143 }
3144 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3145 }
3146
ib_sl2vl_update_work(struct work_struct * work)3147 static void ib_sl2vl_update_work(struct work_struct *work)
3148 {
3149 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3150 struct mlx4_ib_dev *mdev = ew->ib_dev;
3151 int port = ew->port;
3152
3153 mlx4_ib_sl2vl_update(mdev, port);
3154
3155 kfree(ew);
3156 }
3157
mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev * ibdev,int port)3158 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3159 int port)
3160 {
3161 struct ib_event_work *ew;
3162
3163 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3164 if (ew) {
3165 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3166 ew->port = port;
3167 ew->ib_dev = ibdev;
3168 queue_work(wq, &ew->work);
3169 } else {
3170 pr_err("failed to allocate memory for sl2vl update work\n");
3171 }
3172 }
3173
mlx4_ib_event(struct mlx4_dev * dev,void * ibdev_ptr,enum mlx4_dev_event event,unsigned long param)3174 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3175 enum mlx4_dev_event event, unsigned long param)
3176 {
3177 struct ib_event ibev;
3178 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3179 struct mlx4_eqe *eqe = NULL;
3180 struct ib_event_work *ew;
3181 int p = 0;
3182
3183 if (mlx4_is_bonded(dev) &&
3184 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3185 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3186 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3187 if (!ew)
3188 return;
3189 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3190 ew->ib_dev = ibdev;
3191 queue_work(wq, &ew->work);
3192 return;
3193 }
3194
3195 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3196 eqe = (struct mlx4_eqe *)param;
3197 else
3198 p = (int) param;
3199
3200 switch (event) {
3201 case MLX4_DEV_EVENT_PORT_UP:
3202 if (p > ibdev->num_ports)
3203 return;
3204 if (!mlx4_is_slave(dev) &&
3205 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3206 IB_LINK_LAYER_INFINIBAND) {
3207 if (mlx4_is_master(dev))
3208 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3209 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3210 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3211 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3212 }
3213 ibev.event = IB_EVENT_PORT_ACTIVE;
3214 break;
3215
3216 case MLX4_DEV_EVENT_PORT_DOWN:
3217 if (p > ibdev->num_ports)
3218 return;
3219 ibev.event = IB_EVENT_PORT_ERR;
3220 break;
3221
3222 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3223 ibdev->ib_active = false;
3224 ibev.event = IB_EVENT_DEVICE_FATAL;
3225 mlx4_ib_handle_catas_error(ibdev);
3226 break;
3227
3228 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3229 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3230 if (!ew) {
3231 pr_err("failed to allocate memory for events work\n");
3232 break;
3233 }
3234
3235 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3236 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3237 ew->ib_dev = ibdev;
3238 /* need to queue only for port owner, which uses GEN_EQE */
3239 if (mlx4_is_master(dev))
3240 queue_work(wq, &ew->work);
3241 else
3242 handle_port_mgmt_change_event(&ew->work);
3243 return;
3244
3245 case MLX4_DEV_EVENT_SLAVE_INIT:
3246 /* here, p is the slave id */
3247 do_slave_init(ibdev, p, 1);
3248 if (mlx4_is_master(dev)) {
3249 int i;
3250
3251 for (i = 1; i <= ibdev->num_ports; i++) {
3252 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3253 == IB_LINK_LAYER_INFINIBAND)
3254 mlx4_ib_slave_alias_guid_event(ibdev,
3255 p, i,
3256 1);
3257 }
3258 }
3259 return;
3260
3261 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3262 if (mlx4_is_master(dev)) {
3263 int i;
3264
3265 for (i = 1; i <= ibdev->num_ports; i++) {
3266 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3267 == IB_LINK_LAYER_INFINIBAND)
3268 mlx4_ib_slave_alias_guid_event(ibdev,
3269 p, i,
3270 0);
3271 }
3272 }
3273 /* here, p is the slave id */
3274 do_slave_init(ibdev, p, 0);
3275 return;
3276
3277 default:
3278 return;
3279 }
3280
3281 ibev.device = ibdev_ptr;
3282 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3283
3284 ib_dispatch_event(&ibev);
3285 }
3286
3287 static struct mlx4_interface mlx4_ib_interface = {
3288 .add = mlx4_ib_add,
3289 .remove = mlx4_ib_remove,
3290 .event = mlx4_ib_event,
3291 .protocol = MLX4_PROT_IB_IPV6,
3292 .flags = MLX4_INTFF_BONDING
3293 };
3294
mlx4_ib_init(void)3295 static int __init mlx4_ib_init(void)
3296 {
3297 int err;
3298
3299 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3300 if (!wq)
3301 return -ENOMEM;
3302
3303 err = mlx4_ib_mcg_init();
3304 if (err)
3305 goto clean_wq;
3306
3307 err = mlx4_register_interface(&mlx4_ib_interface);
3308 if (err)
3309 goto clean_mcg;
3310
3311 return 0;
3312
3313 clean_mcg:
3314 mlx4_ib_mcg_destroy();
3315
3316 clean_wq:
3317 destroy_workqueue(wq);
3318 return err;
3319 }
3320
mlx4_ib_cleanup(void)3321 static void __exit mlx4_ib_cleanup(void)
3322 {
3323 mlx4_unregister_interface(&mlx4_ib_interface);
3324 mlx4_ib_mcg_destroy();
3325 destroy_workqueue(wq);
3326 }
3327
3328 module_init_order(mlx4_ib_init, SI_ORDER_SEVENTH);
3329 module_exit_order(mlx4_ib_cleanup, SI_ORDER_SEVENTH);
3330
3331 static int
mlx4ib_evhand(module_t mod,int event,void * arg)3332 mlx4ib_evhand(module_t mod, int event, void *arg)
3333 {
3334 return (0);
3335 }
3336
3337 static moduledata_t mlx4ib_mod = {
3338 .name = "mlx4ib",
3339 .evhand = mlx4ib_evhand,
3340 };
3341
3342 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY);
3343 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1);
3344 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1);
3345 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1);
3346