1 /*
2  * Copyright (c) 2005, 2006, 2007, 2008, 2014 Mellanox Technologies. All rights reserved.
3  * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #include <linux/errno.h>
35 #include <linux/mm.h>
36 #include <linux/scatterlist.h>
37 #include <linux/slab.h>
38 #include <linux/math64.h>
39 
40 #include <linux/mlx4/cmd.h>
41 
42 #include "mlx4.h"
43 #include "icm.h"
44 #include "fw.h"
45 
46 /*
47  * We allocate in as big chunks as we can, up to a maximum of 256 KB
48  * per chunk.
49  */
50 enum {
51 	MLX4_ICM_ALLOC_SIZE	= 1 << 18,
52 	MLX4_TABLE_CHUNK_SIZE	= 1 << 18
53 };
54 
mlx4_free_icm_pages(struct mlx4_dev * dev,struct mlx4_icm_chunk * chunk)55 static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
56 {
57 	int i;
58 
59 	if (chunk->nsg > 0)
60 		pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
61 			     PCI_DMA_BIDIRECTIONAL);
62 
63 	for (i = 0; i < chunk->npages; ++i)
64 		__free_pages(sg_page(&chunk->mem[i]),
65 			     get_order(chunk->mem[i].length));
66 }
67 
mlx4_free_icm_coherent(struct mlx4_dev * dev,struct mlx4_icm_chunk * chunk)68 static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
69 {
70 	int i;
71 
72 	for (i = 0; i < chunk->npages; ++i)
73 		dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
74 				  lowmem_page_address(sg_page(&chunk->mem[i])),
75 				  sg_dma_address(&chunk->mem[i]));
76 }
77 
mlx4_free_icm(struct mlx4_dev * dev,struct mlx4_icm * icm,int coherent)78 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
79 {
80 	struct mlx4_icm_chunk *chunk, *tmp;
81 
82 	if (!icm)
83 		return;
84 
85 	list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
86 		if (coherent)
87 			mlx4_free_icm_coherent(dev, chunk);
88 		else
89 			mlx4_free_icm_pages(dev, chunk);
90 
91 		kfree(chunk);
92 	}
93 
94 	kfree(icm);
95 }
96 
mlx4_alloc_icm_pages(struct scatterlist * mem,int order,gfp_t gfp_mask,int node)97 static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order,
98 				gfp_t gfp_mask, int node)
99 {
100 	struct page *page;
101 
102 	page = alloc_pages_node(node, gfp_mask, order);
103 	if (!page) {
104 		page = alloc_pages(gfp_mask, order);
105 		if (!page)
106 			return -ENOMEM;
107 	}
108 
109 	sg_set_page(mem, page, PAGE_SIZE << order, 0);
110 	return 0;
111 }
112 
mlx4_alloc_icm_coherent(struct device * dev,struct scatterlist * mem,int order,gfp_t gfp_mask)113 static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
114 				    int order, gfp_t gfp_mask)
115 {
116 	void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
117 				       &sg_dma_address(mem), gfp_mask);
118 	if (!buf)
119 		return -ENOMEM;
120 
121 	sg_set_buf(mem, buf, PAGE_SIZE << order);
122 	BUG_ON(mem->offset);
123 	sg_dma_len(mem) = PAGE_SIZE << order;
124 	return 0;
125 }
126 
mlx4_alloc_icm(struct mlx4_dev * dev,int npages,gfp_t gfp_mask,int coherent)127 struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
128 				gfp_t gfp_mask, int coherent)
129 {
130 	struct mlx4_icm *icm;
131 	struct mlx4_icm_chunk *chunk = NULL;
132 	int cur_order;
133 	int ret;
134 
135 	/* We use sg_set_buf for coherent allocs, which assumes low memory */
136 	BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
137 
138 	icm = kmalloc_node(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN),
139 			   dev->numa_node);
140 	if (!icm) {
141 		icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
142 		if (!icm)
143 			return NULL;
144 	}
145 
146 	icm->refcount = 0;
147 	INIT_LIST_HEAD(&icm->chunk_list);
148 
149 	cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
150 
151 	while (npages > 0) {
152 		if (!chunk) {
153 			chunk = kmalloc_node(sizeof *chunk,
154 					     gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN),
155 					     dev->numa_node);
156 			if (!chunk) {
157 				chunk = kmalloc(sizeof *chunk,
158 						gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
159 				if (!chunk)
160 					goto fail;
161 			}
162 
163 			sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN);
164 			chunk->npages = 0;
165 			chunk->nsg    = 0;
166 			list_add_tail(&chunk->list, &icm->chunk_list);
167 		}
168 
169 		while (1 << cur_order > npages)
170 			--cur_order;
171 
172 		if (coherent)
173 			ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
174 						      &chunk->mem[chunk->npages],
175 						      cur_order, gfp_mask);
176 		else
177 			ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
178 						   cur_order, gfp_mask,
179 						   dev->numa_node);
180 
181 		if (ret) {
182 			if (--cur_order < 0)
183 				goto fail;
184 			else
185 				continue;
186 		}
187 
188 		++chunk->npages;
189 
190 		if (coherent)
191 			++chunk->nsg;
192 		else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
193 			chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
194 						chunk->npages,
195 						PCI_DMA_BIDIRECTIONAL);
196 
197 			if (chunk->nsg <= 0)
198 				goto fail;
199 		}
200 
201 		if (chunk->npages == MLX4_ICM_CHUNK_LEN)
202 			chunk = NULL;
203 
204 		npages -= 1 << cur_order;
205 	}
206 
207 	if (!coherent && chunk) {
208 		chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
209 					chunk->npages,
210 					PCI_DMA_BIDIRECTIONAL);
211 
212 		if (chunk->nsg <= 0)
213 			goto fail;
214 	}
215 
216 	return icm;
217 
218 fail:
219 	mlx4_free_icm(dev, icm, coherent);
220 	return NULL;
221 }
222 
mlx4_MAP_ICM(struct mlx4_dev * dev,struct mlx4_icm * icm,u64 virt)223 static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
224 {
225 	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
226 }
227 
mlx4_UNMAP_ICM(struct mlx4_dev * dev,u64 virt,u32 page_count)228 static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
229 {
230 	return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
231 			MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
232 }
233 
mlx4_MAP_ICM_AUX(struct mlx4_dev * dev,struct mlx4_icm * icm)234 int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
235 {
236 	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
237 }
238 
mlx4_UNMAP_ICM_AUX(struct mlx4_dev * dev)239 int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
240 {
241 	return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
242 			MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
243 }
244 
mlx4_table_get(struct mlx4_dev * dev,struct mlx4_icm_table * table,u32 obj)245 int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
246 {
247 	u32 i = (obj & (table->num_obj - 1)) /
248 			(MLX4_TABLE_CHUNK_SIZE / table->obj_size);
249 	int ret = 0;
250 
251 	mutex_lock(&table->mutex);
252 
253 	if (table->icm[i]) {
254 		++table->icm[i]->refcount;
255 		goto out;
256 	}
257 
258 	table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
259 				       (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
260 				       __GFP_NOWARN, table->coherent);
261 	if (!table->icm[i]) {
262 		ret = -ENOMEM;
263 		goto out;
264 	}
265 
266 	if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
267 			 (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
268 		mlx4_free_icm(dev, table->icm[i], table->coherent);
269 		table->icm[i] = NULL;
270 		ret = -ENOMEM;
271 		goto out;
272 	}
273 
274 	++table->icm[i]->refcount;
275 
276 out:
277 	mutex_unlock(&table->mutex);
278 	return ret;
279 }
280 
mlx4_table_put(struct mlx4_dev * dev,struct mlx4_icm_table * table,u32 obj)281 void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
282 {
283 	u32 i;
284 	u64 offset;
285 
286 	i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
287 
288 	mutex_lock(&table->mutex);
289 
290 	if (--table->icm[i]->refcount == 0) {
291 		offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
292 
293 		if (!mlx4_UNMAP_ICM(dev, table->virt + offset,
294 				    MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE)) {
295 			mlx4_free_icm(dev, table->icm[i], table->coherent);
296 			table->icm[i] = NULL;
297 		} else {
298 			pr_warn("mlx4_core: mlx4_UNMAP_ICM failed.\n");
299 		}
300 	}
301 
302 	mutex_unlock(&table->mutex);
303 }
304 
mlx4_table_find(struct mlx4_icm_table * table,u32 obj,dma_addr_t * dma_handle)305 void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
306 			dma_addr_t *dma_handle)
307 {
308 	int offset, dma_offset, i;
309 	u64 idx;
310 	struct mlx4_icm_chunk *chunk;
311 	struct mlx4_icm *icm;
312 	struct page *page = NULL;
313 
314 	if (!table->lowmem)
315 		return NULL;
316 
317 	mutex_lock(&table->mutex);
318 
319 	idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
320 	icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
321 	dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
322 
323 	if (!icm)
324 		goto out;
325 
326 	list_for_each_entry(chunk, &icm->chunk_list, list) {
327 		for (i = 0; i < chunk->npages; ++i) {
328 			if (dma_handle && dma_offset >= 0) {
329 				if (sg_dma_len(&chunk->mem[i]) > dma_offset)
330 					*dma_handle = sg_dma_address(&chunk->mem[i]) +
331 						dma_offset;
332 				dma_offset -= sg_dma_len(&chunk->mem[i]);
333 			}
334 			/*
335 			 * DMA mapping can merge pages but not split them,
336 			 * so if we found the page, dma_handle has already
337 			 * been assigned to.
338 			 */
339 			if (chunk->mem[i].length > offset) {
340 				page = sg_page(&chunk->mem[i]);
341 				goto out;
342 			}
343 			offset -= chunk->mem[i].length;
344 		}
345 	}
346 
347 out:
348 	mutex_unlock(&table->mutex);
349 	return page ? lowmem_page_address(page) + offset : NULL;
350 }
351 
mlx4_table_get_range(struct mlx4_dev * dev,struct mlx4_icm_table * table,u32 start,u32 end)352 int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
353 			 u32 start, u32 end)
354 {
355 	int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
356 	int err;
357 	u32 i;
358 
359 	for (i = start; i <= end; i += inc) {
360 		err = mlx4_table_get(dev, table, i);
361 		if (err)
362 			goto fail;
363 	}
364 
365 	return 0;
366 
367 fail:
368 	while (i > start) {
369 		i -= inc;
370 		mlx4_table_put(dev, table, i);
371 	}
372 
373 	return err;
374 }
375 
mlx4_table_put_range(struct mlx4_dev * dev,struct mlx4_icm_table * table,u32 start,u32 end)376 void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
377 			  u32 start, u32 end)
378 {
379 	u32 i;
380 
381 	for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
382 		mlx4_table_put(dev, table, i);
383 }
384 
mlx4_init_icm_table(struct mlx4_dev * dev,struct mlx4_icm_table * table,u64 virt,int obj_size,u64 nobj,int reserved,int use_lowmem,int use_coherent)385 int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
386 			u64 virt, int obj_size,	u64 nobj, int reserved,
387 			int use_lowmem, int use_coherent)
388 {
389 	int obj_per_chunk;
390 	int num_icm;
391 	unsigned chunk_size;
392 	int i;
393 	u64 size;
394 
395 	obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
396 	num_icm = div_u64((nobj + obj_per_chunk - 1), obj_per_chunk);
397 
398 	table->icm      = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
399 	if (!table->icm)
400 		return -ENOMEM;
401 	table->virt     = virt;
402 	table->num_icm  = num_icm;
403 	table->num_obj  = nobj;
404 	table->obj_size = obj_size;
405 	table->lowmem   = use_lowmem;
406 	table->coherent = use_coherent;
407 	mutex_init(&table->mutex);
408 
409 	size = (u64) nobj * obj_size;
410 	for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
411 		chunk_size = MLX4_TABLE_CHUNK_SIZE;
412 		if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
413 			chunk_size = PAGE_ALIGN(size -
414 					i * MLX4_TABLE_CHUNK_SIZE);
415 
416 		table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
417 					       (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
418 					       __GFP_NOWARN, use_coherent);
419 		if (!table->icm[i])
420 			goto err;
421 		if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
422 			mlx4_free_icm(dev, table->icm[i], use_coherent);
423 			table->icm[i] = NULL;
424 			goto err;
425 		}
426 
427 		/*
428 		 * Add a reference to this ICM chunk so that it never
429 		 * gets freed (since it contains reserved firmware objects).
430 		 */
431 		++table->icm[i]->refcount;
432 	}
433 
434 	return 0;
435 
436 err:
437 	for (i = 0; i < num_icm; ++i)
438 		if (table->icm[i]) {
439 			if (!mlx4_UNMAP_ICM(dev,
440 					    virt + i * MLX4_TABLE_CHUNK_SIZE,
441 					    MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE)) {
442 				mlx4_free_icm(dev, table->icm[i], use_coherent);
443 			} else {
444 				pr_warn("mlx4_core: mlx4_UNMAP_ICM failed.\n");
445 				return -ENOMEM;
446 			}
447 		}
448 	kfree(table->icm);
449 
450 	return -ENOMEM;
451 }
452 
mlx4_cleanup_icm_table(struct mlx4_dev * dev,struct mlx4_icm_table * table)453 void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
454 {
455 	int i, err = 0;
456 
457 	for (i = 0; i < table->num_icm; ++i)
458 		if (table->icm[i]) {
459 			err = mlx4_UNMAP_ICM(dev,
460 					     table->virt + i * MLX4_TABLE_CHUNK_SIZE,
461 					     MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
462 			if (!err) {
463 				mlx4_free_icm(dev, table->icm[i],
464 					      table->coherent);
465 			} else {
466 				pr_warn("mlx4_core: mlx4_UNMAP_ICM failed.\n");
467 				break;
468 			}
469 		}
470 
471 	if (!err)
472 		kfree(table->icm);
473 }
474