1 /*- 2 * Copyright(c) 2002-2011 Exar Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification are permitted provided the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Exar Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 #ifndef VXGE_HAL_MRPCIM_H 34 #define VXGE_HAL_MRPCIM_H 35 36 __EXTERN_BEGIN_DECLS 37 38 /* 39 * __hal_mrpcim_t 40 * 41 * HAL mrpcim object. Represents privileged mode device. 42 */ 43 typedef struct __hal_mrpcim_t { 44 u32 mdio_phy_prtad0; 45 u32 mdio_phy_prtad1; 46 u32 mdio_dte_prtad0; 47 u32 mdio_dte_prtad1; 48 vxge_hal_vpd_data_t vpd_data; 49 __hal_blockpool_entry_t *mrpcim_stats_block; 50 vxge_hal_mrpcim_stats_hw_info_t *mrpcim_stats; 51 vxge_hal_mrpcim_stats_hw_info_t mrpcim_stats_sav; 52 vxge_hal_mrpcim_xpak_stats_t xpak_stats[VXGE_HAL_MAC_MAX_WIRE_PORTS]; 53 } __hal_mrpcim_t; 54 55 #define VXGE_HAL_MRPCIM_STATS_PIO_READ(loc, offset) { \ 56 status = vxge_hal_mrpcim_stats_access(devh, \ 57 VXGE_HAL_STATS_OP_READ, \ 58 loc, \ 59 offset, \ 60 &val64); \ 61 \ 62 if (status != VXGE_HAL_OK) { \ 63 vxge_hal_trace_log_stats("<== %s:%s:%d Result = %d", \ 64 __FILE__, __func__, __LINE__, status); \ 65 return (status); \ 66 } \ 67 } 68 69 #define VXGE_HAL_MRPCIM_ERROR_REG_CLEAR(reg) \ 70 vxge_os_pio_mem_write64( \ 71 hldev->header.pdev, \ 72 hldev->header.regh0, \ 73 VXGE_HAL_INTR_MASK_ALL, \ 74 (reg)); 75 76 #define VXGE_HAL_MRPCIM_ERROR_REG_MASK(reg) \ 77 vxge_os_pio_mem_write64( \ 78 hldev->header.pdev, \ 79 hldev->header.regh0, \ 80 VXGE_HAL_INTR_MASK_ALL, \ 81 (reg)); 82 83 #define VXGE_HAL_MRPCIM_ERROR_REG_UNMASK(mask, reg) \ 84 vxge_os_pio_mem_write64( \ 85 hldev->header.pdev, \ 86 hldev->header.regh0, \ 87 ~mask, \ 88 (reg)); 89 90 vxge_hal_status_e 91 __hal_mrpcim_mdio_access( 92 vxge_hal_device_h devh, 93 u32 port, 94 u32 operation, 95 u32 device, 96 u16 addr, 97 u16 *data); 98 99 vxge_hal_status_e 100 __hal_mrpcim_rts_table_access( 101 vxge_hal_device_h devh, 102 u32 action, 103 u32 rts_table, 104 u32 offset, 105 u64 *data1, 106 u64 *data2, 107 u64 *vpath_vector); 108 109 vxge_hal_status_e 110 __hal_mrpcim_initialize(__hal_device_t *hldev); 111 112 vxge_hal_status_e 113 __hal_mrpcim_terminate(__hal_device_t *hldev); 114 115 void 116 __hal_mrpcim_get_vpd_data(__hal_device_t *hldev); 117 118 void 119 __hal_mrpcim_xpak_counter_check(__hal_device_t *hldev, 120 u32 port, u32 type, u32 value); 121 122 vxge_hal_status_e 123 __hal_mrpcim_stats_get( 124 __hal_device_t *hldev, 125 vxge_hal_mrpcim_stats_hw_info_t *mrpcim_stats); 126 127 vxge_hal_status_e 128 __hal_mrpcim_mac_configure(__hal_device_t *hldev); 129 130 vxge_hal_status_e 131 __hal_mrpcim_lag_configure(__hal_device_t *hldev); 132 133 __EXTERN_END_DECLS 134 135 #endif /* VXGE_HAL_MRPCIM_H */ 136