1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1990 The Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
33 */
34
35 #include <sys/cdefs.h>
36 #include "opt_capsicum.h"
37 #include "opt_ktrace.h"
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/capsicum.h>
42 #include <sys/kernel.h>
43 #include <sys/ktrace.h>
44 #include <sys/lock.h>
45 #include <sys/malloc.h>
46 #include <sys/mutex.h>
47 #include <sys/pcpu.h>
48 #include <sys/priv.h>
49 #include <sys/proc.h>
50 #include <sys/smp.h>
51 #include <sys/sysent.h>
52 #include <sys/sysproto.h>
53 #include <sys/uio.h>
54
55 #include <vm/vm.h>
56 #include <vm/pmap.h>
57 #include <vm/vm_kern.h> /* for kernel_map */
58 #include <vm/vm_map.h>
59 #include <vm/vm_extern.h>
60
61 #include <machine/frame.h>
62 #include <machine/md_var.h>
63 #include <machine/pcb.h>
64 #include <machine/specialreg.h>
65 #include <machine/sysarch.h>
66 #include <machine/tss.h>
67 #include <machine/vmparam.h>
68
69 #include <security/audit/audit.h>
70
71 static void user_ldt_deref(struct proc_ldt *pldt);
72 static void user_ldt_derefl(struct proc_ldt *pldt);
73
74 #define MAX_LD 8192
75
76 int max_ldt_segment = 512;
77 SYSCTL_INT(_machdep, OID_AUTO, max_ldt_segment, CTLFLAG_RDTUN,
78 &max_ldt_segment, 0,
79 "Maximum number of allowed LDT segments in the single address space");
80
81 static void
max_ldt_segment_init(void * arg __unused)82 max_ldt_segment_init(void *arg __unused)
83 {
84
85 if (max_ldt_segment <= 0)
86 max_ldt_segment = 1;
87 if (max_ldt_segment > MAX_LD)
88 max_ldt_segment = MAX_LD;
89 }
90 SYSINIT(maxldt, SI_SUB_VM_CONF, SI_ORDER_ANY, max_ldt_segment_init, NULL);
91
92 #ifndef _SYS_SYSPROTO_H_
93 struct sysarch_args {
94 int op;
95 char *parms;
96 };
97 #endif
98
99 int
sysarch_ldt(struct thread * td,struct sysarch_args * uap,int uap_space)100 sysarch_ldt(struct thread *td, struct sysarch_args *uap, int uap_space)
101 {
102 struct i386_ldt_args *largs, la;
103 struct user_segment_descriptor *lp;
104 int error = 0;
105
106 /*
107 * XXXKIB check that the BSM generation code knows to encode
108 * the op argument.
109 */
110 AUDIT_ARG_CMD(uap->op);
111 if (uap_space == UIO_USERSPACE) {
112 error = copyin(uap->parms, &la, sizeof(struct i386_ldt_args));
113 if (error != 0)
114 return (error);
115 largs = &la;
116 } else
117 largs = (struct i386_ldt_args *)uap->parms;
118
119 switch (uap->op) {
120 case I386_GET_LDT:
121 error = amd64_get_ldt(td, largs);
122 break;
123 case I386_SET_LDT:
124 if (largs->descs != NULL && largs->num > max_ldt_segment)
125 return (EINVAL);
126 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
127 if (largs->descs != NULL) {
128 lp = malloc(largs->num * sizeof(struct
129 user_segment_descriptor), M_TEMP, M_WAITOK);
130 error = copyin(largs->descs, lp, largs->num *
131 sizeof(struct user_segment_descriptor));
132 if (error == 0)
133 error = amd64_set_ldt(td, largs, lp);
134 free(lp, M_TEMP);
135 } else {
136 error = amd64_set_ldt(td, largs, NULL);
137 }
138 break;
139 }
140 return (error);
141 }
142
143 void
update_gdt_gsbase(struct thread * td,uint32_t base)144 update_gdt_gsbase(struct thread *td, uint32_t base)
145 {
146 struct user_segment_descriptor *sd;
147
148 if (td != curthread)
149 return;
150 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
151 critical_enter();
152 sd = PCPU_GET(gs32p);
153 sd->sd_lobase = base & 0xffffff;
154 sd->sd_hibase = (base >> 24) & 0xff;
155 critical_exit();
156 }
157
158 void
update_gdt_fsbase(struct thread * td,uint32_t base)159 update_gdt_fsbase(struct thread *td, uint32_t base)
160 {
161 struct user_segment_descriptor *sd;
162
163 if (td != curthread)
164 return;
165 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
166 critical_enter();
167 sd = PCPU_GET(fs32p);
168 sd->sd_lobase = base & 0xffffff;
169 sd->sd_hibase = (base >> 24) & 0xff;
170 critical_exit();
171 }
172
173 int
sysarch(struct thread * td,struct sysarch_args * uap)174 sysarch(struct thread *td, struct sysarch_args *uap)
175 {
176 struct pcb *pcb;
177 struct vm_map *map;
178 uint32_t i386base;
179 uint64_t a64base;
180 struct i386_ioperm_args iargs;
181 struct i386_get_xfpustate i386xfpu;
182 struct i386_set_pkru i386pkru;
183 struct amd64_get_xfpustate a64xfpu;
184 struct amd64_set_pkru a64pkru;
185 int error;
186
187 #ifdef CAPABILITY_MODE
188 /*
189 * When adding new operations, add a new case statement here to
190 * explicitly indicate whether or not the operation is safe to
191 * perform in capability mode.
192 */
193 switch (uap->op) {
194 case I386_GET_LDT:
195 case I386_SET_LDT:
196 case I386_GET_IOPERM:
197 case I386_GET_FSBASE:
198 case I386_SET_FSBASE:
199 case I386_GET_GSBASE:
200 case I386_SET_GSBASE:
201 case I386_GET_XFPUSTATE:
202 case I386_SET_PKRU:
203 case I386_CLEAR_PKRU:
204 case AMD64_GET_FSBASE:
205 case AMD64_SET_FSBASE:
206 case AMD64_GET_GSBASE:
207 case AMD64_SET_GSBASE:
208 case AMD64_GET_XFPUSTATE:
209 case AMD64_SET_PKRU:
210 case AMD64_CLEAR_PKRU:
211 break;
212
213 case I386_SET_IOPERM:
214 default:
215 if (CAP_TRACING(td))
216 ktrcapfail(CAPFAIL_SYSCALL, &uap->op);
217 if (IN_CAPABILITY_MODE(td))
218 return (ECAPMODE);
219 break;
220 }
221 #endif
222
223 if (uap->op == I386_GET_LDT || uap->op == I386_SET_LDT)
224 return (sysarch_ldt(td, uap, UIO_USERSPACE));
225
226 error = 0;
227 pcb = td->td_pcb;
228
229 /*
230 * XXXKIB check that the BSM generation code knows to encode
231 * the op argument.
232 */
233 AUDIT_ARG_CMD(uap->op);
234 switch (uap->op) {
235 case I386_GET_IOPERM:
236 case I386_SET_IOPERM:
237 if ((error = copyin(uap->parms, &iargs,
238 sizeof(struct i386_ioperm_args))) != 0)
239 return (error);
240 break;
241 case I386_GET_XFPUSTATE:
242 if ((error = copyin(uap->parms, &i386xfpu,
243 sizeof(struct i386_get_xfpustate))) != 0)
244 return (error);
245 a64xfpu.addr = (void *)(uintptr_t)i386xfpu.addr;
246 a64xfpu.len = i386xfpu.len;
247 break;
248 case I386_SET_PKRU:
249 case I386_CLEAR_PKRU:
250 if ((error = copyin(uap->parms, &i386pkru,
251 sizeof(struct i386_set_pkru))) != 0)
252 return (error);
253 a64pkru.addr = (void *)(uintptr_t)i386pkru.addr;
254 a64pkru.len = i386pkru.len;
255 a64pkru.keyidx = i386pkru.keyidx;
256 a64pkru.flags = i386pkru.flags;
257 break;
258 case AMD64_GET_XFPUSTATE:
259 if ((error = copyin(uap->parms, &a64xfpu,
260 sizeof(struct amd64_get_xfpustate))) != 0)
261 return (error);
262 break;
263 case AMD64_SET_PKRU:
264 case AMD64_CLEAR_PKRU:
265 if ((error = copyin(uap->parms, &a64pkru,
266 sizeof(struct amd64_set_pkru))) != 0)
267 return (error);
268 break;
269 default:
270 break;
271 }
272
273 switch (uap->op) {
274 case I386_GET_IOPERM:
275 error = amd64_get_ioperm(td, &iargs);
276 if (error == 0)
277 error = copyout(&iargs, uap->parms,
278 sizeof(struct i386_ioperm_args));
279 break;
280 case I386_SET_IOPERM:
281 error = amd64_set_ioperm(td, &iargs);
282 break;
283 case I386_GET_FSBASE:
284 update_pcb_bases(pcb);
285 i386base = pcb->pcb_fsbase;
286 error = copyout(&i386base, uap->parms, sizeof(i386base));
287 break;
288 case I386_SET_FSBASE:
289 error = copyin(uap->parms, &i386base, sizeof(i386base));
290 if (error == 0) {
291 set_pcb_flags(pcb, PCB_FULL_IRET);
292 pcb->pcb_fsbase = i386base;
293 td->td_frame->tf_fs = _ufssel;
294 update_gdt_fsbase(td, i386base);
295 }
296 break;
297 case I386_GET_GSBASE:
298 update_pcb_bases(pcb);
299 i386base = pcb->pcb_gsbase;
300 error = copyout(&i386base, uap->parms, sizeof(i386base));
301 break;
302 case I386_SET_GSBASE:
303 error = copyin(uap->parms, &i386base, sizeof(i386base));
304 if (error == 0) {
305 set_pcb_flags(pcb, PCB_FULL_IRET);
306 pcb->pcb_gsbase = i386base;
307 td->td_frame->tf_gs = _ugssel;
308 update_gdt_gsbase(td, i386base);
309 }
310 break;
311 case AMD64_GET_FSBASE:
312 update_pcb_bases(pcb);
313 error = copyout(&pcb->pcb_fsbase, uap->parms,
314 sizeof(pcb->pcb_fsbase));
315 break;
316
317 case AMD64_SET_FSBASE:
318 error = copyin(uap->parms, &a64base, sizeof(a64base));
319 if (error == 0) {
320 if (a64base < curproc->p_sysent->sv_maxuser) {
321 set_pcb_flags(pcb, PCB_FULL_IRET);
322 pcb->pcb_fsbase = a64base;
323 td->td_frame->tf_fs = _ufssel;
324 } else
325 error = EINVAL;
326 }
327 break;
328
329 case AMD64_GET_GSBASE:
330 update_pcb_bases(pcb);
331 error = copyout(&pcb->pcb_gsbase, uap->parms,
332 sizeof(pcb->pcb_gsbase));
333 break;
334
335 case AMD64_SET_GSBASE:
336 error = copyin(uap->parms, &a64base, sizeof(a64base));
337 if (error == 0) {
338 if (a64base < curproc->p_sysent->sv_maxuser) {
339 set_pcb_flags(pcb, PCB_FULL_IRET);
340 pcb->pcb_gsbase = a64base;
341 td->td_frame->tf_gs = _ugssel;
342 } else
343 error = EINVAL;
344 }
345 break;
346
347 case I386_GET_XFPUSTATE:
348 case AMD64_GET_XFPUSTATE:
349 if (a64xfpu.len > cpu_max_ext_state_size -
350 sizeof(struct savefpu))
351 return (EINVAL);
352 fpugetregs(td);
353 error = copyout((char *)(get_pcb_user_save_td(td) + 1),
354 a64xfpu.addr, a64xfpu.len);
355 break;
356
357 case I386_SET_PKRU:
358 case AMD64_SET_PKRU:
359 /*
360 * Read-lock the map to synchronize with parallel
361 * pmap_vmspace_copy() on fork.
362 */
363 map = &td->td_proc->p_vmspace->vm_map;
364 vm_map_lock_read(map);
365 error = pmap_pkru_set(PCPU_GET(curpmap),
366 (vm_offset_t)a64pkru.addr, (vm_offset_t)a64pkru.addr +
367 a64pkru.len, a64pkru.keyidx, a64pkru.flags);
368 vm_map_unlock_read(map);
369 break;
370
371 case I386_CLEAR_PKRU:
372 case AMD64_CLEAR_PKRU:
373 if (a64pkru.flags != 0 || a64pkru.keyidx != 0) {
374 error = EINVAL;
375 break;
376 }
377 map = &td->td_proc->p_vmspace->vm_map;
378 vm_map_lock_read(map);
379 error = pmap_pkru_clear(PCPU_GET(curpmap),
380 (vm_offset_t)a64pkru.addr,
381 (vm_offset_t)a64pkru.addr + a64pkru.len);
382 vm_map_unlock_read(map);
383 break;
384
385 default:
386 error = EINVAL;
387 break;
388 }
389 return (error);
390 }
391
392 int
amd64_set_ioperm(struct thread * td,struct i386_ioperm_args * uap)393 amd64_set_ioperm(struct thread *td, struct i386_ioperm_args *uap)
394 {
395 char *iomap;
396 struct amd64tss *tssp;
397 struct system_segment_descriptor *tss_sd;
398 struct pcb *pcb;
399 u_int i;
400 int error;
401
402 if ((error = priv_check(td, PRIV_IO)) != 0)
403 return (error);
404 if ((error = securelevel_gt(td->td_ucred, 0)) != 0)
405 return (error);
406 if (uap->start > uap->start + uap->length ||
407 uap->start + uap->length > IOPAGES * PAGE_SIZE * NBBY)
408 return (EINVAL);
409
410 /*
411 * XXX
412 * While this is restricted to root, we should probably figure out
413 * whether any other driver is using this i/o address, as so not to
414 * cause confusion. This probably requires a global 'usage registry'.
415 */
416 pcb = td->td_pcb;
417 if (pcb->pcb_tssp == NULL) {
418 tssp = kmem_malloc(ctob(IOPAGES + 1), M_WAITOK);
419 pmap_pti_add_kva((vm_offset_t)tssp, (vm_offset_t)tssp +
420 ctob(IOPAGES + 1), false);
421 iomap = (char *)&tssp[1];
422 memset(iomap, 0xff, IOPERM_BITMAP_SIZE);
423 critical_enter();
424 /* Takes care of tss_rsp0. */
425 memcpy(tssp, PCPU_PTR(common_tss), sizeof(struct amd64tss));
426 tssp->tss_iobase = sizeof(*tssp);
427 pcb->pcb_tssp = tssp;
428 tss_sd = PCPU_GET(tss);
429 tss_sd->sd_lobase = (u_long)tssp & 0xffffff;
430 tss_sd->sd_hibase = ((u_long)tssp >> 24) & 0xfffffffffful;
431 tss_sd->sd_type = SDT_SYSTSS;
432 ltr(GSEL(GPROC0_SEL, SEL_KPL));
433 PCPU_SET(tssp, tssp);
434 critical_exit();
435 } else
436 iomap = (char *)&pcb->pcb_tssp[1];
437 for (i = uap->start; i < uap->start + uap->length; i++) {
438 if (uap->enable)
439 iomap[i >> 3] &= ~(1 << (i & 7));
440 else
441 iomap[i >> 3] |= (1 << (i & 7));
442 }
443 return (error);
444 }
445
446 int
amd64_get_ioperm(struct thread * td,struct i386_ioperm_args * uap)447 amd64_get_ioperm(struct thread *td, struct i386_ioperm_args *uap)
448 {
449 int i, state;
450 char *iomap;
451
452 if (uap->start >= IOPAGES * PAGE_SIZE * NBBY)
453 return (EINVAL);
454 if (td->td_pcb->pcb_tssp == NULL) {
455 uap->length = 0;
456 goto done;
457 }
458
459 iomap = (char *)&td->td_pcb->pcb_tssp[1];
460
461 i = uap->start;
462 state = (iomap[i >> 3] >> (i & 7)) & 1;
463 uap->enable = !state;
464 uap->length = 1;
465
466 for (i = uap->start + 1; i < IOPAGES * PAGE_SIZE * NBBY; i++) {
467 if (state != ((iomap[i >> 3] >> (i & 7)) & 1))
468 break;
469 uap->length++;
470 }
471
472 done:
473 return (0);
474 }
475
476 /*
477 * Update the GDT entry pointing to the LDT to point to the LDT of the
478 * current process.
479 */
480 static void
set_user_ldt(struct mdproc * mdp)481 set_user_ldt(struct mdproc *mdp)
482 {
483
484 *PCPU_GET(ldt) = mdp->md_ldt_sd;
485 lldt(GSEL(GUSERLDT_SEL, SEL_KPL));
486 }
487
488 static void
set_user_ldt_rv(void * arg)489 set_user_ldt_rv(void *arg)
490 {
491 struct proc *orig, *target;
492 struct proc_ldt *ldt;
493
494 orig = arg;
495 target = curthread->td_proc;
496
497 ldt = (void *)atomic_load_acq_ptr((uintptr_t *)&orig->p_md.md_ldt);
498 if (target->p_md.md_ldt != ldt)
499 return;
500
501 set_user_ldt(&target->p_md);
502 }
503
504 struct proc_ldt *
user_ldt_alloc(struct proc * p,int force)505 user_ldt_alloc(struct proc *p, int force)
506 {
507 struct proc_ldt *pldt, *new_ldt;
508 struct mdproc *mdp;
509 struct soft_segment_descriptor sldt;
510 vm_offset_t sva;
511 vm_size_t sz;
512
513 mtx_assert(&dt_lock, MA_OWNED);
514 mdp = &p->p_md;
515 if (!force && mdp->md_ldt != NULL)
516 return (mdp->md_ldt);
517 mtx_unlock(&dt_lock);
518 new_ldt = malloc(sizeof(struct proc_ldt), M_SUBPROC, M_WAITOK);
519 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
520 new_ldt->ldt_base = kmem_malloc(sz, M_WAITOK | M_ZERO);
521 sva = (uintptr_t)new_ldt->ldt_base;
522 pmap_pti_add_kva(sva, sva + sz, false);
523 new_ldt->ldt_refcnt = 1;
524 sldt.ssd_base = sva;
525 sldt.ssd_limit = sz - 1;
526 sldt.ssd_type = SDT_SYSLDT;
527 sldt.ssd_dpl = SEL_KPL;
528 sldt.ssd_p = 1;
529 sldt.ssd_long = 0;
530 sldt.ssd_def32 = 0;
531 sldt.ssd_gran = 0;
532 mtx_lock(&dt_lock);
533 pldt = mdp->md_ldt;
534 if (pldt != NULL && !force) {
535 pmap_pti_remove_kva(sva, sva + sz);
536 kmem_free(new_ldt->ldt_base, sz);
537 free(new_ldt, M_SUBPROC);
538 return (pldt);
539 }
540
541 if (pldt != NULL) {
542 bcopy(pldt->ldt_base, new_ldt->ldt_base, max_ldt_segment *
543 sizeof(struct user_segment_descriptor));
544 user_ldt_derefl(pldt);
545 }
546 critical_enter();
547 ssdtosyssd(&sldt, &p->p_md.md_ldt_sd);
548 atomic_thread_fence_rel();
549 mdp->md_ldt = new_ldt;
550 critical_exit();
551 smp_rendezvous(NULL, set_user_ldt_rv, NULL, p);
552
553 return (mdp->md_ldt);
554 }
555
556 void
user_ldt_free(struct thread * td)557 user_ldt_free(struct thread *td)
558 {
559 struct proc *p = td->td_proc;
560 struct mdproc *mdp = &p->p_md;
561 struct proc_ldt *pldt;
562
563 mtx_lock(&dt_lock);
564 if ((pldt = mdp->md_ldt) == NULL) {
565 mtx_unlock(&dt_lock);
566 return;
567 }
568
569 critical_enter();
570 mdp->md_ldt = NULL;
571 atomic_thread_fence_rel();
572 bzero(&mdp->md_ldt_sd, sizeof(mdp->md_ldt_sd));
573 if (td == curthread)
574 lldt(GSEL(GNULL_SEL, SEL_KPL));
575 critical_exit();
576 user_ldt_deref(pldt);
577 }
578
579 static void
user_ldt_derefl(struct proc_ldt * pldt)580 user_ldt_derefl(struct proc_ldt *pldt)
581 {
582 vm_offset_t sva;
583 vm_size_t sz;
584
585 if (--pldt->ldt_refcnt == 0) {
586 sva = (vm_offset_t)pldt->ldt_base;
587 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
588 pmap_pti_remove_kva(sva, sva + sz);
589 kmem_free(pldt->ldt_base, sz);
590 free(pldt, M_SUBPROC);
591 }
592 }
593
594 static void
user_ldt_deref(struct proc_ldt * pldt)595 user_ldt_deref(struct proc_ldt *pldt)
596 {
597
598 mtx_assert(&dt_lock, MA_OWNED);
599 user_ldt_derefl(pldt);
600 mtx_unlock(&dt_lock);
601 }
602
603 /*
604 * Note for the authors of compat layers (linux, etc): copyout() in
605 * the function below is not a problem since it presents data in
606 * arch-specific format (i.e. i386-specific in this case), not in
607 * the OS-specific one.
608 */
609 int
amd64_get_ldt(struct thread * td,struct i386_ldt_args * uap)610 amd64_get_ldt(struct thread *td, struct i386_ldt_args *uap)
611 {
612 struct proc_ldt *pldt;
613 struct user_segment_descriptor *lp;
614 uint64_t *data;
615 u_int i, num;
616 int error;
617
618 #ifdef DEBUG
619 printf("amd64_get_ldt: start=%u num=%u descs=%p\n",
620 uap->start, uap->num, (void *)uap->descs);
621 #endif
622
623 pldt = td->td_proc->p_md.md_ldt;
624 if (pldt == NULL || uap->start >= max_ldt_segment || uap->num == 0) {
625 td->td_retval[0] = 0;
626 return (0);
627 }
628 num = min(uap->num, max_ldt_segment - uap->start);
629 lp = &((struct user_segment_descriptor *)(pldt->ldt_base))[uap->start];
630 data = malloc(num * sizeof(struct user_segment_descriptor), M_TEMP,
631 M_WAITOK);
632 mtx_lock(&dt_lock);
633 for (i = 0; i < num; i++)
634 data[i] = ((volatile uint64_t *)lp)[i];
635 mtx_unlock(&dt_lock);
636 error = copyout(data, uap->descs, num *
637 sizeof(struct user_segment_descriptor));
638 free(data, M_TEMP);
639 if (error == 0)
640 td->td_retval[0] = num;
641 return (error);
642 }
643
644 int
amd64_set_ldt(struct thread * td,struct i386_ldt_args * uap,struct user_segment_descriptor * descs)645 amd64_set_ldt(struct thread *td, struct i386_ldt_args *uap,
646 struct user_segment_descriptor *descs)
647 {
648 struct mdproc *mdp;
649 struct proc_ldt *pldt;
650 struct user_segment_descriptor *dp;
651 struct proc *p;
652 u_int largest_ld, i;
653 int error;
654
655 #ifdef DEBUG
656 printf("amd64_set_ldt: start=%u num=%u descs=%p\n",
657 uap->start, uap->num, (void *)uap->descs);
658 #endif
659 mdp = &td->td_proc->p_md;
660 error = 0;
661
662 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
663 p = td->td_proc;
664 if (descs == NULL) {
665 /* Free descriptors */
666 if (uap->start == 0 && uap->num == 0)
667 uap->num = max_ldt_segment;
668 if (uap->num == 0)
669 return (EINVAL);
670 if ((pldt = mdp->md_ldt) == NULL ||
671 uap->start >= max_ldt_segment)
672 return (0);
673 largest_ld = uap->start + uap->num;
674 if (largest_ld > max_ldt_segment)
675 largest_ld = max_ldt_segment;
676 if (largest_ld < uap->start)
677 return (EINVAL);
678 mtx_lock(&dt_lock);
679 for (i = uap->start; i < largest_ld; i++)
680 ((volatile uint64_t *)(pldt->ldt_base))[i] = 0;
681 mtx_unlock(&dt_lock);
682 return (0);
683 }
684
685 if (!(uap->start == LDT_AUTO_ALLOC && uap->num == 1)) {
686 /* verify range of descriptors to modify */
687 largest_ld = uap->start + uap->num;
688 if (uap->start >= max_ldt_segment ||
689 largest_ld > max_ldt_segment ||
690 largest_ld < uap->start)
691 return (EINVAL);
692 }
693
694 /* Check descriptors for access violations */
695 for (i = 0; i < uap->num; i++) {
696 dp = &descs[i];
697
698 switch (dp->sd_type) {
699 case SDT_SYSNULL: /* system null */
700 dp->sd_p = 0;
701 break;
702 case SDT_SYS286TSS:
703 case SDT_SYSLDT:
704 case SDT_SYS286BSY:
705 case SDT_SYS286CGT:
706 case SDT_SYSTASKGT:
707 case SDT_SYS286IGT:
708 case SDT_SYS286TGT:
709 case SDT_SYSNULL2:
710 case SDT_SYSTSS:
711 case SDT_SYSNULL3:
712 case SDT_SYSBSY:
713 case SDT_SYSCGT:
714 case SDT_SYSNULL4:
715 case SDT_SYSIGT:
716 case SDT_SYSTGT:
717 return (EACCES);
718
719 /* memory segment types */
720 case SDT_MEMEC: /* memory execute only conforming */
721 case SDT_MEMEAC: /* memory execute only accessed conforming */
722 case SDT_MEMERC: /* memory execute read conforming */
723 case SDT_MEMERAC: /* memory execute read accessed conforming */
724 /* Must be "present" if executable and conforming. */
725 if (dp->sd_p == 0)
726 return (EACCES);
727 break;
728 case SDT_MEMRO: /* memory read only */
729 case SDT_MEMROA: /* memory read only accessed */
730 case SDT_MEMRW: /* memory read write */
731 case SDT_MEMRWA: /* memory read write accessed */
732 case SDT_MEMROD: /* memory read only expand dwn limit */
733 case SDT_MEMRODA: /* memory read only expand dwn lim accessed */
734 case SDT_MEMRWD: /* memory read write expand dwn limit */
735 case SDT_MEMRWDA: /* memory read write expand dwn lim acessed */
736 case SDT_MEME: /* memory execute only */
737 case SDT_MEMEA: /* memory execute only accessed */
738 case SDT_MEMER: /* memory execute read */
739 case SDT_MEMERA: /* memory execute read accessed */
740 break;
741 default:
742 return(EINVAL);
743 }
744
745 /* Only user (ring-3) descriptors may be present. */
746 if ((dp->sd_p != 0) && (dp->sd_dpl != SEL_UPL))
747 return (EACCES);
748 }
749
750 if (uap->start == LDT_AUTO_ALLOC && uap->num == 1) {
751 /* Allocate a free slot */
752 mtx_lock(&dt_lock);
753 pldt = user_ldt_alloc(p, 0);
754 if (pldt == NULL) {
755 mtx_unlock(&dt_lock);
756 return (ENOMEM);
757 }
758
759 /*
760 * start scanning a bit up to leave room for NVidia and
761 * Wine, which still user the "Blat" method of allocation.
762 */
763 i = 16;
764 dp = &((struct user_segment_descriptor *)(pldt->ldt_base))[i];
765 for (; i < max_ldt_segment; ++i, ++dp) {
766 if (dp->sd_type == SDT_SYSNULL)
767 break;
768 }
769 if (i >= max_ldt_segment) {
770 mtx_unlock(&dt_lock);
771 return (ENOSPC);
772 }
773 uap->start = i;
774 error = amd64_set_ldt_data(td, i, 1, descs);
775 mtx_unlock(&dt_lock);
776 } else {
777 largest_ld = uap->start + uap->num;
778 if (largest_ld > max_ldt_segment)
779 return (EINVAL);
780 mtx_lock(&dt_lock);
781 if (user_ldt_alloc(p, 0) != NULL) {
782 error = amd64_set_ldt_data(td, uap->start, uap->num,
783 descs);
784 }
785 mtx_unlock(&dt_lock);
786 }
787 if (error == 0)
788 td->td_retval[0] = uap->start;
789 return (error);
790 }
791
792 int
amd64_set_ldt_data(struct thread * td,int start,int num,struct user_segment_descriptor * descs)793 amd64_set_ldt_data(struct thread *td, int start, int num,
794 struct user_segment_descriptor *descs)
795 {
796 struct mdproc *mdp;
797 struct proc_ldt *pldt;
798 volatile uint64_t *dst, *src;
799 int i;
800
801 mtx_assert(&dt_lock, MA_OWNED);
802
803 mdp = &td->td_proc->p_md;
804 pldt = mdp->md_ldt;
805 dst = (volatile uint64_t *)(pldt->ldt_base);
806 src = (volatile uint64_t *)descs;
807 for (i = 0; i < num; i++)
808 dst[start + i] = src[i];
809 return (0);
810 }
811