1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
5 * Copyright (c) 2007 Marvell Semiconductor, Inc.
6 * Copyright (c) 2007 Sam Leffler, Errno Consulting
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17 * redistribution must be conditioned upon including a substantially
18 * similar Disclaimer requirement for further binary redistribution.
19 *
20 * NO WARRANTY
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
24 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
25 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
26 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
29 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGES.
32 */
33
34 #include <sys/cdefs.h>
35 #ifdef __FreeBSD__
36 #endif
37
38 #include "opt_malo.h"
39
40 #include <sys/param.h>
41 #include <sys/endian.h>
42 #include <sys/kernel.h>
43 #include <sys/malloc.h>
44 #include <sys/socket.h>
45 #include <sys/sockio.h>
46 #include <sys/sysctl.h>
47 #include <sys/taskqueue.h>
48
49 #include <machine/bus.h>
50 #include <sys/bus.h>
51
52 #include <net/if.h>
53 #include <net/if_var.h>
54 #include <net/if_dl.h>
55 #include <net/if_media.h>
56 #include <net/if_types.h>
57 #include <net/ethernet.h>
58
59 #include <net80211/ieee80211_var.h>
60 #include <net80211/ieee80211_regdomain.h>
61
62 #include <net/bpf.h>
63
64 #include <dev/malo/if_malo.h>
65
66 SYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
67 "Marvell 88w8335 driver parameters");
68
69 static int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/
70 SYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RWTUN, &malo_txcoalesce,
71 0, "tx buffers to send at once");
72 static int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */
73 SYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RWTUN, &malo_rxbuf,
74 0, "rx buffers allocated");
75 static int malo_rxquota = MALO_RXBUF; /* # max buffers to process */
76 SYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RWTUN, &malo_rxquota,
77 0, "max rx buffers to process per interrupt");
78 static int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */
79 SYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RWTUN, &malo_txbuf,
80 0, "tx buffers allocated");
81
82 #ifdef MALO_DEBUG
83 static int malo_debug = 0;
84 SYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RWTUN, &malo_debug,
85 0, "control debugging printfs");
86 enum {
87 MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
88 MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
89 MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */
90 MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
91 MALO_DEBUG_RESET = 0x00000010, /* reset processing */
92 MALO_DEBUG_INTR = 0x00000040, /* ISR */
93 MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */
94 MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */
95 MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */
96 MALO_DEBUG_NODE = 0x00000800, /* node management */
97 MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */
98 MALO_DEBUG_FW = 0x00008000, /* firmware */
99 MALO_DEBUG_ANY = 0xffffffff
100 };
101 #define IS_BEACON(wh) \
102 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \
103 IEEE80211_FC0_SUBTYPE_MASK)) == \
104 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
105 #define IFF_DUMPPKTS_RECV(sc, wh) \
106 (((sc->malo_debug & MALO_DEBUG_RECV) && \
107 ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))))
108 #define IFF_DUMPPKTS_XMIT(sc) \
109 (sc->malo_debug & MALO_DEBUG_XMIT)
110 #define DPRINTF(sc, m, fmt, ...) do { \
111 if (sc->malo_debug & (m)) \
112 printf(fmt, __VA_ARGS__); \
113 } while (0)
114 #else
115 #define DPRINTF(sc, m, fmt, ...) do { \
116 (void) sc; \
117 } while (0)
118 #endif
119
120 static MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers");
121
122 static struct ieee80211vap *malo_vap_create(struct ieee80211com *,
123 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
124 const uint8_t [IEEE80211_ADDR_LEN],
125 const uint8_t [IEEE80211_ADDR_LEN]);
126 static void malo_vap_delete(struct ieee80211vap *);
127 static int malo_dma_setup(struct malo_softc *);
128 static int malo_setup_hwdma(struct malo_softc *);
129 static void malo_txq_init(struct malo_softc *, struct malo_txq *, int);
130 static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *);
131 static void malo_parent(struct ieee80211com *);
132 static int malo_transmit(struct ieee80211com *, struct mbuf *);
133 static void malo_start(struct malo_softc *);
134 static void malo_watchdog(void *);
135 static void malo_updateslot(struct ieee80211com *);
136 static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int);
137 static void malo_scan_start(struct ieee80211com *);
138 static void malo_scan_end(struct ieee80211com *);
139 static void malo_set_channel(struct ieee80211com *);
140 static int malo_raw_xmit(struct ieee80211_node *, struct mbuf *,
141 const struct ieee80211_bpf_params *);
142 static void malo_sysctlattach(struct malo_softc *);
143 static void malo_announce(struct malo_softc *);
144 static void malo_dma_cleanup(struct malo_softc *);
145 static void malo_stop(struct malo_softc *);
146 static int malo_chan_set(struct malo_softc *, struct ieee80211_channel *);
147 static int malo_mode_init(struct malo_softc *);
148 static void malo_tx_proc(void *, int);
149 static void malo_rx_proc(void *, int);
150 static void malo_init(void *);
151
152 /*
153 * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1
154 * operations are done in the "hal" except getting H/W MAC address at
155 * malo_attach and there should be no reference to them here.
156 */
157 static uint32_t
malo_bar0_read4(struct malo_softc * sc,bus_size_t off)158 malo_bar0_read4(struct malo_softc *sc, bus_size_t off)
159 {
160 return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off);
161 }
162
163 static void
malo_bar0_write4(struct malo_softc * sc,bus_size_t off,uint32_t val)164 malo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val)
165 {
166 DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n",
167 __func__, (uintmax_t)off, val);
168
169 bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val);
170 }
171
172 int
malo_attach(uint16_t devid,struct malo_softc * sc)173 malo_attach(uint16_t devid, struct malo_softc *sc)
174 {
175 struct ieee80211com *ic = &sc->malo_ic;
176 struct malo_hal *mh;
177 int error;
178 uint8_t bands[IEEE80211_MODE_BYTES];
179
180 MALO_LOCK_INIT(sc);
181 callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0);
182 mbufq_init(&sc->malo_snd, ifqmaxlen);
183
184 mh = malo_hal_attach(sc->malo_dev, devid,
185 sc->malo_io1h, sc->malo_io1t, sc->malo_dmat);
186 if (mh == NULL) {
187 device_printf(sc->malo_dev, "unable to attach HAL\n");
188 error = EIO;
189 goto bad;
190 }
191 sc->malo_mh = mh;
192
193 /*
194 * Load firmware so we can get setup. We arbitrarily pick station
195 * firmware; we'll re-load firmware as needed so setting up
196 * the wrong mode isn't a big deal.
197 */
198 error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m");
199 if (error != 0) {
200 device_printf(sc->malo_dev, "unable to setup firmware\n");
201 goto bad1;
202 }
203 /* XXX gethwspecs() extracts correct informations? not maybe! */
204 error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs);
205 if (error != 0) {
206 device_printf(sc->malo_dev, "unable to fetch h/w specs\n");
207 goto bad1;
208 }
209
210 DPRINTF(sc, MALO_DEBUG_FW,
211 "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x"
212 "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x"
213 "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x"
214 "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x"
215 "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x",
216 sc->malo_hwspecs.hwversion,
217 sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb,
218 sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb,
219 sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna,
220 sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0,
221 sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write,
222 sc->malo_hwspecs.ul_fw_awakecookie,
223 sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1],
224 sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]);
225
226 /* NB: firmware looks that it does not export regdomain info API. */
227 memset(bands, 0, sizeof(bands));
228 setbit(bands, IEEE80211_MODE_11B);
229 setbit(bands, IEEE80211_MODE_11G);
230 ieee80211_init_channels(ic, NULL, bands);
231
232 sc->malo_txantenna = 0x2; /* h/w default */
233 sc->malo_rxantenna = 0xffff; /* h/w default */
234
235 /*
236 * Allocate tx + rx descriptors and populate the lists.
237 * We immediately push the information to the firmware
238 * as otherwise it gets upset.
239 */
240 error = malo_dma_setup(sc);
241 if (error != 0) {
242 device_printf(sc->malo_dev,
243 "failed to setup descriptors: %d\n", error);
244 goto bad1;
245 }
246 error = malo_setup_hwdma(sc); /* push to firmware */
247 if (error != 0) /* NB: malo_setupdma prints msg */
248 goto bad2;
249
250 sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT,
251 taskqueue_thread_enqueue, &sc->malo_tq);
252 taskqueue_start_threads(&sc->malo_tq, 1, PI_NET,
253 "%s taskq", device_get_nameunit(sc->malo_dev));
254
255 NET_TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc);
256 TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc);
257
258 ic->ic_softc = sc;
259 ic->ic_name = device_get_nameunit(sc->malo_dev);
260 /* XXX not right but it's not used anywhere important */
261 ic->ic_phytype = IEEE80211_T_OFDM;
262 ic->ic_opmode = IEEE80211_M_STA;
263 ic->ic_caps =
264 IEEE80211_C_STA /* station mode supported */
265 | IEEE80211_C_BGSCAN /* capable of bg scanning */
266 | IEEE80211_C_MONITOR /* monitor mode */
267 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
268 | IEEE80211_C_SHSLOT /* short slot time supported */
269 | IEEE80211_C_TXPMGT /* capable of txpow mgt */
270 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
271 ;
272 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->malo_hwspecs.macaddr);
273
274 /*
275 * Transmit requires space in the packet for a special format transmit
276 * record and optional padding between this record and the payload.
277 * Ask the net80211 layer to arrange this when encapsulating
278 * packets so we can add it efficiently.
279 */
280 ic->ic_headroom = sizeof(struct malo_txrec) -
281 sizeof(struct ieee80211_frame);
282
283 /* call MI attach routine. */
284 ieee80211_ifattach(ic);
285 /* override default methods */
286 ic->ic_vap_create = malo_vap_create;
287 ic->ic_vap_delete = malo_vap_delete;
288 ic->ic_raw_xmit = malo_raw_xmit;
289 ic->ic_updateslot = malo_updateslot;
290 ic->ic_scan_start = malo_scan_start;
291 ic->ic_scan_end = malo_scan_end;
292 ic->ic_set_channel = malo_set_channel;
293 ic->ic_parent = malo_parent;
294 ic->ic_transmit = malo_transmit;
295
296 sc->malo_invalid = 0; /* ready to go, enable int handling */
297
298 ieee80211_radiotap_attach(ic,
299 &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th),
300 MALO_TX_RADIOTAP_PRESENT,
301 &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th),
302 MALO_RX_RADIOTAP_PRESENT);
303
304 /*
305 * Setup dynamic sysctl's.
306 */
307 malo_sysctlattach(sc);
308
309 if (bootverbose)
310 ieee80211_announce(ic);
311 malo_announce(sc);
312
313 return 0;
314 bad2:
315 malo_dma_cleanup(sc);
316 bad1:
317 malo_hal_detach(mh);
318 bad:
319 sc->malo_invalid = 1;
320
321 return error;
322 }
323
324 static struct ieee80211vap *
malo_vap_create(struct ieee80211com * ic,const char name[IFNAMSIZ],int unit,enum ieee80211_opmode opmode,int flags,const uint8_t bssid[IEEE80211_ADDR_LEN],const uint8_t mac[IEEE80211_ADDR_LEN])325 malo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
326 enum ieee80211_opmode opmode, int flags,
327 const uint8_t bssid[IEEE80211_ADDR_LEN],
328 const uint8_t mac[IEEE80211_ADDR_LEN])
329 {
330 struct malo_softc *sc = ic->ic_softc;
331 struct malo_vap *mvp;
332 struct ieee80211vap *vap;
333
334 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
335 device_printf(sc->malo_dev, "multiple vaps not supported\n");
336 return NULL;
337 }
338 switch (opmode) {
339 case IEEE80211_M_STA:
340 if (opmode == IEEE80211_M_STA)
341 flags |= IEEE80211_CLONE_NOBEACONS;
342 /* fall thru... */
343 case IEEE80211_M_MONITOR:
344 break;
345 default:
346 device_printf(sc->malo_dev, "%s mode not supported\n",
347 ieee80211_opmode_name[opmode]);
348 return NULL; /* unsupported */
349 }
350 mvp = malloc(sizeof(struct malo_vap), M_80211_VAP, M_WAITOK | M_ZERO);
351 vap = &mvp->malo_vap;
352 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
353
354 /* override state transition machine */
355 mvp->malo_newstate = vap->iv_newstate;
356 vap->iv_newstate = malo_newstate;
357
358 /* complete setup */
359 ieee80211_vap_attach(vap,
360 ieee80211_media_change, ieee80211_media_status, mac);
361 ic->ic_opmode = opmode;
362 return vap;
363 }
364
365 static void
malo_vap_delete(struct ieee80211vap * vap)366 malo_vap_delete(struct ieee80211vap *vap)
367 {
368 struct malo_vap *mvp = MALO_VAP(vap);
369
370 ieee80211_vap_detach(vap);
371 free(mvp, M_80211_VAP);
372 }
373
374 int
malo_intr(void * arg)375 malo_intr(void *arg)
376 {
377 struct malo_softc *sc = arg;
378 struct malo_hal *mh = sc->malo_mh;
379 uint32_t status;
380
381 if (sc->malo_invalid) {
382 /*
383 * The hardware is not ready/present, don't touch anything.
384 * Note this can happen early on if the IRQ is shared.
385 */
386 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
387 return (FILTER_STRAY);
388 }
389
390 /*
391 * Figure out the reason(s) for the interrupt.
392 */
393 malo_hal_getisr(mh, &status); /* NB: clears ISR too */
394 if (status == 0) /* must be a shared irq */
395 return (FILTER_STRAY);
396
397 DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
398 __func__, status, sc->malo_imask);
399
400 if (status & MALO_A2HRIC_BIT_RX_RDY)
401 taskqueue_enqueue(sc->malo_tq, &sc->malo_rxtask);
402 if (status & MALO_A2HRIC_BIT_TX_DONE)
403 taskqueue_enqueue(sc->malo_tq, &sc->malo_txtask);
404 if (status & MALO_A2HRIC_BIT_OPC_DONE)
405 malo_hal_cmddone(mh);
406 if (status & MALO_A2HRIC_BIT_MAC_EVENT)
407 ;
408 if (status & MALO_A2HRIC_BIT_RX_PROBLEM)
409 ;
410 if (status & MALO_A2HRIC_BIT_ICV_ERROR) {
411 /* TKIP ICV error */
412 sc->malo_stats.mst_rx_badtkipicv++;
413 }
414 #ifdef MALO_DEBUG
415 if (((status | sc->malo_imask) ^ sc->malo_imask) != 0)
416 DPRINTF(sc, MALO_DEBUG_INTR,
417 "%s: can't handle interrupt status 0x%x\n",
418 __func__, status);
419 #endif
420 return (FILTER_HANDLED);
421 }
422
423 static void
malo_load_cb(void * arg,bus_dma_segment_t * segs,int nsegs,int error)424 malo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
425 {
426 bus_addr_t *paddr = (bus_addr_t*) arg;
427
428 KASSERT(error == 0, ("error %u on bus_dma callback", error));
429
430 *paddr = segs->ds_addr;
431 }
432
433 static int
malo_desc_setup(struct malo_softc * sc,const char * name,struct malo_descdma * dd,int nbuf,size_t bufsize,int ndesc,size_t descsize)434 malo_desc_setup(struct malo_softc *sc, const char *name,
435 struct malo_descdma *dd,
436 int nbuf, size_t bufsize, int ndesc, size_t descsize)
437 {
438 int error;
439 uint8_t *ds;
440
441 DPRINTF(sc, MALO_DEBUG_RESET,
442 "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
443 __func__, name, nbuf, (uintmax_t) bufsize,
444 ndesc, (uintmax_t) descsize);
445
446 dd->dd_name = name;
447 dd->dd_desc_len = nbuf * ndesc * descsize;
448
449 /*
450 * Setup DMA descriptor area.
451 */
452 error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */
453 PAGE_SIZE, 0, /* alignment, bounds */
454 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
455 BUS_SPACE_MAXADDR, /* highaddr */
456 NULL, NULL, /* filter, filterarg */
457 dd->dd_desc_len, /* maxsize */
458 1, /* nsegments */
459 dd->dd_desc_len, /* maxsegsize */
460 BUS_DMA_ALLOCNOW, /* flags */
461 NULL, /* lockfunc */
462 NULL, /* lockarg */
463 &dd->dd_dmat);
464 if (error != 0) {
465 device_printf(sc->malo_dev, "cannot allocate %s DMA tag\n",
466 dd->dd_name);
467 return error;
468 }
469
470 /* allocate descriptors */
471 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
472 BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap);
473 if (error != 0) {
474 device_printf(sc->malo_dev,
475 "unable to alloc memory for %u %s descriptors, "
476 "error %u\n", nbuf * ndesc, dd->dd_name, error);
477 goto fail1;
478 }
479
480 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
481 dd->dd_desc, dd->dd_desc_len,
482 malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT);
483 if (error != 0) {
484 device_printf(sc->malo_dev,
485 "unable to map %s descriptors, error %u\n",
486 dd->dd_name, error);
487 goto fail2;
488 }
489
490 ds = dd->dd_desc;
491 memset(ds, 0, dd->dd_desc_len);
492 DPRINTF(sc, MALO_DEBUG_RESET,
493 "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n",
494 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
495 (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
496
497 return 0;
498 fail2:
499 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
500 fail1:
501 bus_dma_tag_destroy(dd->dd_dmat);
502 memset(dd, 0, sizeof(*dd));
503 return error;
504 }
505
506 #define DS2PHYS(_dd, _ds) \
507 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
508
509 static int
malo_rxdma_setup(struct malo_softc * sc)510 malo_rxdma_setup(struct malo_softc *sc)
511 {
512 int error, bsize, i;
513 struct malo_rxbuf *bf;
514 struct malo_rxdesc *ds;
515
516 error = malo_desc_setup(sc, "rx", &sc->malo_rxdma,
517 malo_rxbuf, sizeof(struct malo_rxbuf),
518 1, sizeof(struct malo_rxdesc));
519 if (error != 0)
520 return error;
521
522 /*
523 * Allocate rx buffers and set them up.
524 */
525 bsize = malo_rxbuf * sizeof(struct malo_rxbuf);
526 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
527 if (bf == NULL) {
528 device_printf(sc->malo_dev,
529 "malloc of %u rx buffers failed\n", bsize);
530 return error;
531 }
532 sc->malo_rxdma.dd_bufptr = bf;
533
534 STAILQ_INIT(&sc->malo_rxbuf);
535 ds = sc->malo_rxdma.dd_desc;
536 for (i = 0; i < malo_rxbuf; i++, bf++, ds++) {
537 bf->bf_desc = ds;
538 bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds);
539 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
540 &bf->bf_dmamap);
541 if (error != 0) {
542 device_printf(sc->malo_dev,
543 "%s: unable to dmamap for rx buffer, error %d\n",
544 __func__, error);
545 return error;
546 }
547 /* NB: tail is intentional to preserve descriptor order */
548 STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list);
549 }
550 return 0;
551 }
552
553 static int
malo_txdma_setup(struct malo_softc * sc,struct malo_txq * txq)554 malo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq)
555 {
556 int error, bsize, i;
557 struct malo_txbuf *bf;
558 struct malo_txdesc *ds;
559
560 error = malo_desc_setup(sc, "tx", &txq->dma,
561 malo_txbuf, sizeof(struct malo_txbuf),
562 MALO_TXDESC, sizeof(struct malo_txdesc));
563 if (error != 0)
564 return error;
565
566 /* allocate and setup tx buffers */
567 bsize = malo_txbuf * sizeof(struct malo_txbuf);
568 bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO);
569 if (bf == NULL) {
570 device_printf(sc->malo_dev, "malloc of %u tx buffers failed\n",
571 malo_txbuf);
572 return ENOMEM;
573 }
574 txq->dma.dd_bufptr = bf;
575
576 STAILQ_INIT(&txq->free);
577 txq->nfree = 0;
578 ds = txq->dma.dd_desc;
579 for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) {
580 bf->bf_desc = ds;
581 bf->bf_daddr = DS2PHYS(&txq->dma, ds);
582 error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT,
583 &bf->bf_dmamap);
584 if (error != 0) {
585 device_printf(sc->malo_dev,
586 "unable to create dmamap for tx "
587 "buffer %u, error %u\n", i, error);
588 return error;
589 }
590 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
591 txq->nfree++;
592 }
593
594 return 0;
595 }
596
597 static void
malo_desc_cleanup(struct malo_softc * sc,struct malo_descdma * dd)598 malo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd)
599 {
600 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
601 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
602 bus_dma_tag_destroy(dd->dd_dmat);
603
604 memset(dd, 0, sizeof(*dd));
605 }
606
607 static void
malo_rxdma_cleanup(struct malo_softc * sc)608 malo_rxdma_cleanup(struct malo_softc *sc)
609 {
610 struct malo_rxbuf *bf;
611
612 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
613 if (bf->bf_m != NULL) {
614 m_freem(bf->bf_m);
615 bf->bf_m = NULL;
616 }
617 if (bf->bf_dmamap != NULL) {
618 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
619 bf->bf_dmamap = NULL;
620 }
621 }
622 STAILQ_INIT(&sc->malo_rxbuf);
623 if (sc->malo_rxdma.dd_bufptr != NULL) {
624 free(sc->malo_rxdma.dd_bufptr, M_MALODEV);
625 sc->malo_rxdma.dd_bufptr = NULL;
626 }
627 if (sc->malo_rxdma.dd_desc_len != 0)
628 malo_desc_cleanup(sc, &sc->malo_rxdma);
629 }
630
631 static void
malo_txdma_cleanup(struct malo_softc * sc,struct malo_txq * txq)632 malo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq)
633 {
634 struct malo_txbuf *bf;
635 struct ieee80211_node *ni;
636
637 STAILQ_FOREACH(bf, &txq->free, bf_list) {
638 if (bf->bf_m != NULL) {
639 m_freem(bf->bf_m);
640 bf->bf_m = NULL;
641 }
642 ni = bf->bf_node;
643 bf->bf_node = NULL;
644 if (ni != NULL) {
645 /*
646 * Reclaim node reference.
647 */
648 ieee80211_free_node(ni);
649 }
650 if (bf->bf_dmamap != NULL) {
651 bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap);
652 bf->bf_dmamap = NULL;
653 }
654 }
655 STAILQ_INIT(&txq->free);
656 txq->nfree = 0;
657 if (txq->dma.dd_bufptr != NULL) {
658 free(txq->dma.dd_bufptr, M_MALODEV);
659 txq->dma.dd_bufptr = NULL;
660 }
661 if (txq->dma.dd_desc_len != 0)
662 malo_desc_cleanup(sc, &txq->dma);
663 }
664
665 static void
malo_dma_cleanup(struct malo_softc * sc)666 malo_dma_cleanup(struct malo_softc *sc)
667 {
668 int i;
669
670 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
671 malo_txdma_cleanup(sc, &sc->malo_txq[i]);
672
673 malo_rxdma_cleanup(sc);
674 }
675
676 static int
malo_dma_setup(struct malo_softc * sc)677 malo_dma_setup(struct malo_softc *sc)
678 {
679 int error, i;
680
681 /* rxdma initializing. */
682 error = malo_rxdma_setup(sc);
683 if (error != 0)
684 return error;
685
686 /* NB: we just have 1 tx queue now. */
687 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
688 error = malo_txdma_setup(sc, &sc->malo_txq[i]);
689 if (error != 0) {
690 malo_dma_cleanup(sc);
691
692 return error;
693 }
694
695 malo_txq_init(sc, &sc->malo_txq[i], i);
696 }
697
698 return 0;
699 }
700
701 static void
malo_hal_set_rxtxdma(struct malo_softc * sc)702 malo_hal_set_rxtxdma(struct malo_softc *sc)
703 {
704 int i;
705
706 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read,
707 sc->malo_hwdma.rxdesc_read);
708 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write,
709 sc->malo_hwdma.rxdesc_read);
710
711 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
712 malo_bar0_write4(sc,
713 sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]);
714 }
715 }
716
717 /*
718 * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are
719 * for compatibility with older firmware. For current firmware we send
720 * this information with a cmd block via malo_hal_sethwdma.
721 */
722 static int
malo_setup_hwdma(struct malo_softc * sc)723 malo_setup_hwdma(struct malo_softc *sc)
724 {
725 int i;
726 struct malo_txq *txq;
727
728 sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr;
729
730 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
731 txq = &sc->malo_txq[i];
732 sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr;
733 }
734 sc->malo_hwdma.maxnum_txwcb = malo_txbuf;
735 sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES;
736
737 malo_hal_set_rxtxdma(sc);
738
739 return 0;
740 }
741
742 static void
malo_txq_init(struct malo_softc * sc,struct malo_txq * txq,int qnum)743 malo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum)
744 {
745 struct malo_txbuf *bf, *bn;
746 struct malo_txdesc *ds;
747
748 MALO_TXQ_LOCK_INIT(sc, txq);
749 txq->qnum = qnum;
750 txq->txpri = 0; /* XXX */
751
752 STAILQ_FOREACH(bf, &txq->free, bf_list) {
753 bf->bf_txq = txq;
754
755 ds = bf->bf_desc;
756 bn = STAILQ_NEXT(bf, bf_list);
757 if (bn == NULL)
758 bn = STAILQ_FIRST(&txq->free);
759 ds->physnext = htole32(bn->bf_daddr);
760 }
761 STAILQ_INIT(&txq->active);
762 }
763
764 /*
765 * Reclaim resources for a setup queue.
766 */
767 static void
malo_tx_cleanupq(struct malo_softc * sc,struct malo_txq * txq)768 malo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq)
769 {
770 /* XXX hal work? */
771 MALO_TXQ_LOCK_DESTROY(txq);
772 }
773
774 /*
775 * Allocate a tx buffer for sending a frame.
776 */
777 static struct malo_txbuf *
malo_getbuf(struct malo_softc * sc,struct malo_txq * txq)778 malo_getbuf(struct malo_softc *sc, struct malo_txq *txq)
779 {
780 struct malo_txbuf *bf;
781
782 MALO_TXQ_LOCK(txq);
783 bf = STAILQ_FIRST(&txq->free);
784 if (bf != NULL) {
785 STAILQ_REMOVE_HEAD(&txq->free, bf_list);
786 txq->nfree--;
787 }
788 MALO_TXQ_UNLOCK(txq);
789 if (bf == NULL) {
790 DPRINTF(sc, MALO_DEBUG_XMIT,
791 "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
792 sc->malo_stats.mst_tx_qstop++;
793 }
794 return bf;
795 }
796
797 static int
malo_tx_dmasetup(struct malo_softc * sc,struct malo_txbuf * bf,struct mbuf * m0)798 malo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0)
799 {
800 struct mbuf *m;
801 int error;
802
803 /*
804 * Load the DMA map so any coalescing is done. This also calculates
805 * the number of descriptors we need.
806 */
807 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
808 bf->bf_segs, &bf->bf_nseg,
809 BUS_DMA_NOWAIT);
810 if (error == EFBIG) {
811 /* XXX packet requires too many descriptors */
812 bf->bf_nseg = MALO_TXDESC + 1;
813 } else if (error != 0) {
814 sc->malo_stats.mst_tx_busdma++;
815 m_freem(m0);
816 return error;
817 }
818 /*
819 * Discard null packets and check for packets that require too many
820 * TX descriptors. We try to convert the latter to a cluster.
821 */
822 if (error == EFBIG) { /* too many desc's, linearize */
823 sc->malo_stats.mst_tx_linear++;
824 m = m_defrag(m0, M_NOWAIT);
825 if (m == NULL) {
826 m_freem(m0);
827 sc->malo_stats.mst_tx_nombuf++;
828 return ENOMEM;
829 }
830 m0 = m;
831 error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0,
832 bf->bf_segs, &bf->bf_nseg,
833 BUS_DMA_NOWAIT);
834 if (error != 0) {
835 sc->malo_stats.mst_tx_busdma++;
836 m_freem(m0);
837 return error;
838 }
839 KASSERT(bf->bf_nseg <= MALO_TXDESC,
840 ("too many segments after defrag; nseg %u", bf->bf_nseg));
841 } else if (bf->bf_nseg == 0) { /* null packet, discard */
842 sc->malo_stats.mst_tx_nodata++;
843 m_freem(m0);
844 return EIO;
845 }
846 DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n",
847 __func__, m0, m0->m_pkthdr.len);
848 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
849 bf->bf_m = m0;
850
851 return 0;
852 }
853
854 #ifdef MALO_DEBUG
855 static void
malo_printrxbuf(const struct malo_rxbuf * bf,u_int ix)856 malo_printrxbuf(const struct malo_rxbuf *bf, u_int ix)
857 {
858 const struct malo_rxdesc *ds = bf->bf_desc;
859 uint32_t status = le32toh(ds->status);
860
861 printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n"
862 " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x"
863 " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr,
864 le32toh(ds->physnext), le32toh(ds->physbuffdata),
865 ds->rxcontrol,
866 ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ?
867 "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !",
868 ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel,
869 ds->rate, le16toh(ds->qosctrl));
870 }
871
872 static void
malo_printtxbuf(const struct malo_txbuf * bf,u_int qnum,u_int ix)873 malo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix)
874 {
875 const struct malo_txdesc *ds = bf->bf_desc;
876 uint32_t status = le32toh(ds->status);
877
878 printf("Q%u[%3u]", qnum, ix);
879 printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr);
880 printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
881 le32toh(ds->physnext),
882 le32toh(ds->pktptr), le16toh(ds->pktlen), status,
883 status & MALO_TXD_STATUS_USED ?
884 "" : (status & 3) != 0 ? " *" : " !");
885 printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
886 ds->datarate, ds->txpriority, le16toh(ds->qosctrl),
887 le32toh(ds->sap_pktinfo), le16toh(ds->format));
888 #if 0
889 {
890 const uint8_t *cp = (const uint8_t *) ds;
891 int i;
892 for (i = 0; i < sizeof(struct malo_txdesc); i++) {
893 printf("%02x ", cp[i]);
894 if (((i+1) % 16) == 0)
895 printf("\n");
896 }
897 printf("\n");
898 }
899 #endif
900 }
901 #endif /* MALO_DEBUG */
902
903 static __inline void
malo_updatetxrate(struct ieee80211_node * ni,int rix)904 malo_updatetxrate(struct ieee80211_node *ni, int rix)
905 {
906 static const int ieeerates[] =
907 { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 };
908 if (rix < nitems(ieeerates))
909 ni->ni_txrate = ieeerates[rix];
910 }
911
912 static int
malo_fix2rate(int fix_rate)913 malo_fix2rate(int fix_rate)
914 {
915 static const int rates[] =
916 { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 };
917 return (fix_rate < nitems(rates) ? rates[fix_rate] : 0);
918 }
919
920 /*
921 * Process completed xmit descriptors from the specified queue.
922 */
923 static int
malo_tx_processq(struct malo_softc * sc,struct malo_txq * txq)924 malo_tx_processq(struct malo_softc *sc, struct malo_txq *txq)
925 {
926 struct malo_txbuf *bf;
927 struct malo_txdesc *ds;
928 struct ieee80211_node *ni;
929 int nreaped;
930 uint32_t status;
931
932 DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n",
933 __func__, txq->qnum);
934 for (nreaped = 0;; nreaped++) {
935 MALO_TXQ_LOCK(txq);
936 bf = STAILQ_FIRST(&txq->active);
937 if (bf == NULL) {
938 MALO_TXQ_UNLOCK(txq);
939 break;
940 }
941 ds = bf->bf_desc;
942 MALO_TXDESC_SYNC(txq, ds,
943 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
944 if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) {
945 MALO_TXQ_UNLOCK(txq);
946 break;
947 }
948 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
949 MALO_TXQ_UNLOCK(txq);
950
951 #ifdef MALO_DEBUG
952 if (sc->malo_debug & MALO_DEBUG_XMIT_DESC)
953 malo_printtxbuf(bf, txq->qnum, nreaped);
954 #endif
955 ni = bf->bf_node;
956 if (ni != NULL) {
957 status = le32toh(ds->status);
958 if (status & MALO_TXD_STATUS_OK) {
959 uint16_t format = le16toh(ds->format);
960 uint8_t txant =_IEEE80211_MASKSHIFT(
961 format, MALO_TXD_ANTENNA);
962
963 sc->malo_stats.mst_ant_tx[txant]++;
964 if (status & MALO_TXD_STATUS_OK_RETRY)
965 sc->malo_stats.mst_tx_retries++;
966 if (status & MALO_TXD_STATUS_OK_MORE_RETRY)
967 sc->malo_stats.mst_tx_mretries++;
968 malo_updatetxrate(ni, ds->datarate);
969 sc->malo_stats.mst_tx_rate = ds->datarate;
970 } else {
971 if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR)
972 sc->malo_stats.mst_tx_linkerror++;
973 if (status & MALO_TXD_STATUS_FAILED_XRETRY)
974 sc->malo_stats.mst_tx_xretries++;
975 if (status & MALO_TXD_STATUS_FAILED_AGING)
976 sc->malo_stats.mst_tx_aging++;
977 }
978 /* XXX strip fw len in case header inspected */
979 m_adj(bf->bf_m, sizeof(uint16_t));
980 ieee80211_tx_complete(ni, bf->bf_m,
981 (status & MALO_TXD_STATUS_OK) == 0);
982 } else
983 m_freem(bf->bf_m);
984
985 ds->status = htole32(MALO_TXD_STATUS_IDLE);
986 ds->pktlen = htole32(0);
987
988 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
989 BUS_DMASYNC_POSTWRITE);
990 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
991 bf->bf_m = NULL;
992 bf->bf_node = NULL;
993
994 MALO_TXQ_LOCK(txq);
995 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
996 txq->nfree++;
997 MALO_TXQ_UNLOCK(txq);
998 }
999 return nreaped;
1000 }
1001
1002 /*
1003 * Deferred processing of transmit interrupt.
1004 */
1005 static void
malo_tx_proc(void * arg,int npending)1006 malo_tx_proc(void *arg, int npending)
1007 {
1008 struct malo_softc *sc = arg;
1009 int i, nreaped;
1010
1011 /*
1012 * Process each active queue.
1013 */
1014 nreaped = 0;
1015 MALO_LOCK(sc);
1016 for (i = 0; i < MALO_NUM_TX_QUEUES; i++) {
1017 if (!STAILQ_EMPTY(&sc->malo_txq[i].active))
1018 nreaped += malo_tx_processq(sc, &sc->malo_txq[i]);
1019 }
1020
1021 if (nreaped != 0) {
1022 sc->malo_timer = 0;
1023 malo_start(sc);
1024 }
1025 MALO_UNLOCK(sc);
1026 }
1027
1028 static int
malo_tx_start(struct malo_softc * sc,struct ieee80211_node * ni,struct malo_txbuf * bf,struct mbuf * m0)1029 malo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni,
1030 struct malo_txbuf *bf, struct mbuf *m0)
1031 {
1032 #define IS_DATA_FRAME(wh) \
1033 ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA)
1034 int error, ismcast, iswep;
1035 int copyhdrlen, hdrlen, pktlen;
1036 struct ieee80211_frame *wh;
1037 struct ieee80211com *ic = &sc->malo_ic;
1038 struct ieee80211vap *vap = ni->ni_vap;
1039 struct malo_txdesc *ds;
1040 struct malo_txrec *tr;
1041 struct malo_txq *txq;
1042 uint16_t qos;
1043
1044 wh = mtod(m0, struct ieee80211_frame *);
1045 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1046 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1047 copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh);
1048 pktlen = m0->m_pkthdr.len;
1049 if (IEEE80211_QOS_HAS_SEQ(wh)) {
1050 qos = *(uint16_t *)ieee80211_getqos(wh);
1051 if (IEEE80211_IS_DSTODS(wh))
1052 copyhdrlen -= sizeof(qos);
1053 } else
1054 qos = 0;
1055
1056 if (iswep) {
1057 struct ieee80211_key *k;
1058
1059 /*
1060 * Construct the 802.11 header+trailer for an encrypted
1061 * frame. The only reason this can fail is because of an
1062 * unknown or unsupported cipher/key type.
1063 *
1064 * NB: we do this even though the firmware will ignore
1065 * what we've done for WEP and TKIP as we need the
1066 * ExtIV filled in for CCMP and this also adjusts
1067 * the headers which simplifies our work below.
1068 */
1069 k = ieee80211_crypto_encap(ni, m0);
1070 if (k == NULL) {
1071 /*
1072 * This can happen when the key is yanked after the
1073 * frame was queued. Just discard the frame; the
1074 * 802.11 layer counts failures and provides
1075 * debugging/diagnostics.
1076 */
1077 m_freem(m0);
1078 return EIO;
1079 }
1080
1081 /*
1082 * Adjust the packet length for the crypto additions
1083 * done during encap and any other bits that the f/w
1084 * will add later on.
1085 */
1086 pktlen = m0->m_pkthdr.len;
1087
1088 /* packet header may have moved, reset our local pointer */
1089 wh = mtod(m0, struct ieee80211_frame *);
1090 }
1091
1092 if (ieee80211_radiotap_active_vap(vap)) {
1093 sc->malo_tx_th.wt_flags = 0; /* XXX */
1094 if (iswep)
1095 sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1096 sc->malo_tx_th.wt_txpower = ni->ni_txpower;
1097 sc->malo_tx_th.wt_antenna = sc->malo_txantenna;
1098
1099 ieee80211_radiotap_tx(vap, m0);
1100 }
1101
1102 /*
1103 * Copy up/down the 802.11 header; the firmware requires
1104 * we present a 2-byte payload length followed by a
1105 * 4-address header (w/o QoS), followed (optionally) by
1106 * any WEP/ExtIV header (but only filled in for CCMP).
1107 * We are assured the mbuf has sufficient headroom to
1108 * prepend in-place by the setup of ic_headroom in
1109 * malo_attach.
1110 */
1111 if (hdrlen < sizeof(struct malo_txrec)) {
1112 const int space = sizeof(struct malo_txrec) - hdrlen;
1113 if (M_LEADINGSPACE(m0) < space) {
1114 /* NB: should never happen */
1115 device_printf(sc->malo_dev,
1116 "not enough headroom, need %d found %zd, "
1117 "m_flags 0x%x m_len %d\n",
1118 space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
1119 ieee80211_dump_pkt(ic,
1120 mtod(m0, const uint8_t *), m0->m_len, 0, -1);
1121 m_freem(m0);
1122 /* XXX stat */
1123 return EIO;
1124 }
1125 M_PREPEND(m0, space, M_NOWAIT);
1126 }
1127 tr = mtod(m0, struct malo_txrec *);
1128 if (wh != (struct ieee80211_frame *) &tr->wh)
1129 ovbcopy(wh, &tr->wh, hdrlen);
1130 /*
1131 * Note: the "firmware length" is actually the length of the fully
1132 * formed "802.11 payload". That is, it's everything except for
1133 * the 802.11 header. In particular this includes all crypto
1134 * material including the MIC!
1135 */
1136 tr->fwlen = htole16(pktlen - hdrlen);
1137
1138 /*
1139 * Load the DMA map so any coalescing is done. This
1140 * also calculates the number of descriptors we need.
1141 */
1142 error = malo_tx_dmasetup(sc, bf, m0);
1143 if (error != 0)
1144 return error;
1145 bf->bf_node = ni; /* NB: held reference */
1146 m0 = bf->bf_m; /* NB: may have changed */
1147 tr = mtod(m0, struct malo_txrec *);
1148 wh = (struct ieee80211_frame *)&tr->wh;
1149
1150 /*
1151 * Formulate tx descriptor.
1152 */
1153 ds = bf->bf_desc;
1154 txq = bf->bf_txq;
1155
1156 ds->qosctrl = qos; /* NB: already little-endian */
1157 ds->pktptr = htole32(bf->bf_segs[0].ds_addr);
1158 ds->pktlen = htole16(bf->bf_segs[0].ds_len);
1159 /* NB: pPhysNext setup once, don't touch */
1160 ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0;
1161 ds->sap_pktinfo = 0;
1162 ds->format = 0;
1163
1164 /*
1165 * Select transmit rate.
1166 */
1167 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1168 case IEEE80211_FC0_TYPE_MGT:
1169 sc->malo_stats.mst_tx_mgmt++;
1170 /* fall thru... */
1171 case IEEE80211_FC0_TYPE_CTL:
1172 ds->txpriority = 1;
1173 break;
1174 case IEEE80211_FC0_TYPE_DATA:
1175 ds->txpriority = txq->qnum;
1176 break;
1177 default:
1178 device_printf(sc->malo_dev, "bogus frame type 0x%x (%s)\n",
1179 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1180 /* XXX statistic */
1181 m_freem(m0);
1182 return EIO;
1183 }
1184
1185 #ifdef MALO_DEBUG
1186 if (IFF_DUMPPKTS_XMIT(sc))
1187 ieee80211_dump_pkt(ic,
1188 mtod(m0, const uint8_t *)+sizeof(uint16_t),
1189 m0->m_len - sizeof(uint16_t), ds->datarate, -1);
1190 #endif
1191
1192 MALO_TXQ_LOCK(txq);
1193 if (!IS_DATA_FRAME(wh))
1194 ds->status |= htole32(1);
1195 ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED);
1196 STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
1197 MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1198
1199 sc->malo_timer = 5;
1200 MALO_TXQ_UNLOCK(txq);
1201 return 0;
1202 }
1203
1204 static int
malo_transmit(struct ieee80211com * ic,struct mbuf * m)1205 malo_transmit(struct ieee80211com *ic, struct mbuf *m)
1206 {
1207 struct malo_softc *sc = ic->ic_softc;
1208 int error;
1209
1210 MALO_LOCK(sc);
1211 if (!sc->malo_running) {
1212 MALO_UNLOCK(sc);
1213 return (ENXIO);
1214 }
1215 error = mbufq_enqueue(&sc->malo_snd, m);
1216 if (error) {
1217 MALO_UNLOCK(sc);
1218 return (error);
1219 }
1220 malo_start(sc);
1221 MALO_UNLOCK(sc);
1222 return (0);
1223 }
1224
1225 static void
malo_start(struct malo_softc * sc)1226 malo_start(struct malo_softc *sc)
1227 {
1228 struct ieee80211_node *ni;
1229 struct malo_txq *txq = &sc->malo_txq[0];
1230 struct malo_txbuf *bf = NULL;
1231 struct mbuf *m;
1232 int nqueued = 0;
1233
1234 MALO_LOCK_ASSERT(sc);
1235
1236 if (!sc->malo_running || sc->malo_invalid)
1237 return;
1238
1239 while ((m = mbufq_dequeue(&sc->malo_snd)) != NULL) {
1240 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1241 bf = malo_getbuf(sc, txq);
1242 if (bf == NULL) {
1243 mbufq_prepend(&sc->malo_snd, m);
1244 sc->malo_stats.mst_tx_qstop++;
1245 break;
1246 }
1247 /*
1248 * Pass the frame to the h/w for transmission.
1249 */
1250 if (malo_tx_start(sc, ni, bf, m)) {
1251 if_inc_counter(ni->ni_vap->iv_ifp,
1252 IFCOUNTER_OERRORS, 1);
1253 if (bf != NULL) {
1254 bf->bf_m = NULL;
1255 bf->bf_node = NULL;
1256 MALO_TXQ_LOCK(txq);
1257 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1258 MALO_TXQ_UNLOCK(txq);
1259 }
1260 ieee80211_free_node(ni);
1261 continue;
1262 }
1263 nqueued++;
1264
1265 if (nqueued >= malo_txcoalesce) {
1266 /*
1267 * Poke the firmware to process queued frames;
1268 * see below about (lack of) locking.
1269 */
1270 nqueued = 0;
1271 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1272 }
1273 }
1274
1275 if (nqueued) {
1276 /*
1277 * NB: We don't need to lock against tx done because
1278 * this just prods the firmware to check the transmit
1279 * descriptors. The firmware will also start fetching
1280 * descriptors by itself if it notices new ones are
1281 * present when it goes to deliver a tx done interrupt
1282 * to the host. So if we race with tx done processing
1283 * it's ok. Delivering the kick here rather than in
1284 * malo_tx_start is an optimization to avoid poking the
1285 * firmware for each packet.
1286 *
1287 * NB: the queue id isn't used so 0 is ok.
1288 */
1289 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1290 }
1291 }
1292
1293 static void
malo_watchdog(void * arg)1294 malo_watchdog(void *arg)
1295 {
1296 struct malo_softc *sc = arg;
1297
1298 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1299 if (sc->malo_timer == 0 || --sc->malo_timer > 0)
1300 return;
1301
1302 if (sc->malo_running && !sc->malo_invalid) {
1303 device_printf(sc->malo_dev, "watchdog timeout\n");
1304
1305 /* XXX no way to reset h/w. now */
1306
1307 counter_u64_add(sc->malo_ic.ic_oerrors, 1);
1308 sc->malo_stats.mst_watchdog++;
1309 }
1310 }
1311
1312 static int
malo_hal_reset(struct malo_softc * sc)1313 malo_hal_reset(struct malo_softc *sc)
1314 {
1315 static int first = 0;
1316 struct ieee80211com *ic = &sc->malo_ic;
1317 struct malo_hal *mh = sc->malo_mh;
1318
1319 if (first == 0) {
1320 /*
1321 * NB: when the device firstly is initialized, sometimes
1322 * firmware could override rx/tx dma registers so we re-set
1323 * these values once.
1324 */
1325 malo_hal_set_rxtxdma(sc);
1326 first = 1;
1327 }
1328
1329 malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna);
1330 malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna);
1331 malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE);
1332 malo_chan_set(sc, ic->ic_curchan);
1333
1334 /* XXX needs other stuffs? */
1335
1336 return 1;
1337 }
1338
1339 static __inline struct mbuf *
malo_getrxmbuf(struct malo_softc * sc,struct malo_rxbuf * bf)1340 malo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf)
1341 {
1342 struct mbuf *m;
1343 bus_addr_t paddr;
1344 int error;
1345
1346 /* XXX don't need mbuf, just dma buffer */
1347 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
1348 if (m == NULL) {
1349 sc->malo_stats.mst_rx_nombuf++; /* XXX */
1350 return NULL;
1351 }
1352 error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap,
1353 mtod(m, caddr_t), MJUMPAGESIZE,
1354 malo_load_cb, &paddr, BUS_DMA_NOWAIT);
1355 if (error != 0) {
1356 device_printf(sc->malo_dev,
1357 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1358 m_freem(m);
1359 return NULL;
1360 }
1361 bf->bf_data = paddr;
1362 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1363
1364 return m;
1365 }
1366
1367 static int
malo_rxbuf_init(struct malo_softc * sc,struct malo_rxbuf * bf)1368 malo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf)
1369 {
1370 struct malo_rxdesc *ds;
1371
1372 ds = bf->bf_desc;
1373 if (bf->bf_m == NULL) {
1374 bf->bf_m = malo_getrxmbuf(sc, bf);
1375 if (bf->bf_m == NULL) {
1376 /* mark descriptor to be skipped */
1377 ds->rxcontrol = MALO_RXD_CTRL_OS_OWN;
1378 /* NB: don't need PREREAD */
1379 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
1380 return ENOMEM;
1381 }
1382 }
1383
1384 /*
1385 * Setup descriptor.
1386 */
1387 ds->qosctrl = 0;
1388 ds->snr = 0;
1389 ds->status = MALO_RXD_STATUS_IDLE;
1390 ds->channel = 0;
1391 ds->pktlen = htole16(MALO_RXSIZE);
1392 ds->nf = 0;
1393 ds->physbuffdata = htole32(bf->bf_data);
1394 /* NB: don't touch pPhysNext, set once */
1395 ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN;
1396 MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1397
1398 return 0;
1399 }
1400
1401 /*
1402 * Setup the rx data structures. This should only be done once or we may get
1403 * out of sync with the firmware.
1404 */
1405 static int
malo_startrecv(struct malo_softc * sc)1406 malo_startrecv(struct malo_softc *sc)
1407 {
1408 struct malo_rxbuf *bf, *prev;
1409 struct malo_rxdesc *ds;
1410
1411 if (sc->malo_recvsetup == 1) {
1412 malo_mode_init(sc); /* set filters, etc. */
1413 return 0;
1414 }
1415
1416 prev = NULL;
1417 STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) {
1418 int error = malo_rxbuf_init(sc, bf);
1419 if (error != 0) {
1420 DPRINTF(sc, MALO_DEBUG_RECV,
1421 "%s: malo_rxbuf_init failed %d\n",
1422 __func__, error);
1423 return error;
1424 }
1425 if (prev != NULL) {
1426 ds = prev->bf_desc;
1427 ds->physnext = htole32(bf->bf_daddr);
1428 }
1429 prev = bf;
1430 }
1431 if (prev != NULL) {
1432 ds = prev->bf_desc;
1433 ds->physnext =
1434 htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr);
1435 }
1436
1437 sc->malo_recvsetup = 1;
1438
1439 malo_mode_init(sc); /* set filters, etc. */
1440
1441 return 0;
1442 }
1443
1444 static void
malo_init_locked(struct malo_softc * sc)1445 malo_init_locked(struct malo_softc *sc)
1446 {
1447 struct malo_hal *mh = sc->malo_mh;
1448 int error;
1449
1450 MALO_LOCK_ASSERT(sc);
1451
1452 /*
1453 * Stop anything previously setup. This is safe whether this is
1454 * the first time through or not.
1455 */
1456 malo_stop(sc);
1457
1458 /*
1459 * Push state to the firmware.
1460 */
1461 if (!malo_hal_reset(sc)) {
1462 device_printf(sc->malo_dev,
1463 "%s: unable to reset hardware\n", __func__);
1464 return;
1465 }
1466
1467 /*
1468 * Setup recv (once); transmit is already good to go.
1469 */
1470 error = malo_startrecv(sc);
1471 if (error != 0) {
1472 device_printf(sc->malo_dev,
1473 "%s: unable to start recv logic, error %d\n",
1474 __func__, error);
1475 return;
1476 }
1477
1478 /*
1479 * Enable interrupts.
1480 */
1481 sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY
1482 | MALO_A2HRIC_BIT_TX_DONE
1483 | MALO_A2HRIC_BIT_OPC_DONE
1484 | MALO_A2HRIC_BIT_MAC_EVENT
1485 | MALO_A2HRIC_BIT_RX_PROBLEM
1486 | MALO_A2HRIC_BIT_ICV_ERROR
1487 | MALO_A2HRIC_BIT_RADAR_DETECT
1488 | MALO_A2HRIC_BIT_CHAN_SWITCH;
1489
1490 sc->malo_running = 1;
1491 malo_hal_intrset(mh, sc->malo_imask);
1492 callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc);
1493 }
1494
1495 static void
malo_init(void * arg)1496 malo_init(void *arg)
1497 {
1498 struct malo_softc *sc = (struct malo_softc *) arg;
1499 struct ieee80211com *ic = &sc->malo_ic;
1500
1501 MALO_LOCK(sc);
1502 malo_init_locked(sc);
1503 MALO_UNLOCK(sc);
1504
1505 if (sc->malo_running)
1506 ieee80211_start_all(ic); /* start all vap's */
1507 }
1508
1509 struct malo_copy_maddr_ctx {
1510 uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX];
1511 int nmc;
1512 };
1513
1514 static u_int
malo_copy_maddr(void * arg,struct sockaddr_dl * sdl,u_int nmc)1515 malo_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int nmc)
1516 {
1517 struct malo_copy_maddr_ctx *ctx = arg;
1518
1519 if (ctx->nmc == MALO_HAL_MCAST_MAX)
1520 return (0);
1521
1522 IEEE80211_ADDR_COPY(ctx->macs + (ctx->nmc * IEEE80211_ADDR_LEN),
1523 LLADDR(sdl));
1524 ctx->nmc++;
1525
1526 return (1);
1527 }
1528
1529 /*
1530 * Set the multicast filter contents into the hardware.
1531 */
1532 static void
malo_setmcastfilter(struct malo_softc * sc)1533 malo_setmcastfilter(struct malo_softc *sc)
1534 {
1535 struct malo_copy_maddr_ctx ctx;
1536 struct ieee80211com *ic = &sc->malo_ic;
1537 struct ieee80211vap *vap;
1538
1539
1540 if (ic->ic_opmode == IEEE80211_M_MONITOR || ic->ic_allmulti > 0 ||
1541 ic->ic_promisc > 0)
1542 goto all;
1543
1544 ctx.nmc = 0;
1545 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next)
1546 if_foreach_llmaddr(vap->iv_ifp, malo_copy_maddr, &ctx);
1547
1548 malo_hal_setmcast(sc->malo_mh, ctx.nmc, ctx.macs);
1549
1550 all:
1551 /*
1552 * XXX we don't know how to set the f/w for supporting
1553 * IFF_ALLMULTI | IFF_PROMISC cases
1554 */
1555 return;
1556 }
1557
1558 static int
malo_mode_init(struct malo_softc * sc)1559 malo_mode_init(struct malo_softc *sc)
1560 {
1561 struct ieee80211com *ic = &sc->malo_ic;
1562 struct malo_hal *mh = sc->malo_mh;
1563
1564 malo_hal_setpromisc(mh, ic->ic_promisc > 0);
1565 malo_setmcastfilter(sc);
1566
1567 return ENXIO;
1568 }
1569
1570 static void
malo_tx_draintxq(struct malo_softc * sc,struct malo_txq * txq)1571 malo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq)
1572 {
1573 struct ieee80211_node *ni;
1574 struct malo_txbuf *bf;
1575 u_int ix __unused;
1576
1577 /*
1578 * NB: this assumes output has been stopped and
1579 * we do not need to block malo_tx_tasklet
1580 */
1581 for (ix = 0;; ix++) {
1582 MALO_TXQ_LOCK(txq);
1583 bf = STAILQ_FIRST(&txq->active);
1584 if (bf == NULL) {
1585 MALO_TXQ_UNLOCK(txq);
1586 break;
1587 }
1588 STAILQ_REMOVE_HEAD(&txq->active, bf_list);
1589 MALO_TXQ_UNLOCK(txq);
1590 #ifdef MALO_DEBUG
1591 if (sc->malo_debug & MALO_DEBUG_RESET) {
1592 struct ieee80211com *ic = &sc->malo_ic;
1593 const struct malo_txrec *tr =
1594 mtod(bf->bf_m, const struct malo_txrec *);
1595 malo_printtxbuf(bf, txq->qnum, ix);
1596 ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
1597 bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
1598 }
1599 #endif /* MALO_DEBUG */
1600 bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap);
1601 ni = bf->bf_node;
1602 bf->bf_node = NULL;
1603 if (ni != NULL) {
1604 /*
1605 * Reclaim node reference.
1606 */
1607 ieee80211_free_node(ni);
1608 }
1609 m_freem(bf->bf_m);
1610 bf->bf_m = NULL;
1611
1612 MALO_TXQ_LOCK(txq);
1613 STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1614 txq->nfree++;
1615 MALO_TXQ_UNLOCK(txq);
1616 }
1617 }
1618
1619 static void
malo_stop(struct malo_softc * sc)1620 malo_stop(struct malo_softc *sc)
1621 {
1622 struct malo_hal *mh = sc->malo_mh;
1623 int i;
1624
1625 DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u running %u\n",
1626 __func__, sc->malo_invalid, sc->malo_running);
1627
1628 MALO_LOCK_ASSERT(sc);
1629
1630 if (!sc->malo_running)
1631 return;
1632
1633 /*
1634 * Shutdown the hardware and driver:
1635 * disable interrupts
1636 * turn off the radio
1637 * drain and release tx queues
1638 *
1639 * Note that some of this work is not possible if the hardware
1640 * is gone (invalid).
1641 */
1642 sc->malo_running = 0;
1643 callout_stop(&sc->malo_watchdog_timer);
1644 sc->malo_timer = 0;
1645 /* disable interrupt. */
1646 malo_hal_intrset(mh, 0);
1647 /* turn off the radio. */
1648 malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE);
1649
1650 /* drain and release tx queues. */
1651 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
1652 malo_tx_draintxq(sc, &sc->malo_txq[i]);
1653 }
1654
1655 static void
malo_parent(struct ieee80211com * ic)1656 malo_parent(struct ieee80211com *ic)
1657 {
1658 struct malo_softc *sc = ic->ic_softc;
1659 int startall = 0;
1660
1661 MALO_LOCK(sc);
1662 if (ic->ic_nrunning > 0) {
1663 /*
1664 * Beware of being called during attach/detach
1665 * to reset promiscuous mode. In that case we
1666 * will still be marked UP but not RUNNING.
1667 * However trying to re-init the interface
1668 * is the wrong thing to do as we've already
1669 * torn down much of our state. There's
1670 * probably a better way to deal with this.
1671 */
1672 if (!sc->malo_running && !sc->malo_invalid) {
1673 malo_init(sc);
1674 startall = 1;
1675 }
1676 /*
1677 * To avoid rescanning another access point,
1678 * do not call malo_init() here. Instead,
1679 * only reflect promisc mode settings.
1680 */
1681 malo_mode_init(sc);
1682 } else if (sc->malo_running)
1683 malo_stop(sc);
1684 MALO_UNLOCK(sc);
1685 if (startall)
1686 ieee80211_start_all(ic);
1687 }
1688
1689 /*
1690 * Callback from the 802.11 layer to update the slot time
1691 * based on the current setting. We use it to notify the
1692 * firmware of ERP changes and the f/w takes care of things
1693 * like slot time and preamble.
1694 */
1695 static void
malo_updateslot(struct ieee80211com * ic)1696 malo_updateslot(struct ieee80211com *ic)
1697 {
1698 struct malo_softc *sc = ic->ic_softc;
1699 struct malo_hal *mh = sc->malo_mh;
1700 int error;
1701
1702 /* NB: can be called early; suppress needless cmds */
1703 if (!sc->malo_running)
1704 return;
1705
1706 DPRINTF(sc, MALO_DEBUG_RESET,
1707 "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n",
1708 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1709 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags);
1710
1711 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1712 error = malo_hal_set_slot(mh, 1);
1713 else
1714 error = malo_hal_set_slot(mh, 0);
1715
1716 if (error != 0)
1717 device_printf(sc->malo_dev, "setting %s slot failed\n",
1718 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long");
1719 }
1720
1721 static int
malo_newstate(struct ieee80211vap * vap,enum ieee80211_state nstate,int arg)1722 malo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1723 {
1724 struct ieee80211com *ic = vap->iv_ic;
1725 struct malo_softc *sc = ic->ic_softc;
1726 struct malo_hal *mh = sc->malo_mh;
1727 int error;
1728
1729 DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1730 ieee80211_state_name[vap->iv_state],
1731 ieee80211_state_name[nstate]);
1732
1733 /*
1734 * Invoke the net80211 layer first so iv_bss is setup.
1735 */
1736 error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg);
1737 if (error != 0)
1738 return error;
1739
1740 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1741 struct ieee80211_node *ni = vap->iv_bss;
1742 enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan);
1743 const struct ieee80211_txparam *tp = &vap->iv_txparms[mode];
1744
1745 DPRINTF(sc, MALO_DEBUG_STATE,
1746 "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
1747 "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n",
1748 vap->iv_ifp->if_xname, __func__, vap->iv_flags,
1749 ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
1750 ieee80211_chan2ieee(ic, ic->ic_curchan),
1751 ni->ni_associd, mode, tp->ucastrate);
1752
1753 malo_hal_setradio(mh, 1,
1754 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ?
1755 MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE);
1756 malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd);
1757 malo_hal_set_rate(mh, mode,
1758 tp->ucastrate == IEEE80211_FIXED_RATE_NONE ?
1759 0 : malo_fix2rate(tp->ucastrate));
1760 }
1761 return 0;
1762 }
1763
1764 static int
malo_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)1765 malo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1766 const struct ieee80211_bpf_params *params)
1767 {
1768 struct ieee80211com *ic = ni->ni_ic;
1769 struct malo_softc *sc = ic->ic_softc;
1770 struct malo_txbuf *bf;
1771 struct malo_txq *txq;
1772
1773 if (!sc->malo_running || sc->malo_invalid) {
1774 m_freem(m);
1775 return ENETDOWN;
1776 }
1777
1778 /*
1779 * Grab a TX buffer and associated resources. Note that we depend
1780 * on the classification by the 802.11 layer to get to the right h/w
1781 * queue. Management frames must ALWAYS go on queue 1 but we
1782 * cannot just force that here because we may receive non-mgt frames.
1783 */
1784 txq = &sc->malo_txq[0];
1785 bf = malo_getbuf(sc, txq);
1786 if (bf == NULL) {
1787 m_freem(m);
1788 return ENOBUFS;
1789 }
1790
1791 /*
1792 * Pass the frame to the h/w for transmission.
1793 */
1794 if (malo_tx_start(sc, ni, bf, m) != 0) {
1795 bf->bf_m = NULL;
1796 bf->bf_node = NULL;
1797 MALO_TXQ_LOCK(txq);
1798 STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1799 txq->nfree++;
1800 MALO_TXQ_UNLOCK(txq);
1801
1802 return EIO; /* XXX */
1803 }
1804
1805 /*
1806 * NB: We don't need to lock against tx done because this just
1807 * prods the firmware to check the transmit descriptors. The firmware
1808 * will also start fetching descriptors by itself if it notices
1809 * new ones are present when it goes to deliver a tx done interrupt
1810 * to the host. So if we race with tx done processing it's ok.
1811 * Delivering the kick here rather than in malo_tx_start is
1812 * an optimization to avoid poking the firmware for each packet.
1813 *
1814 * NB: the queue id isn't used so 0 is ok.
1815 */
1816 malo_hal_txstart(sc->malo_mh, 0/*XXX*/);
1817
1818 return 0;
1819 }
1820
1821 static void
malo_sysctlattach(struct malo_softc * sc)1822 malo_sysctlattach(struct malo_softc *sc)
1823 {
1824 #ifdef MALO_DEBUG
1825 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev);
1826 struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev);
1827
1828 sc->malo_debug = malo_debug;
1829 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1830 "debug", CTLFLAG_RW, &sc->malo_debug, 0,
1831 "control debugging printfs");
1832 #endif
1833 }
1834
1835 static void
malo_announce(struct malo_softc * sc)1836 malo_announce(struct malo_softc *sc)
1837 {
1838
1839 device_printf(sc->malo_dev,
1840 "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n",
1841 sc->malo_hwspecs.hwversion,
1842 (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff,
1843 (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff,
1844 (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff,
1845 (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff,
1846 sc->malo_hwspecs.regioncode);
1847
1848 if (bootverbose || malo_rxbuf != MALO_RXBUF)
1849 device_printf(sc->malo_dev,
1850 "using %u rx buffers\n", malo_rxbuf);
1851 if (bootverbose || malo_txbuf != MALO_TXBUF)
1852 device_printf(sc->malo_dev,
1853 "using %u tx buffers\n", malo_txbuf);
1854 }
1855
1856 /*
1857 * Convert net80211 channel to a HAL channel.
1858 */
1859 static void
malo_mapchan(struct malo_hal_channel * hc,const struct ieee80211_channel * chan)1860 malo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan)
1861 {
1862 hc->channel = chan->ic_ieee;
1863
1864 *(uint32_t *)&hc->flags = 0;
1865 if (IEEE80211_IS_CHAN_2GHZ(chan))
1866 hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ;
1867 }
1868
1869 /*
1870 * Set/change channels. If the channel is really being changed,
1871 * it's done by reseting the chip. To accomplish this we must
1872 * first cleanup any pending DMA, then restart stuff after a la
1873 * malo_init.
1874 */
1875 static int
malo_chan_set(struct malo_softc * sc,struct ieee80211_channel * chan)1876 malo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan)
1877 {
1878 struct malo_hal *mh = sc->malo_mh;
1879 struct malo_hal_channel hchan;
1880
1881 DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
1882 __func__, chan->ic_freq, chan->ic_flags);
1883
1884 /*
1885 * Convert to a HAL channel description with the flags constrained
1886 * to reflect the current operating mode.
1887 */
1888 malo_mapchan(&hchan, chan);
1889 malo_hal_intrset(mh, 0); /* disable interrupts */
1890 malo_hal_setchannel(mh, &hchan);
1891 malo_hal_settxpower(mh, &hchan);
1892
1893 /*
1894 * Update internal state.
1895 */
1896 sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq);
1897 sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq);
1898 if (IEEE80211_IS_CHAN_ANYG(chan)) {
1899 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
1900 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
1901 } else {
1902 sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
1903 sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
1904 }
1905 sc->malo_curchan = hchan;
1906 malo_hal_intrset(mh, sc->malo_imask);
1907
1908 return 0;
1909 }
1910
1911 static void
malo_scan_start(struct ieee80211com * ic)1912 malo_scan_start(struct ieee80211com *ic)
1913 {
1914 struct malo_softc *sc = ic->ic_softc;
1915
1916 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1917 }
1918
1919 static void
malo_scan_end(struct ieee80211com * ic)1920 malo_scan_end(struct ieee80211com *ic)
1921 {
1922 struct malo_softc *sc = ic->ic_softc;
1923
1924 DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__);
1925 }
1926
1927 static void
malo_set_channel(struct ieee80211com * ic)1928 malo_set_channel(struct ieee80211com *ic)
1929 {
1930 struct malo_softc *sc = ic->ic_softc;
1931
1932 (void) malo_chan_set(sc, ic->ic_curchan);
1933 }
1934
1935 static void
malo_rx_proc(void * arg,int npending)1936 malo_rx_proc(void *arg, int npending)
1937 {
1938 struct malo_softc *sc = arg;
1939 struct ieee80211com *ic = &sc->malo_ic;
1940 struct malo_rxbuf *bf;
1941 struct malo_rxdesc *ds;
1942 struct mbuf *m, *mnew;
1943 struct ieee80211_qosframe *wh;
1944 struct ieee80211_node *ni;
1945 int off, len, hdrlen, pktlen, rssi, ntodo;
1946 uint8_t *data, status;
1947 uint32_t readptr, writeptr;
1948
1949 DPRINTF(sc, MALO_DEBUG_RX_PROC,
1950 "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n",
1951 __func__, npending,
1952 sc->malo_hwspecs.rxdesc_read,
1953 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read),
1954 sc->malo_hwspecs.rxdesc_write,
1955 malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write));
1956
1957 readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read);
1958 writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write);
1959 if (readptr == writeptr)
1960 return;
1961
1962 bf = sc->malo_rxnext;
1963 for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) {
1964 if (bf == NULL) {
1965 bf = STAILQ_FIRST(&sc->malo_rxbuf);
1966 break;
1967 }
1968 ds = bf->bf_desc;
1969 if (bf->bf_m == NULL) {
1970 /*
1971 * If data allocation failed previously there
1972 * will be no buffer; try again to re-populate it.
1973 * Note the firmware will not advance to the next
1974 * descriptor with a dma buffer so we must mimic
1975 * this or we'll get out of sync.
1976 */
1977 DPRINTF(sc, MALO_DEBUG_ANY,
1978 "%s: rx buf w/o dma memory\n", __func__);
1979 (void)malo_rxbuf_init(sc, bf);
1980 break;
1981 }
1982 MALO_RXDESC_SYNC(sc, ds,
1983 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1984 if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN)
1985 break;
1986
1987 readptr = le32toh(ds->physnext);
1988
1989 #ifdef MALO_DEBUG
1990 if (sc->malo_debug & MALO_DEBUG_RECV_DESC)
1991 malo_printrxbuf(bf, 0);
1992 #endif
1993 status = ds->status;
1994 if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) {
1995 counter_u64_add(ic->ic_ierrors, 1);
1996 goto rx_next;
1997 }
1998 /*
1999 * Sync the data buffer.
2000 */
2001 len = le16toh(ds->pktlen);
2002 bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap,
2003 BUS_DMASYNC_POSTREAD);
2004 /*
2005 * The 802.11 header is provided all or in part at the front;
2006 * use it to calculate the true size of the header that we'll
2007 * construct below. We use this to figure out where to copy
2008 * payload prior to constructing the header.
2009 */
2010 m = bf->bf_m;
2011 data = mtod(m, uint8_t *);
2012 hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
2013 off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2014
2015 /*
2016 * Calculate RSSI. XXX wrong
2017 */
2018 rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */
2019 if (rssi > 100)
2020 rssi = 100;
2021
2022 pktlen = hdrlen + (len - off);
2023 /*
2024 * NB: we know our frame is at least as large as
2025 * IEEE80211_MIN_LEN because there is a 4-address frame at
2026 * the front. Hence there's no need to vet the packet length.
2027 * If the frame in fact is too small it should be discarded
2028 * at the net80211 layer.
2029 */
2030
2031 /* XXX don't need mbuf, just dma buffer */
2032 mnew = malo_getrxmbuf(sc, bf);
2033 if (mnew == NULL) {
2034 counter_u64_add(ic->ic_ierrors, 1);
2035 goto rx_next;
2036 }
2037 /*
2038 * Attach the dma buffer to the mbuf; malo_rxbuf_init will
2039 * re-setup the rx descriptor using the replacement dma
2040 * buffer we just installed above.
2041 */
2042 bf->bf_m = mnew;
2043 m->m_data += off - hdrlen;
2044 m->m_pkthdr.len = m->m_len = pktlen;
2045
2046 /*
2047 * Piece 802.11 header together.
2048 */
2049 wh = mtod(m, struct ieee80211_qosframe *);
2050 /* NB: don't need to do this sometimes but ... */
2051 /* XXX special case so we can memcpy after m_devget? */
2052 ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2053 if (IEEE80211_QOS_HAS_SEQ(wh))
2054 *(uint16_t *)ieee80211_getqos(wh) = ds->qosctrl;
2055 if (ieee80211_radiotap_active(ic)) {
2056 sc->malo_rx_th.wr_flags = 0;
2057 sc->malo_rx_th.wr_rate = ds->rate;
2058 sc->malo_rx_th.wr_antsignal = rssi;
2059 sc->malo_rx_th.wr_antnoise = ds->nf;
2060 }
2061 #ifdef MALO_DEBUG
2062 if (IFF_DUMPPKTS_RECV(sc, wh)) {
2063 ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2064 len, ds->rate, rssi);
2065 }
2066 #endif
2067 /* dispatch */
2068 ni = ieee80211_find_rxnode(ic,
2069 (struct ieee80211_frame_min *)wh);
2070 if (ni != NULL) {
2071 (void) ieee80211_input(ni, m, rssi, ds->nf);
2072 ieee80211_free_node(ni);
2073 } else
2074 (void) ieee80211_input_all(ic, m, rssi, ds->nf);
2075 rx_next:
2076 /* NB: ignore ENOMEM so we process more descriptors */
2077 (void) malo_rxbuf_init(sc, bf);
2078 bf = STAILQ_NEXT(bf, bf_list);
2079 }
2080
2081 malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr);
2082 sc->malo_rxnext = bf;
2083
2084 if (mbufq_first(&sc->malo_snd) != NULL)
2085 malo_start(sc);
2086 }
2087
2088 /*
2089 * Reclaim all tx queue resources.
2090 */
2091 static void
malo_tx_cleanup(struct malo_softc * sc)2092 malo_tx_cleanup(struct malo_softc *sc)
2093 {
2094 int i;
2095
2096 for (i = 0; i < MALO_NUM_TX_QUEUES; i++)
2097 malo_tx_cleanupq(sc, &sc->malo_txq[i]);
2098 }
2099
2100 int
malo_detach(struct malo_softc * sc)2101 malo_detach(struct malo_softc *sc)
2102 {
2103 struct ieee80211com *ic = &sc->malo_ic;
2104
2105 malo_stop(sc);
2106
2107 if (sc->malo_tq != NULL) {
2108 taskqueue_drain(sc->malo_tq, &sc->malo_rxtask);
2109 taskqueue_drain(sc->malo_tq, &sc->malo_txtask);
2110 taskqueue_free(sc->malo_tq);
2111 sc->malo_tq = NULL;
2112 }
2113
2114 /*
2115 * NB: the order of these is important:
2116 * o call the 802.11 layer before detaching the hal to
2117 * insure callbacks into the driver to delete global
2118 * key cache entries can be handled
2119 * o reclaim the tx queue data structures after calling
2120 * the 802.11 layer as we'll get called back to reclaim
2121 * node state and potentially want to use them
2122 * o to cleanup the tx queues the hal is called, so detach
2123 * it last
2124 * Other than that, it's straightforward...
2125 */
2126 ieee80211_ifdetach(ic);
2127 callout_drain(&sc->malo_watchdog_timer);
2128 malo_dma_cleanup(sc);
2129 malo_tx_cleanup(sc);
2130 malo_hal_detach(sc->malo_mh);
2131 mbufq_drain(&sc->malo_snd);
2132 MALO_LOCK_DESTROY(sc);
2133
2134 return 0;
2135 }
2136
2137 void
malo_shutdown(struct malo_softc * sc)2138 malo_shutdown(struct malo_softc *sc)
2139 {
2140
2141 malo_stop(sc);
2142 }
2143
2144 void
malo_suspend(struct malo_softc * sc)2145 malo_suspend(struct malo_softc *sc)
2146 {
2147
2148 malo_stop(sc);
2149 }
2150
2151 void
malo_resume(struct malo_softc * sc)2152 malo_resume(struct malo_softc *sc)
2153 {
2154
2155 if (sc->malo_ic.ic_nrunning > 0)
2156 malo_init(sc);
2157 }
2158