1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2013 Neel Natu <neel@freebsd.org>
5 * Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 #include <sys/types.h>
32 #include <machine/vmm.h>
33 #include <machine/vmm_snapshot.h>
34
35 #include <err.h>
36 #include <stdio.h>
37 #include <stdlib.h>
38 #include <string.h>
39
40 #include <vmmapi.h>
41
42 #include "acpi.h"
43 #include "debug.h"
44 #include "bootrom.h"
45 #include "config.h"
46 #include "inout.h"
47 #include "pci_emul.h"
48 #include "pci_irq.h"
49 #include "pci_lpc.h"
50 #include "pci_passthru.h"
51 #include "pctestdev.h"
52 #include "tpm_device.h"
53 #include "uart_emul.h"
54
55 #define IO_ICU1 0x20
56 #define IO_ICU2 0xA0
57
58 SET_DECLARE(lpc_dsdt_set, struct lpc_dsdt);
59 SET_DECLARE(lpc_sysres_set, struct lpc_sysres);
60
61 #define ELCR_PORT 0x4d0
62 SYSRES_IO(ELCR_PORT, 2);
63
64 #define IO_TIMER1_PORT 0x40
65
66 #define NMISC_PORT 0x61
67 SYSRES_IO(NMISC_PORT, 1);
68
69 static struct pci_devinst *lpc_bridge;
70
71 #define LPC_UART_NUM 4
72 static struct lpc_uart_softc {
73 struct uart_ns16550_softc *uart_softc;
74 int iobase;
75 int irq;
76 int enabled;
77 } lpc_uart_softc[LPC_UART_NUM];
78
79 static const char *lpc_uart_names[LPC_UART_NUM] = {
80 "com1", "com2", "com3", "com4"
81 };
82
83 static const char *lpc_uart_acpi_names[LPC_UART_NUM] = {
84 "COM1", "COM2", "COM3", "COM4"
85 };
86
87 /*
88 * LPC device configuration is in the following form:
89 * <lpc_device_name>[,<options>]
90 * For e.g. "com1,stdio" or "bootrom,/var/romfile"
91 */
92 int
lpc_device_parse(const char * opts)93 lpc_device_parse(const char *opts)
94 {
95 int unit, error;
96 char *str, *cpy, *lpcdev, *node_name;
97 const char *romfile, *varfile, *tpm_type, *tpm_path;
98
99 error = -1;
100 str = cpy = strdup(opts);
101 lpcdev = strsep(&str, ",");
102 if (lpcdev != NULL) {
103 if (strcasecmp(lpcdev, "bootrom") == 0) {
104 romfile = strsep(&str, ",");
105 if (romfile == NULL) {
106 errx(4, "invalid bootrom option \"%s\"", opts);
107 }
108 set_config_value("lpc.bootrom", romfile);
109
110 varfile = strsep(&str, ",");
111 if (varfile == NULL) {
112 error = 0;
113 goto done;
114 }
115 if (strchr(varfile, '=') == NULL) {
116 set_config_value("lpc.bootvars", varfile);
117 } else {
118 /* varfile doesn't exist, it's another config
119 * option */
120 pci_parse_legacy_config(find_config_node("lpc"),
121 varfile);
122 }
123
124 pci_parse_legacy_config(find_config_node("lpc"), str);
125 error = 0;
126 goto done;
127 }
128 if (strcasecmp(lpcdev, "tpm") == 0) {
129 nvlist_t *nvl = create_config_node("tpm");
130
131 tpm_type = strsep(&str, ",");
132 if (tpm_type == NULL) {
133 errx(4, "invalid tpm type \"%s\"", opts);
134 }
135 set_config_value_node(nvl, "type", tpm_type);
136
137 tpm_path = strsep(&str, ",");
138 if (tpm_path == NULL) {
139 errx(4, "invalid tpm path \"%s\"", opts);
140 }
141 set_config_value_node(nvl, "path", tpm_path);
142
143 pci_parse_legacy_config(find_config_node("tpm"), str);
144
145 set_config_value_node_if_unset(nvl, "version", "2.0");
146 error = 0;
147 goto done;
148 }
149 for (unit = 0; unit < LPC_UART_NUM; unit++) {
150 if (strcasecmp(lpcdev, lpc_uart_names[unit]) == 0) {
151 asprintf(&node_name, "lpc.%s.path",
152 lpc_uart_names[unit]);
153 set_config_value(node_name, str);
154 free(node_name);
155 error = 0;
156 goto done;
157 }
158 }
159 if (strcasecmp(lpcdev, pctestdev_getname()) == 0) {
160 asprintf(&node_name, "lpc.%s", pctestdev_getname());
161 set_config_bool(node_name, true);
162 free(node_name);
163 error = 0;
164 goto done;
165 }
166 }
167
168 done:
169 free(cpy);
170
171 return (error);
172 }
173
174 void
lpc_print_supported_devices(void)175 lpc_print_supported_devices(void)
176 {
177 size_t i;
178
179 printf("bootrom\n");
180 for (i = 0; i < LPC_UART_NUM; i++)
181 printf("%s\n", lpc_uart_names[i]);
182 printf("tpm\n");
183 printf("%s\n", pctestdev_getname());
184 }
185
186 const char *
lpc_bootrom(void)187 lpc_bootrom(void)
188 {
189
190 return (get_config_value("lpc.bootrom"));
191 }
192
193 const char *
lpc_fwcfg(void)194 lpc_fwcfg(void)
195 {
196 return (get_config_value("lpc.fwcfg"));
197 }
198
199 static void
lpc_uart_intr_assert(void * arg)200 lpc_uart_intr_assert(void *arg)
201 {
202 struct lpc_uart_softc *sc = arg;
203
204 assert(sc->irq >= 0);
205
206 vm_isa_pulse_irq(lpc_bridge->pi_vmctx, sc->irq, sc->irq);
207 }
208
209 static void
lpc_uart_intr_deassert(void * arg __unused)210 lpc_uart_intr_deassert(void *arg __unused)
211 {
212 /*
213 * The COM devices on the LPC bus generate edge triggered interrupts,
214 * so nothing more to do here.
215 */
216 }
217
218 static int
lpc_uart_io_handler(struct vmctx * ctx __unused,int in,int port,int bytes,uint32_t * eax,void * arg)219 lpc_uart_io_handler(struct vmctx *ctx __unused, int in,
220 int port, int bytes, uint32_t *eax, void *arg)
221 {
222 int offset;
223 struct lpc_uart_softc *sc = arg;
224
225 offset = port - sc->iobase;
226
227 switch (bytes) {
228 case 1:
229 if (in)
230 *eax = uart_ns16550_read(sc->uart_softc, offset);
231 else
232 uart_ns16550_write(sc->uart_softc, offset, *eax);
233 break;
234 case 2:
235 if (in) {
236 *eax = uart_ns16550_read(sc->uart_softc, offset);
237 *eax |=
238 uart_ns16550_read(sc->uart_softc, offset + 1) << 8;
239 } else {
240 uart_ns16550_write(sc->uart_softc, offset, *eax);
241 uart_ns16550_write(sc->uart_softc, offset + 1,
242 *eax >> 8);
243 }
244 break;
245 default:
246 return (-1);
247 }
248
249 return (0);
250 }
251
252 static int
lpc_init(struct vmctx * ctx)253 lpc_init(struct vmctx *ctx)
254 {
255 struct lpc_uart_softc *sc;
256 struct inout_port iop;
257 const char *backend, *name;
258 char *node_name;
259 int unit, error;
260 const nvlist_t *nvl;
261
262 nvl = find_config_node("lpc");
263 if (nvl != NULL && nvlist_exists(nvl, "bootrom")) {
264 error = bootrom_loadrom(ctx, nvl);
265 if (error)
266 return (error);
267 }
268
269 /* COM1 and COM2 */
270 for (unit = 0; unit < LPC_UART_NUM; unit++) {
271 sc = &lpc_uart_softc[unit];
272 name = lpc_uart_names[unit];
273
274 if (uart_legacy_alloc(unit, &sc->iobase, &sc->irq) != 0) {
275 EPRINTLN("Unable to allocate resources for "
276 "LPC device %s", name);
277 return (-1);
278 }
279 pci_irq_reserve(sc->irq);
280
281 sc->uart_softc = uart_ns16550_init(lpc_uart_intr_assert,
282 lpc_uart_intr_deassert, sc);
283
284 asprintf(&node_name, "lpc.%s.path", name);
285 backend = get_config_value(node_name);
286 free(node_name);
287 if (backend != NULL &&
288 uart_ns16550_tty_open(sc->uart_softc, backend) != 0) {
289 EPRINTLN("Unable to initialize backend '%s' "
290 "for LPC device %s", backend, name);
291 return (-1);
292 }
293
294 bzero(&iop, sizeof(struct inout_port));
295 iop.name = name;
296 iop.port = sc->iobase;
297 iop.size = UART_NS16550_IO_BAR_SIZE;
298 iop.flags = IOPORT_F_INOUT;
299 iop.handler = lpc_uart_io_handler;
300 iop.arg = sc;
301
302 error = register_inout(&iop);
303 assert(error == 0);
304 sc->enabled = 1;
305 }
306
307 /* pc-testdev */
308 asprintf(&node_name, "lpc.%s", pctestdev_getname());
309 if (get_config_bool_default(node_name, false)) {
310 error = pctestdev_init(ctx);
311 if (error)
312 return (error);
313 }
314 free(node_name);
315
316 return (0);
317 }
318
319 static void
pci_lpc_write_dsdt(struct pci_devinst * pi)320 pci_lpc_write_dsdt(struct pci_devinst *pi)
321 {
322 struct lpc_dsdt **ldpp, *ldp;
323
324 dsdt_line("");
325 dsdt_line("Device (ISA)");
326 dsdt_line("{");
327 dsdt_line(" Name (_ADR, 0x%04X%04X)", pi->pi_slot, pi->pi_func);
328 dsdt_line(" OperationRegion (LPCR, PCI_Config, 0x00, 0x100)");
329 dsdt_line(" Field (LPCR, AnyAcc, NoLock, Preserve)");
330 dsdt_line(" {");
331 dsdt_line(" Offset (0x60),");
332 dsdt_line(" PIRA, 8,");
333 dsdt_line(" PIRB, 8,");
334 dsdt_line(" PIRC, 8,");
335 dsdt_line(" PIRD, 8,");
336 dsdt_line(" Offset (0x68),");
337 dsdt_line(" PIRE, 8,");
338 dsdt_line(" PIRF, 8,");
339 dsdt_line(" PIRG, 8,");
340 dsdt_line(" PIRH, 8");
341 dsdt_line(" }");
342 dsdt_line("");
343
344 dsdt_indent(1);
345 SET_FOREACH(ldpp, lpc_dsdt_set) {
346 ldp = *ldpp;
347 ldp->handler();
348 }
349
350 dsdt_line("");
351 dsdt_line("Device (PIC)");
352 dsdt_line("{");
353 dsdt_line(" Name (_HID, EisaId (\"PNP0000\"))");
354 dsdt_line(" Name (_CRS, ResourceTemplate ()");
355 dsdt_line(" {");
356 dsdt_indent(2);
357 dsdt_fixed_ioport(IO_ICU1, 2);
358 dsdt_fixed_ioport(IO_ICU2, 2);
359 dsdt_fixed_irq(2);
360 dsdt_unindent(2);
361 dsdt_line(" })");
362 dsdt_line("}");
363
364 dsdt_line("");
365 dsdt_line("Device (TIMR)");
366 dsdt_line("{");
367 dsdt_line(" Name (_HID, EisaId (\"PNP0100\"))");
368 dsdt_line(" Name (_CRS, ResourceTemplate ()");
369 dsdt_line(" {");
370 dsdt_indent(2);
371 dsdt_fixed_ioport(IO_TIMER1_PORT, 4);
372 dsdt_fixed_irq(0);
373 dsdt_unindent(2);
374 dsdt_line(" })");
375 dsdt_line("}");
376 dsdt_unindent(1);
377
378 dsdt_line("}");
379 }
380
381 static void
pci_lpc_sysres_dsdt(void)382 pci_lpc_sysres_dsdt(void)
383 {
384 struct lpc_sysres **lspp, *lsp;
385
386 dsdt_line("");
387 dsdt_line("Device (SIO)");
388 dsdt_line("{");
389 dsdt_line(" Name (_HID, EisaId (\"PNP0C02\"))");
390 dsdt_line(" Name (_CRS, ResourceTemplate ()");
391 dsdt_line(" {");
392
393 dsdt_indent(2);
394 SET_FOREACH(lspp, lpc_sysres_set) {
395 lsp = *lspp;
396 switch (lsp->type) {
397 case LPC_SYSRES_IO:
398 dsdt_fixed_ioport(lsp->base, lsp->length);
399 break;
400 case LPC_SYSRES_MEM:
401 dsdt_fixed_mem32(lsp->base, lsp->length);
402 break;
403 }
404 }
405 dsdt_unindent(2);
406
407 dsdt_line(" })");
408 dsdt_line("}");
409 }
410 LPC_DSDT(pci_lpc_sysres_dsdt);
411
412 static void
pci_lpc_uart_dsdt(void)413 pci_lpc_uart_dsdt(void)
414 {
415 struct lpc_uart_softc *sc;
416 int unit;
417
418 for (unit = 0; unit < LPC_UART_NUM; unit++) {
419 sc = &lpc_uart_softc[unit];
420 if (!sc->enabled)
421 continue;
422 dsdt_line("");
423 dsdt_line("Device (%s)", lpc_uart_acpi_names[unit]);
424 dsdt_line("{");
425 dsdt_line(" Name (_HID, EisaId (\"PNP0501\"))");
426 dsdt_line(" Name (_UID, %d)", unit + 1);
427 dsdt_line(" Name (_CRS, ResourceTemplate ()");
428 dsdt_line(" {");
429 dsdt_indent(2);
430 dsdt_fixed_ioport(sc->iobase, UART_NS16550_IO_BAR_SIZE);
431 dsdt_fixed_irq(sc->irq);
432 dsdt_unindent(2);
433 dsdt_line(" })");
434 dsdt_line("}");
435 }
436 }
437 LPC_DSDT(pci_lpc_uart_dsdt);
438
439 static int
pci_lpc_cfgwrite(struct pci_devinst * pi,int coff,int bytes,uint32_t val)440 pci_lpc_cfgwrite(struct pci_devinst *pi, int coff, int bytes, uint32_t val)
441 {
442 int pirq_pin;
443
444 if (bytes == 1) {
445 pirq_pin = 0;
446 if (coff >= 0x60 && coff <= 0x63)
447 pirq_pin = coff - 0x60 + 1;
448 if (coff >= 0x68 && coff <= 0x6b)
449 pirq_pin = coff - 0x68 + 5;
450 if (pirq_pin != 0) {
451 pirq_write(pi->pi_vmctx, pirq_pin, val);
452 pci_set_cfgdata8(pi, coff, pirq_read(pirq_pin));
453 return (0);
454 }
455 }
456 return (-1);
457 }
458
459 static void
pci_lpc_write(struct pci_devinst * pi __unused,int baridx __unused,uint64_t offset __unused,int size __unused,uint64_t value __unused)460 pci_lpc_write(struct pci_devinst *pi __unused, int baridx __unused,
461 uint64_t offset __unused, int size __unused, uint64_t value __unused)
462 {
463 }
464
465 static uint64_t
pci_lpc_read(struct pci_devinst * pi __unused,int baridx __unused,uint64_t offset __unused,int size __unused)466 pci_lpc_read(struct pci_devinst *pi __unused, int baridx __unused,
467 uint64_t offset __unused, int size __unused)
468 {
469 return (0);
470 }
471
472 #define LPC_DEV 0x7000
473 #define LPC_VENDOR 0x8086
474 #define LPC_REVID 0x00
475 #define LPC_SUBVEND_0 0x0000
476 #define LPC_SUBDEV_0 0x0000
477
478 static int
pci_lpc_get_sel(struct pcisel * const sel)479 pci_lpc_get_sel(struct pcisel *const sel)
480 {
481 assert(sel != NULL);
482
483 memset(sel, 0, sizeof(*sel));
484
485 for (uint8_t slot = 0; slot <= PCI_SLOTMAX; ++slot) {
486 uint8_t max_func = 0;
487
488 sel->pc_dev = slot;
489 sel->pc_func = 0;
490
491 if (pci_host_read_config(sel, PCIR_HDRTYPE, 1) & PCIM_MFDEV)
492 max_func = PCI_FUNCMAX;
493
494 for (uint8_t func = 0; func <= max_func; ++func) {
495 sel->pc_func = func;
496
497 if (pci_host_read_config(sel, PCIR_CLASS, 1) ==
498 PCIC_BRIDGE &&
499 pci_host_read_config(sel, PCIR_SUBCLASS, 1) ==
500 PCIS_BRIDGE_ISA) {
501 return (0);
502 }
503 }
504 }
505
506 warnx("%s: Unable to find host selector of LPC bridge.", __func__);
507
508 return (-1);
509 }
510
511 static int
pci_lpc_init(struct pci_devinst * pi,nvlist_t * nvl)512 pci_lpc_init(struct pci_devinst *pi, nvlist_t *nvl)
513 {
514 struct pcisel sel = { 0 };
515 struct pcisel *selp = NULL;
516 uint16_t device, subdevice, subvendor, vendor;
517 uint8_t revid;
518
519 /*
520 * Do not allow more than one LPC bridge to be configured.
521 */
522 if (lpc_bridge != NULL) {
523 EPRINTLN("Only one LPC bridge is allowed.");
524 return (-1);
525 }
526
527 /*
528 * Enforce that the LPC can only be configured on bus 0. This
529 * simplifies the ACPI DSDT because it can provide a decode for
530 * all legacy i/o ports behind bus 0.
531 */
532 if (pi->pi_bus != 0) {
533 EPRINTLN("LPC bridge can be present only on bus 0.");
534 return (-1);
535 }
536
537 if (lpc_init(pi->pi_vmctx) != 0)
538 return (-1);
539
540 if (pci_lpc_get_sel(&sel) == 0)
541 selp = &sel;
542
543 vendor = pci_config_read_reg(selp, nvl, PCIR_VENDOR, 2, LPC_VENDOR);
544 device = pci_config_read_reg(selp, nvl, PCIR_DEVICE, 2, LPC_DEV);
545 revid = pci_config_read_reg(selp, nvl, PCIR_REVID, 1, LPC_REVID);
546 subvendor = pci_config_read_reg(selp, nvl, PCIR_SUBVEND_0, 2,
547 LPC_SUBVEND_0);
548 subdevice = pci_config_read_reg(selp, nvl, PCIR_SUBDEV_0, 2,
549 LPC_SUBDEV_0);
550
551 /* initialize config space */
552 pci_set_cfgdata16(pi, PCIR_VENDOR, vendor);
553 pci_set_cfgdata16(pi, PCIR_DEVICE, device);
554 pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE);
555 pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_ISA);
556 pci_set_cfgdata8(pi, PCIR_REVID, revid);
557 pci_set_cfgdata16(pi, PCIR_SUBVEND_0, subvendor);
558 pci_set_cfgdata16(pi, PCIR_SUBDEV_0, subdevice);
559
560 lpc_bridge = pi;
561
562 return (0);
563 }
564
565 char *
lpc_pirq_name(int pin)566 lpc_pirq_name(int pin)
567 {
568 char *name;
569
570 if (lpc_bridge == NULL)
571 return (NULL);
572 asprintf(&name, "\\_SB.PC00.ISA.LNK%c,", 'A' + pin - 1);
573 return (name);
574 }
575
576 void
lpc_pirq_routed(void)577 lpc_pirq_routed(void)
578 {
579 int pin;
580
581 if (lpc_bridge == NULL)
582 return;
583
584 for (pin = 0; pin < 4; pin++)
585 pci_set_cfgdata8(lpc_bridge, 0x60 + pin, pirq_read(pin + 1));
586 for (pin = 0; pin < 4; pin++)
587 pci_set_cfgdata8(lpc_bridge, 0x68 + pin, pirq_read(pin + 5));
588 }
589
590 #ifdef BHYVE_SNAPSHOT
591 static int
pci_lpc_snapshot(struct vm_snapshot_meta * meta)592 pci_lpc_snapshot(struct vm_snapshot_meta *meta)
593 {
594 int unit, ret;
595 struct uart_ns16550_softc *sc;
596
597 for (unit = 0; unit < LPC_UART_NUM; unit++) {
598 sc = lpc_uart_softc[unit].uart_softc;
599
600 ret = uart_ns16550_snapshot(sc, meta);
601 if (ret != 0)
602 goto done;
603 }
604
605 done:
606 return (ret);
607 }
608 #endif
609
610 static const struct pci_devemu pci_de_lpc = {
611 .pe_emu = "lpc",
612 .pe_init = pci_lpc_init,
613 .pe_write_dsdt = pci_lpc_write_dsdt,
614 .pe_cfgwrite = pci_lpc_cfgwrite,
615 .pe_barwrite = pci_lpc_write,
616 .pe_barread = pci_lpc_read,
617 #ifdef BHYVE_SNAPSHOT
618 .pe_snapshot = pci_lpc_snapshot,
619 #endif
620 };
621 PCI_EMUL_SET(pci_de_lpc);
622