1 //===-- ArchSpec.h ----------------------------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef liblldb_ArchSpec_h_ 11 #define liblldb_ArchSpec_h_ 12 13 #if defined(__cplusplus) 14 15 #include "lldb/lldb-forward.h" 16 #include "lldb/Core/ConstString.h" 17 #include "llvm/ADT/Triple.h" 18 19 namespace lldb_private { 20 21 struct CoreDefinition; 22 23 //---------------------------------------------------------------------- 24 /// @class ArchSpec ArchSpec.h "lldb/Core/ArchSpec.h" 25 /// @brief An architecture specification class. 26 /// 27 /// A class designed to be created from a cpu type and subtype, a 28 /// string representation, or an llvm::Triple. Keeping all of the 29 /// conversions of strings to architecture enumeration values confined 30 /// to this class allows new architecture support to be added easily. 31 //---------------------------------------------------------------------- 32 class ArchSpec 33 { 34 public: 35 enum MIPSSubType 36 { 37 eMIPSSubType_unknown, 38 eMIPSSubType_mips32, 39 eMIPSSubType_mips32r2, 40 eMIPSSubType_mips32r6, 41 eMIPSSubType_mips32el, 42 eMIPSSubType_mips32r2el, 43 eMIPSSubType_mips32r6el, 44 eMIPSSubType_mips64, 45 eMIPSSubType_mips64r2, 46 eMIPSSubType_mips64r6, 47 eMIPSSubType_mips64el, 48 eMIPSSubType_mips64r2el, 49 eMIPSSubType_mips64r6el, 50 }; 51 52 // Masks for the ases word of an ABI flags structure. 53 enum MIPSASE 54 { 55 eMIPSAse_dsp = 0x00000001, // DSP ASE 56 eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE 57 eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme 58 eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE 59 eMIPSAse_mdmx = 0x00000010, // MDMX ASE 60 eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE 61 eMIPSAse_mt = 0x00000040, // MT ASE 62 eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE 63 eMIPSAse_virt = 0x00000100, // VZ ASE 64 eMIPSAse_msa = 0x00000200, // MSA ASE 65 eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE 66 eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE 67 eMIPSAse_xpa = 0x00001000, // XPA ASE 68 eMIPSAse_mask = 0x00001fff 69 }; 70 71 enum Core 72 { 73 eCore_arm_generic, 74 eCore_arm_armv4, 75 eCore_arm_armv4t, 76 eCore_arm_armv5, 77 eCore_arm_armv5e, 78 eCore_arm_armv5t, 79 eCore_arm_armv6, 80 eCore_arm_armv6m, 81 eCore_arm_armv7, 82 eCore_arm_armv7f, 83 eCore_arm_armv7s, 84 eCore_arm_armv7k, 85 eCore_arm_armv7m, 86 eCore_arm_armv7em, 87 eCore_arm_xscale, 88 89 eCore_thumb, 90 eCore_thumbv4t, 91 eCore_thumbv5, 92 eCore_thumbv5e, 93 eCore_thumbv6, 94 eCore_thumbv6m, 95 eCore_thumbv7, 96 eCore_thumbv7s, 97 eCore_thumbv7k, 98 eCore_thumbv7f, 99 eCore_thumbv7m, 100 eCore_thumbv7em, 101 eCore_arm_arm64, 102 eCore_arm_armv8, 103 eCore_arm_aarch64, 104 105 eCore_mips32, 106 eCore_mips32r2, 107 eCore_mips32r3, 108 eCore_mips32r5, 109 eCore_mips32r6, 110 eCore_mips32el, 111 eCore_mips32r2el, 112 eCore_mips32r3el, 113 eCore_mips32r5el, 114 eCore_mips32r6el, 115 eCore_mips64, 116 eCore_mips64r2, 117 eCore_mips64r3, 118 eCore_mips64r5, 119 eCore_mips64r6, 120 eCore_mips64el, 121 eCore_mips64r2el, 122 eCore_mips64r3el, 123 eCore_mips64r5el, 124 eCore_mips64r6el, 125 126 eCore_ppc_generic, 127 eCore_ppc_ppc601, 128 eCore_ppc_ppc602, 129 eCore_ppc_ppc603, 130 eCore_ppc_ppc603e, 131 eCore_ppc_ppc603ev, 132 eCore_ppc_ppc604, 133 eCore_ppc_ppc604e, 134 eCore_ppc_ppc620, 135 eCore_ppc_ppc750, 136 eCore_ppc_ppc7400, 137 eCore_ppc_ppc7450, 138 eCore_ppc_ppc970, 139 140 eCore_ppc64_generic, 141 eCore_ppc64_ppc970_64, 142 143 eCore_sparc_generic, 144 145 eCore_sparc9_generic, 146 147 eCore_x86_32_i386, 148 eCore_x86_32_i486, 149 eCore_x86_32_i486sx, 150 eCore_x86_32_i686, 151 152 eCore_x86_64_x86_64, 153 eCore_x86_64_x86_64h, // Haswell enabled x86_64 154 eCore_hexagon_generic, 155 eCore_hexagon_hexagonv4, 156 eCore_hexagon_hexagonv5, 157 158 eCore_uknownMach32, 159 eCore_uknownMach64, 160 161 eCore_kalimba3, 162 eCore_kalimba4, 163 eCore_kalimba5, 164 165 kNumCores, 166 167 kCore_invalid, 168 // The following constants are used for wildcard matching only 169 kCore_any, 170 kCore_arm_any, 171 kCore_ppc_any, 172 kCore_ppc64_any, 173 kCore_x86_32_any, 174 kCore_x86_64_any, 175 kCore_hexagon_any, 176 177 kCore_arm_first = eCore_arm_generic, 178 kCore_arm_last = eCore_arm_xscale, 179 180 kCore_thumb_first = eCore_thumb, 181 kCore_thumb_last = eCore_thumbv7em, 182 183 kCore_ppc_first = eCore_ppc_generic, 184 kCore_ppc_last = eCore_ppc_ppc970, 185 186 kCore_ppc64_first = eCore_ppc64_generic, 187 kCore_ppc64_last = eCore_ppc64_ppc970_64, 188 189 kCore_x86_32_first = eCore_x86_32_i386, 190 kCore_x86_32_last = eCore_x86_32_i686, 191 192 kCore_x86_64_first = eCore_x86_64_x86_64, 193 kCore_x86_64_last = eCore_x86_64_x86_64h, 194 195 kCore_hexagon_first = eCore_hexagon_generic, 196 kCore_hexagon_last = eCore_hexagon_hexagonv5, 197 198 kCore_kalimba_first = eCore_kalimba3, 199 kCore_kalimba_last = eCore_kalimba5, 200 201 kCore_mips32_first = eCore_mips32, 202 kCore_mips32_last = eCore_mips32r6, 203 204 kCore_mips32el_first = eCore_mips32el, 205 kCore_mips32el_last = eCore_mips32r6el, 206 207 kCore_mips64_first = eCore_mips64, 208 kCore_mips64_last = eCore_mips64r6, 209 210 kCore_mips64el_first = eCore_mips64el, 211 kCore_mips64el_last = eCore_mips64r6el 212 }; 213 214 typedef void (* StopInfoOverrideCallbackType)(lldb_private::Thread &thread); 215 216 //------------------------------------------------------------------ 217 /// Default constructor. 218 /// 219 /// Default constructor that initializes the object with invalid 220 /// cpu type and subtype values. 221 //------------------------------------------------------------------ 222 ArchSpec (); 223 224 //------------------------------------------------------------------ 225 /// Constructor over triple. 226 /// 227 /// Constructs an ArchSpec with properties consistent with the given 228 /// Triple. 229 //------------------------------------------------------------------ 230 explicit 231 ArchSpec (const llvm::Triple &triple); 232 explicit 233 ArchSpec (const char *triple_cstr); 234 explicit 235 ArchSpec (const char *triple_cstr, Platform *platform); 236 //------------------------------------------------------------------ 237 /// Constructor over architecture name. 238 /// 239 /// Constructs an ArchSpec with properties consistent with the given 240 /// object type and architecture name. 241 //------------------------------------------------------------------ 242 explicit 243 ArchSpec (ArchitectureType arch_type, 244 uint32_t cpu_type, 245 uint32_t cpu_subtype); 246 247 //------------------------------------------------------------------ 248 /// Destructor. 249 //------------------------------------------------------------------ 250 ~ArchSpec (); 251 252 //------------------------------------------------------------------ 253 /// Assignment operator. 254 /// 255 /// @param[in] rhs another ArchSpec object to copy. 256 /// 257 /// @return A const reference to this object. 258 //------------------------------------------------------------------ 259 const ArchSpec& 260 operator= (const ArchSpec& rhs); 261 262 static size_t 263 AutoComplete (const char *name, 264 StringList &matches); 265 266 //------------------------------------------------------------------ 267 /// Returns a static string representing the current architecture. 268 /// 269 /// @return A static string correcponding to the current 270 /// architecture. 271 //------------------------------------------------------------------ 272 const char * 273 GetArchitectureName () const; 274 275 //------------------------------------------------------------------ 276 /// Clears the object state. 277 /// 278 /// Clears the object state back to a default invalid state. 279 //------------------------------------------------------------------ 280 void 281 Clear (); 282 283 //------------------------------------------------------------------ 284 /// Returns the size in bytes of an address of the current 285 /// architecture. 286 /// 287 /// @return The byte size of an address of the current architecture. 288 //------------------------------------------------------------------ 289 uint32_t 290 GetAddressByteSize () const; 291 292 //------------------------------------------------------------------ 293 /// Returns a machine family for the current architecture. 294 /// 295 /// @return An LLVM arch type. 296 //------------------------------------------------------------------ 297 llvm::Triple::ArchType 298 GetMachine () const; 299 300 //------------------------------------------------------------------ 301 /// Returns the distribution id of the architecture. 302 /// 303 /// This will be something like "ubuntu", "fedora", etc. on Linux. 304 /// 305 /// @return A ConstString ref containing the distribution id, 306 /// potentially empty. 307 //------------------------------------------------------------------ 308 const ConstString& 309 GetDistributionId () const; 310 311 //------------------------------------------------------------------ 312 /// Set the distribution id of the architecture. 313 /// 314 /// This will be something like "ubuntu", "fedora", etc. on Linux. 315 /// This should be the same value returned by 316 /// HostInfo::GetDistributionId (). 317 ///------------------------------------------------------------------ 318 void 319 SetDistributionId (const char* distribution_id); 320 321 //------------------------------------------------------------------ 322 /// Tests if this ArchSpec is valid. 323 /// 324 /// @return True if the current architecture is valid, false 325 /// otherwise. 326 //------------------------------------------------------------------ 327 bool IsValid()328 IsValid () const 329 { 330 return m_core >= eCore_arm_generic && m_core < kNumCores; 331 } 332 333 bool TripleVendorWasSpecified()334 TripleVendorWasSpecified() const 335 { 336 return !m_triple.getVendorName().empty(); 337 } 338 339 bool TripleOSWasSpecified()340 TripleOSWasSpecified() const 341 { 342 return !m_triple.getOSName().empty(); 343 } 344 345 //------------------------------------------------------------------ 346 /// Merges fields from another ArchSpec into this ArchSpec. 347 /// 348 /// This will use the supplied ArchSpec to fill in any fields of 349 /// the triple in this ArchSpec which were unspecified. This can 350 /// be used to refine a generic ArchSpec with a more specific one. 351 /// For example, if this ArchSpec's triple is something like 352 /// i386-unknown-unknown-unknown, and we have a triple which is 353 /// x64-pc-windows-msvc, then merging that triple into this one 354 /// will result in the triple i386-pc-windows-msvc. 355 /// 356 //------------------------------------------------------------------ 357 void 358 MergeFrom(const ArchSpec &other); 359 360 //------------------------------------------------------------------ 361 /// Change the architecture object type, CPU type and OS type. 362 /// 363 /// @param[in] arch_type The object type of this ArchSpec. 364 /// 365 /// @param[in] cpu The required CPU type. 366 /// 367 /// @param[in] os The optional OS type 368 /// The default value of 0 was choosen to from the ELF spec value 369 /// ELFOSABI_NONE. ELF is the only one using this parameter. If another 370 /// format uses this parameter and 0 does not work, use a value over 371 /// 255 because in the ELF header this is value is only a byte. 372 /// 373 /// @return True if the object, and CPU were successfully set. 374 /// 375 /// As a side effect, the vendor value is usually set to unknown. 376 /// The exections are 377 /// aarch64-apple-ios 378 /// arm-apple-ios 379 /// thumb-apple-ios 380 /// x86-apple- 381 /// x86_64-apple- 382 /// 383 /// As a side effect, the os value is usually set to unknown 384 /// The exceptions are 385 /// *-*-aix 386 /// aarch64-apple-ios 387 /// arm-apple-ios 388 /// thumb-apple-ios 389 /// powerpc-apple-darwin 390 /// *-*-freebsd 391 /// *-*-linux 392 /// *-*-netbsd 393 /// *-*-openbsd 394 /// *-*-solaris 395 //------------------------------------------------------------------ 396 bool 397 SetArchitecture (ArchitectureType arch_type, 398 uint32_t cpu, 399 uint32_t sub, 400 uint32_t os = 0); 401 402 //------------------------------------------------------------------ 403 /// Returns the byte order for the architecture specification. 404 /// 405 /// @return The endian enumeration for the current endianness of 406 /// the architecture specification 407 //------------------------------------------------------------------ 408 lldb::ByteOrder 409 GetByteOrder () const; 410 411 //------------------------------------------------------------------ 412 /// Sets this ArchSpec's byte order. 413 /// 414 /// In the common case there is no need to call this method as the 415 /// byte order can almost always be determined by the architecture. 416 /// However, many CPU's are bi-endian (ARM, Alpha, PowerPC, etc) 417 /// and the default/assumed byte order may be incorrect. 418 //------------------------------------------------------------------ 419 void SetByteOrder(lldb::ByteOrder byte_order)420 SetByteOrder (lldb::ByteOrder byte_order) 421 { 422 m_byte_order = byte_order; 423 } 424 425 uint32_t 426 GetMinimumOpcodeByteSize() const; 427 428 uint32_t 429 GetMaximumOpcodeByteSize() const; 430 431 Core GetCore()432 GetCore () const 433 { 434 return m_core; 435 } 436 437 uint32_t 438 GetMachOCPUType () const; 439 440 uint32_t 441 GetMachOCPUSubType () const; 442 443 //------------------------------------------------------------------ 444 /// Architecture data byte width accessor 445 /// 446 /// @return the size in 8-bit (host) bytes of a minimum addressable 447 /// unit from the Architecture's data bus 448 //------------------------------------------------------------------ 449 uint32_t 450 GetDataByteSize() const; 451 452 //------------------------------------------------------------------ 453 /// Architecture code byte width accessor 454 /// 455 /// @return the size in 8-bit (host) bytes of a minimum addressable 456 /// unit from the Architecture's code bus 457 //------------------------------------------------------------------ 458 uint32_t 459 GetCodeByteSize() const; 460 461 //------------------------------------------------------------------ 462 /// Architecture tripple accessor. 463 /// 464 /// @return A triple describing this ArchSpec. 465 //------------------------------------------------------------------ 466 llvm::Triple & GetTriple()467 GetTriple () 468 { 469 return m_triple; 470 } 471 472 //------------------------------------------------------------------ 473 /// Architecture tripple accessor. 474 /// 475 /// @return A triple describing this ArchSpec. 476 //------------------------------------------------------------------ 477 const llvm::Triple & GetTriple()478 GetTriple () const 479 { 480 return m_triple; 481 } 482 483 //------------------------------------------------------------------ 484 /// Architecture tripple setter. 485 /// 486 /// Configures this ArchSpec according to the given triple. If the 487 /// triple has unknown components in all of the vendor, OS, and 488 /// the optional environment field (i.e. "i386-unknown-unknown") 489 /// then default values are taken from the host. Architecture and 490 /// environment components are used to further resolve the CPU type 491 /// and subtype, endian characteristics, etc. 492 /// 493 /// @return A triple describing this ArchSpec. 494 //------------------------------------------------------------------ 495 bool 496 SetTriple (const llvm::Triple &triple); 497 498 bool 499 SetTriple (const char *triple_cstr); 500 501 bool 502 SetTriple (const char *triple_cstr, 503 Platform *platform); 504 505 //------------------------------------------------------------------ 506 /// Returns the default endianness of the architecture. 507 /// 508 /// @return The endian enumeration for the default endianness of 509 /// the architecture. 510 //------------------------------------------------------------------ 511 lldb::ByteOrder 512 GetDefaultEndian () const; 513 514 //------------------------------------------------------------------ 515 /// Returns true if 'char' is a signed type by defualt in the 516 /// architecture false otherwise 517 /// 518 /// @return True if 'char' is a signed type by default on the 519 /// architecture and false otherwise. 520 //------------------------------------------------------------------ 521 bool 522 CharIsSignedByDefault () const; 523 524 //------------------------------------------------------------------ 525 /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu 526 /// type match between them. 527 /// e.g. armv7s is not an exact match with armv7 - this would return false 528 /// 529 /// @return true if the two ArchSpecs match. 530 //------------------------------------------------------------------ 531 bool 532 IsExactMatch (const ArchSpec& rhs) const; 533 534 //------------------------------------------------------------------ 535 /// Compare an ArchSpec to another ArchSpec, requiring a compatible 536 /// cpu type match between them. 537 /// e.g. armv7s is compatible with armv7 - this method would return true 538 /// 539 /// @return true if the two ArchSpecs are compatible 540 //------------------------------------------------------------------ 541 bool 542 IsCompatibleMatch (const ArchSpec& rhs) const; 543 544 //------------------------------------------------------------------ 545 /// Get a stop info override callback for the current architecture. 546 /// 547 /// Most platform specific code should go in lldb_private::Platform, 548 /// but there are cases where no matter which platform you are on 549 /// certain things hold true. 550 /// 551 /// This callback is currently intended to handle cases where a 552 /// program stops at an instruction that won't get executed and it 553 /// allows the stop reasonm, like "breakpoint hit", to be replaced 554 /// with a different stop reason like "no stop reason". 555 /// 556 /// This is specifically used for ARM in Thumb code when we stop in 557 /// an IT instruction (if/then/else) where the instruction won't get 558 /// executed and therefore it wouldn't be correct to show the program 559 /// stopped at the current PC. The code is generic and applies to all 560 /// ARM CPUs. 561 /// 562 /// @return NULL or a valid stop info override callback for the 563 /// current architecture. 564 //------------------------------------------------------------------ 565 StopInfoOverrideCallbackType 566 GetStopInfoOverrideCallback () const; 567 568 uint32_t GetFlags()569 GetFlags () const 570 { 571 return m_flags; 572 } 573 574 void SetFlags(uint32_t flags)575 SetFlags (uint32_t flags) 576 { 577 m_flags = flags; 578 } 579 580 protected: 581 bool 582 IsEqualTo (const ArchSpec& rhs, bool exact_match) const; 583 584 llvm::Triple m_triple; 585 Core m_core; 586 lldb::ByteOrder m_byte_order; 587 588 // Additional arch flags which we cannot get from triple and core 589 // For MIPS these are application specific extensions like 590 // micromips, mips16 etc. 591 uint32_t m_flags; 592 593 ConstString m_distribution_id; 594 595 // Called when m_def or m_entry are changed. Fills in all remaining 596 // members with default values. 597 void 598 CoreUpdated (bool update_triple); 599 }; 600 601 //------------------------------------------------------------------ 602 /// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs) 603 /// @brief Less than operator. 604 /// 605 /// Tests two ArchSpec objects to see if \a lhs is less than \a 606 /// rhs. 607 /// 608 /// @param[in] lhs The Left Hand Side ArchSpec object to compare. 609 /// @param[in] rhs The Left Hand Side ArchSpec object to compare. 610 /// 611 /// @return true if \a lhs is less than \a rhs 612 //------------------------------------------------------------------ 613 bool operator< (const ArchSpec& lhs, const ArchSpec& rhs); 614 615 } // namespace lldb_private 616 617 #endif // #if defined(__cplusplus) 618 #endif // #ifndef liblldb_ArchSpec_h_ 619