1 /******************************************************************************
2
3 Copyright (c) 2013-2018, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33
34 #include "ixl.h"
35 #include "ixl_pf.h"
36
37 #ifdef IXL_IW
38 #include "ixl_iw.h"
39 #include "ixl_iw_int.h"
40 #endif
41
42 #ifdef PCI_IOV
43 #include "ixl_pf_iov.h"
44 #endif
45
46 /*********************************************************************
47 * Driver version
48 *********************************************************************/
49 #define IXL_DRIVER_VERSION_MAJOR 2
50 #define IXL_DRIVER_VERSION_MINOR 3
51 #define IXL_DRIVER_VERSION_BUILD 3
52
53 #define IXL_DRIVER_VERSION_STRING \
54 __XSTRING(IXL_DRIVER_VERSION_MAJOR) "." \
55 __XSTRING(IXL_DRIVER_VERSION_MINOR) "." \
56 __XSTRING(IXL_DRIVER_VERSION_BUILD) "-k"
57
58 /*********************************************************************
59 * PCI Device ID Table
60 *
61 * Used by probe to select devices to load on
62 *
63 * ( Vendor ID, Device ID, Branding String )
64 *********************************************************************/
65
66 static const pci_vendor_info_t ixl_vendor_info_array[] =
67 {
68 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_XL710, "Intel(R) Ethernet Controller X710 for 10GbE SFP+"),
69 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_B, "Intel(R) Ethernet Controller XL710 for 40GbE backplane"),
70 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_C, "Intel(R) Ethernet Controller X710 for 10GbE backplane"),
71 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_A, "Intel(R) Ethernet Controller XL710 for 40GbE QSFP+"),
72 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B, "Intel(R) Ethernet Controller XL710 for 40GbE QSFP+"),
73 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C, "Intel(R) Ethernet Controller X710 for 10GbE QSFP+"),
74 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T, "Intel(R) Ethernet Controller X710 for 10GBASE-T"),
75 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4, "Intel(R) Ethernet Controller X710/X557-AT 10GBASE-T"),
76 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722, "Intel(R) Ethernet Connection X722 for 10GbE backplane"),
77 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722, "Intel(R) Ethernet Connection X722 for 10GbE QSFP+"),
78 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722, "Intel(R) Ethernet Connection X722 for 10GbE SFP+"),
79 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722, "Intel(R) Ethernet Connection X722 for 1GbE"),
80 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722, "Intel(R) Ethernet Connection X722 for 10GBASE-T"),
81 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722, "Intel(R) Ethernet Connection X722 for 10GbE SFP+"),
82 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B, "Intel(R) Ethernet Controller XXV710 for 25GbE backplane"),
83 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28, "Intel(R) Ethernet Controller XXV710 for 25GbE SFP28"),
84 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_BC, "Intel(R) Ethernet Controller X710 for 10GBASE-T"),
85 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_SFP, "Intel(R) Ethernet Controller X710 for 10GbE SFP+"),
86 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_B, "Intel(R) Ethernet Controller X710 for 10GbE backplane"),
87 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_5G_BASE_T_BC, "Intel(R) Ethernet Controller V710 for 5GBASE-T"),
88 PVIDV(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_BC, "Intel(R) Ethernet Controller I710 for 1GBASE-T"),
89 /* required last entry */
90 PVID_END
91 };
92
93 /*********************************************************************
94 * Function prototypes
95 *********************************************************************/
96 /*** IFLIB interface ***/
97 static void *ixl_register(device_t dev);
98 static int ixl_if_attach_pre(if_ctx_t ctx);
99 static int ixl_if_attach_post(if_ctx_t ctx);
100 static int ixl_if_detach(if_ctx_t ctx);
101 static int ixl_if_shutdown(if_ctx_t ctx);
102 static int ixl_if_suspend(if_ctx_t ctx);
103 static int ixl_if_resume(if_ctx_t ctx);
104 static int ixl_if_msix_intr_assign(if_ctx_t ctx, int msix);
105 static void ixl_if_enable_intr(if_ctx_t ctx);
106 static void ixl_if_disable_intr(if_ctx_t ctx);
107 static int ixl_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid);
108 static int ixl_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid);
109 static int ixl_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, int ntxqsets);
110 static int ixl_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nqs, int nqsets);
111 static void ixl_if_queues_free(if_ctx_t ctx);
112 static void ixl_if_update_admin_status(if_ctx_t ctx);
113 static void ixl_if_multi_set(if_ctx_t ctx);
114 static int ixl_if_mtu_set(if_ctx_t ctx, uint32_t mtu);
115 static void ixl_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr);
116 static int ixl_if_media_change(if_ctx_t ctx);
117 static int ixl_if_promisc_set(if_ctx_t ctx, int flags);
118 static void ixl_if_timer(if_ctx_t ctx, uint16_t qid);
119 static void ixl_if_vlan_register(if_ctx_t ctx, u16 vtag);
120 static void ixl_if_vlan_unregister(if_ctx_t ctx, u16 vtag);
121 static uint64_t ixl_if_get_counter(if_ctx_t ctx, ift_counter cnt);
122 static int ixl_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req);
123 static int ixl_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data);
124 static bool ixl_if_needs_restart(if_ctx_t ctx, enum iflib_restart_event event);
125 #ifdef PCI_IOV
126 static void ixl_if_vflr_handle(if_ctx_t ctx);
127 #endif
128
129 /*** Other ***/
130 static void ixl_save_pf_tunables(struct ixl_pf *);
131 static int ixl_allocate_pci_resources(struct ixl_pf *);
132 static void ixl_setup_ssctx(struct ixl_pf *pf);
133 static void ixl_admin_timer(void *arg);
134
135 /*********************************************************************
136 * FreeBSD Device Interface Entry Points
137 *********************************************************************/
138
139 static device_method_t ixl_methods[] = {
140 /* Device interface */
141 DEVMETHOD(device_register, ixl_register),
142 DEVMETHOD(device_probe, iflib_device_probe),
143 DEVMETHOD(device_attach, iflib_device_attach),
144 DEVMETHOD(device_detach, iflib_device_detach),
145 DEVMETHOD(device_shutdown, iflib_device_shutdown),
146 #ifdef PCI_IOV
147 DEVMETHOD(pci_iov_init, iflib_device_iov_init),
148 DEVMETHOD(pci_iov_uninit, iflib_device_iov_uninit),
149 DEVMETHOD(pci_iov_add_vf, iflib_device_iov_add_vf),
150 #endif
151 DEVMETHOD_END
152 };
153
154 static driver_t ixl_driver = {
155 "ixl", ixl_methods, sizeof(struct ixl_pf),
156 };
157
158 devclass_t ixl_devclass;
159 DRIVER_MODULE(ixl, pci, ixl_driver, ixl_devclass, 0, 0);
160 IFLIB_PNP_INFO(pci, ixl, ixl_vendor_info_array);
161 MODULE_VERSION(ixl, 3);
162
163 MODULE_DEPEND(ixl, pci, 1, 1, 1);
164 MODULE_DEPEND(ixl, ether, 1, 1, 1);
165 MODULE_DEPEND(ixl, iflib, 1, 1, 1);
166
167 static device_method_t ixl_if_methods[] = {
168 DEVMETHOD(ifdi_attach_pre, ixl_if_attach_pre),
169 DEVMETHOD(ifdi_attach_post, ixl_if_attach_post),
170 DEVMETHOD(ifdi_detach, ixl_if_detach),
171 DEVMETHOD(ifdi_shutdown, ixl_if_shutdown),
172 DEVMETHOD(ifdi_suspend, ixl_if_suspend),
173 DEVMETHOD(ifdi_resume, ixl_if_resume),
174 DEVMETHOD(ifdi_init, ixl_if_init),
175 DEVMETHOD(ifdi_stop, ixl_if_stop),
176 DEVMETHOD(ifdi_msix_intr_assign, ixl_if_msix_intr_assign),
177 DEVMETHOD(ifdi_intr_enable, ixl_if_enable_intr),
178 DEVMETHOD(ifdi_intr_disable, ixl_if_disable_intr),
179 DEVMETHOD(ifdi_rx_queue_intr_enable, ixl_if_rx_queue_intr_enable),
180 DEVMETHOD(ifdi_tx_queue_intr_enable, ixl_if_tx_queue_intr_enable),
181 DEVMETHOD(ifdi_tx_queues_alloc, ixl_if_tx_queues_alloc),
182 DEVMETHOD(ifdi_rx_queues_alloc, ixl_if_rx_queues_alloc),
183 DEVMETHOD(ifdi_queues_free, ixl_if_queues_free),
184 DEVMETHOD(ifdi_update_admin_status, ixl_if_update_admin_status),
185 DEVMETHOD(ifdi_multi_set, ixl_if_multi_set),
186 DEVMETHOD(ifdi_mtu_set, ixl_if_mtu_set),
187 DEVMETHOD(ifdi_media_status, ixl_if_media_status),
188 DEVMETHOD(ifdi_media_change, ixl_if_media_change),
189 DEVMETHOD(ifdi_promisc_set, ixl_if_promisc_set),
190 DEVMETHOD(ifdi_timer, ixl_if_timer),
191 DEVMETHOD(ifdi_vlan_register, ixl_if_vlan_register),
192 DEVMETHOD(ifdi_vlan_unregister, ixl_if_vlan_unregister),
193 DEVMETHOD(ifdi_get_counter, ixl_if_get_counter),
194 DEVMETHOD(ifdi_i2c_req, ixl_if_i2c_req),
195 DEVMETHOD(ifdi_priv_ioctl, ixl_if_priv_ioctl),
196 DEVMETHOD(ifdi_needs_restart, ixl_if_needs_restart),
197 #ifdef PCI_IOV
198 DEVMETHOD(ifdi_iov_init, ixl_if_iov_init),
199 DEVMETHOD(ifdi_iov_uninit, ixl_if_iov_uninit),
200 DEVMETHOD(ifdi_iov_vf_add, ixl_if_iov_vf_add),
201 DEVMETHOD(ifdi_vflr_handle, ixl_if_vflr_handle),
202 #endif
203 // ifdi_led_func
204 // ifdi_debug
205 DEVMETHOD_END
206 };
207
208 static driver_t ixl_if_driver = {
209 "ixl_if", ixl_if_methods, sizeof(struct ixl_pf)
210 };
211
212 /*
213 ** TUNEABLE PARAMETERS:
214 */
215
216 static SYSCTL_NODE(_hw, OID_AUTO, ixl, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
217 "ixl driver parameters");
218
219 #ifdef IXL_DEBUG_FC
220 /*
221 * Leave this on unless you need to send flow control
222 * frames (or other control frames) from software
223 */
224 static int ixl_enable_tx_fc_filter = 1;
225 TUNABLE_INT("hw.ixl.enable_tx_fc_filter",
226 &ixl_enable_tx_fc_filter);
227 SYSCTL_INT(_hw_ixl, OID_AUTO, enable_tx_fc_filter, CTLFLAG_RDTUN,
228 &ixl_enable_tx_fc_filter, 0,
229 "Filter out packets with Ethertype 0x8808 from being sent out by non-HW sources");
230 #endif
231
232 #ifdef IXL_DEBUG
233 static int ixl_debug_recovery_mode = 0;
234 TUNABLE_INT("hw.ixl.debug_recovery_mode",
235 &ixl_debug_recovery_mode);
236 SYSCTL_INT(_hw_ixl, OID_AUTO, debug_recovery_mode, CTLFLAG_RDTUN,
237 &ixl_debug_recovery_mode, 0,
238 "Act like when FW entered recovery mode (for debugging)");
239 #endif
240
241 static int ixl_i2c_access_method = 0;
242 TUNABLE_INT("hw.ixl.i2c_access_method",
243 &ixl_i2c_access_method);
244 SYSCTL_INT(_hw_ixl, OID_AUTO, i2c_access_method, CTLFLAG_RDTUN,
245 &ixl_i2c_access_method, 0,
246 IXL_SYSCTL_HELP_I2C_METHOD);
247
248 static int ixl_enable_vf_loopback = 1;
249 TUNABLE_INT("hw.ixl.enable_vf_loopback",
250 &ixl_enable_vf_loopback);
251 SYSCTL_INT(_hw_ixl, OID_AUTO, enable_vf_loopback, CTLFLAG_RDTUN,
252 &ixl_enable_vf_loopback, 0,
253 IXL_SYSCTL_HELP_VF_LOOPBACK);
254
255 /*
256 * Different method for processing TX descriptor
257 * completion.
258 */
259 static int ixl_enable_head_writeback = 1;
260 TUNABLE_INT("hw.ixl.enable_head_writeback",
261 &ixl_enable_head_writeback);
262 SYSCTL_INT(_hw_ixl, OID_AUTO, enable_head_writeback, CTLFLAG_RDTUN,
263 &ixl_enable_head_writeback, 0,
264 "For detecting last completed TX descriptor by hardware, use value written by HW instead of checking descriptors");
265
266 static int ixl_core_debug_mask = 0;
267 TUNABLE_INT("hw.ixl.core_debug_mask",
268 &ixl_core_debug_mask);
269 SYSCTL_INT(_hw_ixl, OID_AUTO, core_debug_mask, CTLFLAG_RDTUN,
270 &ixl_core_debug_mask, 0,
271 "Display debug statements that are printed in non-shared code");
272
273 static int ixl_shared_debug_mask = 0;
274 TUNABLE_INT("hw.ixl.shared_debug_mask",
275 &ixl_shared_debug_mask);
276 SYSCTL_INT(_hw_ixl, OID_AUTO, shared_debug_mask, CTLFLAG_RDTUN,
277 &ixl_shared_debug_mask, 0,
278 "Display debug statements that are printed in shared code");
279
280 #if 0
281 /*
282 ** Controls for Interrupt Throttling
283 ** - true/false for dynamic adjustment
284 ** - default values for static ITR
285 */
286 static int ixl_dynamic_rx_itr = 0;
287 TUNABLE_INT("hw.ixl.dynamic_rx_itr", &ixl_dynamic_rx_itr);
288 SYSCTL_INT(_hw_ixl, OID_AUTO, dynamic_rx_itr, CTLFLAG_RDTUN,
289 &ixl_dynamic_rx_itr, 0, "Dynamic RX Interrupt Rate");
290
291 static int ixl_dynamic_tx_itr = 0;
292 TUNABLE_INT("hw.ixl.dynamic_tx_itr", &ixl_dynamic_tx_itr);
293 SYSCTL_INT(_hw_ixl, OID_AUTO, dynamic_tx_itr, CTLFLAG_RDTUN,
294 &ixl_dynamic_tx_itr, 0, "Dynamic TX Interrupt Rate");
295 #endif
296
297 static int ixl_rx_itr = IXL_ITR_8K;
298 TUNABLE_INT("hw.ixl.rx_itr", &ixl_rx_itr);
299 SYSCTL_INT(_hw_ixl, OID_AUTO, rx_itr, CTLFLAG_RDTUN,
300 &ixl_rx_itr, 0, "RX Interrupt Rate");
301
302 static int ixl_tx_itr = IXL_ITR_4K;
303 TUNABLE_INT("hw.ixl.tx_itr", &ixl_tx_itr);
304 SYSCTL_INT(_hw_ixl, OID_AUTO, tx_itr, CTLFLAG_RDTUN,
305 &ixl_tx_itr, 0, "TX Interrupt Rate");
306
307 static int ixl_flow_control = -1;
308 SYSCTL_INT(_hw_ixl, OID_AUTO, flow_control, CTLFLAG_RDTUN,
309 &ixl_flow_control, 0, "Initial Flow Control setting");
310
311 #ifdef IXL_IW
312 int ixl_enable_iwarp = 0;
313 TUNABLE_INT("hw.ixl.enable_iwarp", &ixl_enable_iwarp);
314 SYSCTL_INT(_hw_ixl, OID_AUTO, enable_iwarp, CTLFLAG_RDTUN,
315 &ixl_enable_iwarp, 0, "iWARP enabled");
316
317 #if __FreeBSD_version < 1100000
318 int ixl_limit_iwarp_msix = 1;
319 #else
320 int ixl_limit_iwarp_msix = IXL_IW_MAX_MSIX;
321 #endif
322 TUNABLE_INT("hw.ixl.limit_iwarp_msix", &ixl_limit_iwarp_msix);
323 SYSCTL_INT(_hw_ixl, OID_AUTO, limit_iwarp_msix, CTLFLAG_RDTUN,
324 &ixl_limit_iwarp_msix, 0, "Limit MSI-X vectors assigned to iWARP");
325 #endif
326
327 extern struct if_txrx ixl_txrx_hwb;
328 extern struct if_txrx ixl_txrx_dwb;
329
330 static struct if_shared_ctx ixl_sctx_init = {
331 .isc_magic = IFLIB_MAGIC,
332 .isc_q_align = PAGE_SIZE,
333 .isc_tx_maxsize = IXL_TSO_SIZE + sizeof(struct ether_vlan_header),
334 .isc_tx_maxsegsize = IXL_MAX_DMA_SEG_SIZE,
335 .isc_tso_maxsize = IXL_TSO_SIZE + sizeof(struct ether_vlan_header),
336 .isc_tso_maxsegsize = IXL_MAX_DMA_SEG_SIZE,
337 .isc_rx_maxsize = 16384,
338 .isc_rx_nsegments = IXL_MAX_RX_SEGS,
339 .isc_rx_maxsegsize = IXL_MAX_DMA_SEG_SIZE,
340 .isc_nfl = 1,
341 .isc_ntxqs = 1,
342 .isc_nrxqs = 1,
343
344 .isc_admin_intrcnt = 1,
345 .isc_vendor_info = ixl_vendor_info_array,
346 .isc_driver_version = IXL_DRIVER_VERSION_STRING,
347 .isc_driver = &ixl_if_driver,
348 .isc_flags = IFLIB_NEED_SCRATCH | IFLIB_NEED_ZERO_CSUM | IFLIB_TSO_INIT_IP | IFLIB_ADMIN_ALWAYS_RUN,
349
350 .isc_nrxd_min = {IXL_MIN_RING},
351 .isc_ntxd_min = {IXL_MIN_RING},
352 .isc_nrxd_max = {IXL_MAX_RING},
353 .isc_ntxd_max = {IXL_MAX_RING},
354 .isc_nrxd_default = {IXL_DEFAULT_RING},
355 .isc_ntxd_default = {IXL_DEFAULT_RING},
356 };
357
358 /*** Functions ***/
359 static void *
ixl_register(device_t dev)360 ixl_register(device_t dev)
361 {
362 return (&ixl_sctx_init);
363 }
364
365 static int
ixl_allocate_pci_resources(struct ixl_pf * pf)366 ixl_allocate_pci_resources(struct ixl_pf *pf)
367 {
368 device_t dev = iflib_get_dev(pf->vsi.ctx);
369 struct i40e_hw *hw = &pf->hw;
370 int rid;
371
372 /* Map BAR0 */
373 rid = PCIR_BAR(0);
374 pf->pci_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
375 &rid, RF_ACTIVE);
376
377 if (!(pf->pci_mem)) {
378 device_printf(dev, "Unable to allocate bus resource: PCI memory\n");
379 return (ENXIO);
380 }
381
382 /* Save off the PCI information */
383 hw->vendor_id = pci_get_vendor(dev);
384 hw->device_id = pci_get_device(dev);
385 hw->revision_id = pci_read_config(dev, PCIR_REVID, 1);
386 hw->subsystem_vendor_id =
387 pci_read_config(dev, PCIR_SUBVEND_0, 2);
388 hw->subsystem_device_id =
389 pci_read_config(dev, PCIR_SUBDEV_0, 2);
390
391 hw->bus.device = pci_get_slot(dev);
392 hw->bus.func = pci_get_function(dev);
393
394 /* Save off register access information */
395 pf->osdep.mem_bus_space_tag =
396 rman_get_bustag(pf->pci_mem);
397 pf->osdep.mem_bus_space_handle =
398 rman_get_bushandle(pf->pci_mem);
399 pf->osdep.mem_bus_space_size = rman_get_size(pf->pci_mem);
400 pf->osdep.flush_reg = I40E_GLGEN_STAT;
401 pf->osdep.dev = dev;
402
403 pf->hw.hw_addr = (u8 *) &pf->osdep.mem_bus_space_handle;
404 pf->hw.back = &pf->osdep;
405
406 return (0);
407 }
408
409 static void
ixl_setup_ssctx(struct ixl_pf * pf)410 ixl_setup_ssctx(struct ixl_pf *pf)
411 {
412 if_softc_ctx_t scctx = pf->vsi.shared;
413 struct i40e_hw *hw = &pf->hw;
414
415 if (IXL_PF_IN_RECOVERY_MODE(pf)) {
416 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 1;
417 scctx->isc_ntxqsets = scctx->isc_nrxqsets = 1;
418 } else if (hw->mac.type == I40E_MAC_X722)
419 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 128;
420 else
421 scctx->isc_ntxqsets_max = scctx->isc_nrxqsets_max = 64;
422
423 if (pf->vsi.enable_head_writeback) {
424 scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]
425 * sizeof(struct i40e_tx_desc) + sizeof(u32), DBA_ALIGN);
426 scctx->isc_txrx = &ixl_txrx_hwb;
427 } else {
428 scctx->isc_txqsizes[0] = roundup2(scctx->isc_ntxd[0]
429 * sizeof(struct i40e_tx_desc), DBA_ALIGN);
430 scctx->isc_txrx = &ixl_txrx_dwb;
431 }
432
433 scctx->isc_txrx->ift_legacy_intr = ixl_intr;
434 scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0]
435 * sizeof(union i40e_32byte_rx_desc), DBA_ALIGN);
436 scctx->isc_msix_bar = PCIR_BAR(IXL_MSIX_BAR);
437 scctx->isc_tx_nsegments = IXL_MAX_TX_SEGS;
438 scctx->isc_tx_tso_segments_max = IXL_MAX_TSO_SEGS;
439 scctx->isc_tx_tso_size_max = IXL_TSO_SIZE;
440 scctx->isc_tx_tso_segsize_max = IXL_MAX_DMA_SEG_SIZE;
441 scctx->isc_rss_table_size = pf->hw.func_caps.rss_table_size;
442 scctx->isc_tx_csum_flags = CSUM_OFFLOAD;
443 scctx->isc_capabilities = scctx->isc_capenable = IXL_CAPS;
444 }
445
446 static void
ixl_admin_timer(void * arg)447 ixl_admin_timer(void *arg)
448 {
449 struct ixl_pf *pf = (struct ixl_pf *)arg;
450
451 if (ixl_test_state(&pf->state, IXL_STATE_LINK_POLLING)) {
452 struct i40e_hw *hw = &pf->hw;
453 sbintime_t stime;
454 enum i40e_status_code status;
455
456 hw->phy.get_link_info = TRUE;
457 status = i40e_get_link_status(hw, &pf->link_up);
458 if (status == I40E_SUCCESS) {
459 ixl_clear_state(&pf->state, IXL_STATE_LINK_POLLING);
460 /* OS link info is updated in the admin task */
461 } else {
462 device_printf(pf->dev,
463 "%s: i40e_get_link_status status %s, aq error %s\n",
464 __func__, i40e_stat_str(hw, status),
465 i40e_aq_str(hw, hw->aq.asq_last_status));
466 stime = getsbinuptime();
467 if (stime - pf->link_poll_start > IXL_PF_MAX_LINK_POLL) {
468 device_printf(pf->dev, "Polling link status failed\n");
469 ixl_clear_state(&pf->state, IXL_STATE_LINK_POLLING);
470 }
471 }
472 }
473
474 /* Fire off the admin task */
475 iflib_admin_intr_deferred(pf->vsi.ctx);
476
477 /* Reschedule the admin timer */
478 callout_schedule(&pf->admin_timer, hz/2);
479 }
480
481 static int
ixl_attach_pre_recovery_mode(struct ixl_pf * pf)482 ixl_attach_pre_recovery_mode(struct ixl_pf *pf)
483 {
484 struct ixl_vsi *vsi = &pf->vsi;
485 struct i40e_hw *hw = &pf->hw;
486 device_t dev = pf->dev;
487
488 device_printf(dev, "Firmware recovery mode detected. Limiting functionality. Refer to Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
489
490 i40e_get_mac_addr(hw, hw->mac.addr);
491
492 if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
493 ixl_configure_intr0_msix(pf);
494 ixl_enable_intr0(hw);
495 }
496
497 ixl_setup_ssctx(pf);
498
499 return (0);
500 }
501
502 static int
ixl_if_attach_pre(if_ctx_t ctx)503 ixl_if_attach_pre(if_ctx_t ctx)
504 {
505 device_t dev;
506 struct ixl_pf *pf;
507 struct i40e_hw *hw;
508 struct ixl_vsi *vsi;
509 enum i40e_get_fw_lldp_status_resp lldp_status;
510 struct i40e_filter_control_settings filter;
511 enum i40e_status_code status;
512 int error = 0;
513
514 dev = iflib_get_dev(ctx);
515 pf = iflib_get_softc(ctx);
516
517 INIT_DBG_DEV(dev, "begin");
518
519 vsi = &pf->vsi;
520 vsi->back = pf;
521 pf->dev = dev;
522 hw = &pf->hw;
523
524 vsi->dev = dev;
525 vsi->hw = &pf->hw;
526 vsi->id = 0;
527 vsi->num_vlans = 0;
528 vsi->ctx = ctx;
529 vsi->media = iflib_get_media(ctx);
530 vsi->shared = iflib_get_softc_ctx(ctx);
531
532 snprintf(pf->admin_mtx_name, sizeof(pf->admin_mtx_name),
533 "%s:admin", device_get_nameunit(dev));
534 mtx_init(&pf->admin_mtx, pf->admin_mtx_name, NULL, MTX_DEF);
535 callout_init_mtx(&pf->admin_timer, &pf->admin_mtx, 0);
536
537 /* Save tunable values */
538 ixl_save_pf_tunables(pf);
539
540 /* Do PCI setup - map BAR0, etc */
541 if (ixl_allocate_pci_resources(pf)) {
542 device_printf(dev, "Allocation of PCI resources failed\n");
543 error = ENXIO;
544 goto err_pci_res;
545 }
546
547 /* Establish a clean starting point */
548 i40e_clear_hw(hw);
549 i40e_set_mac_type(hw);
550
551 error = ixl_pf_reset(pf);
552 if (error)
553 goto err_out;
554
555 /* Initialize the shared code */
556 status = i40e_init_shared_code(hw);
557 if (status) {
558 device_printf(dev, "Unable to initialize shared code, error %s\n",
559 i40e_stat_str(hw, status));
560 error = EIO;
561 goto err_out;
562 }
563
564 /* Set up the admin queue */
565 hw->aq.num_arq_entries = IXL_AQ_LEN;
566 hw->aq.num_asq_entries = IXL_AQ_LEN;
567 hw->aq.arq_buf_size = IXL_AQ_BUF_SZ;
568 hw->aq.asq_buf_size = IXL_AQ_BUF_SZ;
569
570 status = i40e_init_adminq(hw);
571 if (status != 0 && status != I40E_ERR_FIRMWARE_API_VERSION) {
572 device_printf(dev, "Unable to initialize Admin Queue, error %s\n",
573 i40e_stat_str(hw, status));
574 error = EIO;
575 goto err_out;
576 }
577 ixl_print_nvm_version(pf);
578
579 if (status == I40E_ERR_FIRMWARE_API_VERSION) {
580 device_printf(dev, "The driver for the device stopped "
581 "because the NVM image is newer than expected.\n");
582 device_printf(dev, "You must install the most recent version of "
583 "the network driver.\n");
584 error = EIO;
585 goto err_out;
586 }
587
588 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
589 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw)) {
590 device_printf(dev, "The driver for the device detected "
591 "a newer version of the NVM image than expected.\n");
592 device_printf(dev, "Please install the most recent version "
593 "of the network driver.\n");
594 } else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4) {
595 device_printf(dev, "The driver for the device detected "
596 "an older version of the NVM image than expected.\n");
597 device_printf(dev, "Please update the NVM image.\n");
598 }
599
600 if (IXL_PF_IN_RECOVERY_MODE(pf)) {
601 error = ixl_attach_pre_recovery_mode(pf);
602 if (error)
603 goto err_out;
604 return (error);
605 }
606
607 /* Clear PXE mode */
608 i40e_clear_pxe_mode(hw);
609
610 /* Get capabilities from the device */
611 error = ixl_get_hw_capabilities(pf);
612 if (error) {
613 device_printf(dev, "get_hw_capabilities failed: %d\n",
614 error);
615 goto err_get_cap;
616 }
617
618 /* Set up host memory cache */
619 error = ixl_setup_hmc(pf);
620 if (error)
621 goto err_mac_hmc;
622
623 /* Disable LLDP from the firmware for certain NVM versions */
624 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
625 (pf->hw.aq.fw_maj_ver < 4)) {
626 i40e_aq_stop_lldp(hw, true, false, NULL);
627 ixl_set_state(&pf->state, IXL_STATE_FW_LLDP_DISABLED);
628 }
629
630 /* Try enabling Energy Efficient Ethernet (EEE) mode */
631 if (i40e_enable_eee(hw, true) == I40E_SUCCESS)
632 ixl_set_state(&pf->state, IXL_STATE_EEE_ENABLED);
633 else
634 ixl_clear_state(&pf->state, IXL_STATE_EEE_ENABLED);
635
636 /* Get MAC addresses from hardware */
637 i40e_get_mac_addr(hw, hw->mac.addr);
638 error = i40e_validate_mac_addr(hw->mac.addr);
639 if (error) {
640 device_printf(dev, "validate_mac_addr failed: %d\n", error);
641 goto err_mac_hmc;
642 }
643 bcopy(hw->mac.addr, hw->mac.perm_addr, ETHER_ADDR_LEN);
644 iflib_set_mac(ctx, hw->mac.addr);
645 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
646
647 /* Set up the device filtering */
648 bzero(&filter, sizeof(filter));
649 filter.enable_ethtype = TRUE;
650 filter.enable_macvlan = TRUE;
651 filter.enable_fdir = FALSE;
652 filter.hash_lut_size = I40E_HASH_LUT_SIZE_512;
653 if (i40e_set_filter_control(hw, &filter))
654 device_printf(dev, "i40e_set_filter_control() failed\n");
655
656 /* Query device FW LLDP status */
657 if (i40e_get_fw_lldp_status(hw, &lldp_status) == I40E_SUCCESS) {
658 if (lldp_status == I40E_GET_FW_LLDP_STATUS_DISABLED) {
659 ixl_set_state(&pf->state,
660 IXL_STATE_FW_LLDP_DISABLED);
661 } else {
662 ixl_clear_state(&pf->state,
663 IXL_STATE_FW_LLDP_DISABLED);
664 }
665 }
666
667 /* Tell FW to apply DCB config on link up */
668 i40e_aq_set_dcb_parameters(hw, true, NULL);
669
670 /* Fill out iflib parameters */
671 ixl_setup_ssctx(pf);
672
673 INIT_DBG_DEV(dev, "end");
674 return (0);
675
676 err_mac_hmc:
677 ixl_shutdown_hmc(pf);
678 err_get_cap:
679 i40e_shutdown_adminq(hw);
680 err_out:
681 ixl_free_pci_resources(pf);
682 err_pci_res:
683 mtx_lock(&pf->admin_mtx);
684 callout_stop(&pf->admin_timer);
685 mtx_unlock(&pf->admin_mtx);
686 mtx_destroy(&pf->admin_mtx);
687 return (error);
688 }
689
690 static int
ixl_if_attach_post(if_ctx_t ctx)691 ixl_if_attach_post(if_ctx_t ctx)
692 {
693 device_t dev;
694 struct ixl_pf *pf;
695 struct i40e_hw *hw;
696 struct ixl_vsi *vsi;
697 int error = 0;
698 enum i40e_status_code status;
699
700 dev = iflib_get_dev(ctx);
701 pf = iflib_get_softc(ctx);
702
703 INIT_DBG_DEV(dev, "begin");
704
705 vsi = &pf->vsi;
706 vsi->ifp = iflib_get_ifp(ctx);
707 hw = &pf->hw;
708
709 /* Save off determined number of queues for interface */
710 vsi->num_rx_queues = vsi->shared->isc_nrxqsets;
711 vsi->num_tx_queues = vsi->shared->isc_ntxqsets;
712
713 /* Setup OS network interface / ifnet */
714 if (ixl_setup_interface(dev, pf)) {
715 device_printf(dev, "interface setup failed!\n");
716 error = EIO;
717 goto err;
718 }
719
720 if (IXL_PF_IN_RECOVERY_MODE(pf)) {
721 /* Keep admin queue interrupts active while driver is loaded */
722 if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
723 ixl_configure_intr0_msix(pf);
724 ixl_enable_intr0(hw);
725 }
726
727 ixl_add_sysctls_recovery_mode(pf);
728
729 /* Start the admin timer */
730 mtx_lock(&pf->admin_mtx);
731 callout_reset(&pf->admin_timer, hz/2, ixl_admin_timer, pf);
732 mtx_unlock(&pf->admin_mtx);
733 return (0);
734 }
735
736 error = ixl_switch_config(pf);
737 if (error) {
738 device_printf(dev, "Initial ixl_switch_config() failed: %d\n",
739 error);
740 goto err;
741 }
742
743 /* Add protocol filters to list */
744 ixl_init_filters(vsi);
745
746 /* Init queue allocation manager */
747 error = ixl_pf_qmgr_init(&pf->qmgr, hw->func_caps.num_tx_qp);
748 if (error) {
749 device_printf(dev, "Failed to init queue manager for PF queues, error %d\n",
750 error);
751 goto err;
752 }
753 /* reserve a contiguous allocation for the PF's VSI */
754 error = ixl_pf_qmgr_alloc_contiguous(&pf->qmgr,
755 max(vsi->num_rx_queues, vsi->num_tx_queues), &pf->qtag);
756 if (error) {
757 device_printf(dev, "Failed to reserve queues for PF LAN VSI, error %d\n",
758 error);
759 goto err;
760 }
761 device_printf(dev, "Allocating %d queues for PF LAN VSI; %d queues active\n",
762 pf->qtag.num_allocated, pf->qtag.num_active);
763
764 /* Determine link state */
765 error = ixl_attach_get_link_status(pf);
766 if (error == EINVAL)
767 goto err;
768
769 /* Limit PHY interrupts to link, autoneg, and modules failure */
770 status = i40e_aq_set_phy_int_mask(hw, IXL_DEFAULT_PHY_INT_MASK,
771 NULL);
772 if (status) {
773 device_printf(dev, "i40e_aq_set_phy_mask() failed: err %s,"
774 " aq_err %s\n", i40e_stat_str(hw, status),
775 i40e_aq_str(hw, hw->aq.asq_last_status));
776 goto err;
777 }
778
779 /* Get the bus configuration and set the shared code */
780 ixl_get_bus_info(pf);
781
782 /* Keep admin queue interrupts active while driver is loaded */
783 if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
784 ixl_configure_intr0_msix(pf);
785 ixl_enable_intr0(hw);
786 }
787
788 /* Set initial advertised speed sysctl value */
789 ixl_set_initial_advertised_speeds(pf);
790
791 /* Initialize statistics & add sysctls */
792 ixl_add_device_sysctls(pf);
793 ixl_pf_reset_stats(pf);
794 ixl_update_stats_counters(pf);
795 ixl_add_hw_stats(pf);
796
797 /*
798 * Driver may have been reloaded. Ensure that the link state
799 * is consistent with current settings.
800 */
801 ixl_set_link(pf, ixl_test_state(&pf->state, IXL_STATE_LINK_ACTIVE_ON_DOWN));
802
803 hw->phy.get_link_info = true;
804 status = i40e_get_link_status(hw, &pf->link_up);
805 if (status != I40E_SUCCESS) {
806 device_printf(dev,
807 "%s get link status, status: %s aq_err=%s\n",
808 __func__, i40e_stat_str(hw, status),
809 i40e_aq_str(hw, hw->aq.asq_last_status));
810 /*
811 * Most probably FW has not finished configuring PHY.
812 * Retry periodically in a timer callback.
813 */
814 ixl_set_state(&pf->state, IXL_STATE_LINK_POLLING);
815 pf->link_poll_start = getsbinuptime();
816 } else
817 ixl_update_link_status(pf);
818
819 #ifdef PCI_IOV
820 ixl_initialize_sriov(pf);
821 #endif
822
823 #ifdef IXL_IW
824 if (hw->func_caps.iwarp && ixl_enable_iwarp) {
825 pf->iw_enabled = (pf->iw_msix > 0) ? true : false;
826 if (pf->iw_enabled) {
827 error = ixl_iw_pf_attach(pf);
828 if (error) {
829 device_printf(dev,
830 "interfacing to iWARP driver failed: %d\n",
831 error);
832 goto err;
833 } else
834 device_printf(dev, "iWARP ready\n");
835 } else
836 device_printf(dev, "iWARP disabled on this device "
837 "(no MSI-X vectors)\n");
838 } else {
839 pf->iw_enabled = false;
840 device_printf(dev, "The device is not iWARP enabled\n");
841 }
842 #endif
843 /* Start the admin timer */
844 mtx_lock(&pf->admin_mtx);
845 callout_reset(&pf->admin_timer, hz/2, ixl_admin_timer, pf);
846 mtx_unlock(&pf->admin_mtx);
847
848 INIT_DBG_DEV(dev, "end");
849 return (0);
850
851 err:
852 INIT_DEBUGOUT("end: error %d", error);
853 /* ixl_if_detach() is called on error from this */
854 return (error);
855 }
856
857 /**
858 * XXX: iflib always ignores the return value of detach()
859 * -> This means that this isn't allowed to fail
860 */
861 static int
ixl_if_detach(if_ctx_t ctx)862 ixl_if_detach(if_ctx_t ctx)
863 {
864 struct ixl_pf *pf = iflib_get_softc(ctx);
865 struct ixl_vsi *vsi = &pf->vsi;
866 struct i40e_hw *hw = &pf->hw;
867 device_t dev = pf->dev;
868 enum i40e_status_code status;
869 #ifdef IXL_IW
870 int error;
871 #endif
872
873 INIT_DBG_DEV(dev, "begin");
874
875 /* Stop the admin timer */
876 mtx_lock(&pf->admin_mtx);
877 callout_stop(&pf->admin_timer);
878 mtx_unlock(&pf->admin_mtx);
879 mtx_destroy(&pf->admin_mtx);
880
881 #ifdef IXL_IW
882 if (ixl_enable_iwarp && pf->iw_enabled) {
883 error = ixl_iw_pf_detach(pf);
884 if (error == EBUSY) {
885 device_printf(dev, "iwarp in use; stop it first.\n");
886 //return (error);
887 }
888 }
889 #endif
890 /* Remove all previously allocated media types */
891 ifmedia_removeall(vsi->media);
892
893 /* Shutdown LAN HMC */
894 ixl_shutdown_hmc(pf);
895
896 /* Shutdown admin queue */
897 ixl_disable_intr0(hw);
898 status = i40e_shutdown_adminq(hw);
899 if (status)
900 device_printf(dev,
901 "i40e_shutdown_adminq() failed with status %s\n",
902 i40e_stat_str(hw, status));
903
904 ixl_pf_qmgr_destroy(&pf->qmgr);
905 ixl_free_pci_resources(pf);
906 ixl_free_filters(&vsi->ftl);
907 INIT_DBG_DEV(dev, "end");
908 return (0);
909 }
910
911 static int
ixl_if_shutdown(if_ctx_t ctx)912 ixl_if_shutdown(if_ctx_t ctx)
913 {
914 int error = 0;
915
916 INIT_DEBUGOUT("ixl_if_shutdown: begin");
917
918 /* TODO: Call ixl_if_stop()? */
919
920 /* TODO: Then setup low power mode */
921
922 return (error);
923 }
924
925 static int
ixl_if_suspend(if_ctx_t ctx)926 ixl_if_suspend(if_ctx_t ctx)
927 {
928 int error = 0;
929
930 INIT_DEBUGOUT("ixl_if_suspend: begin");
931
932 /* TODO: Call ixl_if_stop()? */
933
934 /* TODO: Then setup low power mode */
935
936 return (error);
937 }
938
939 static int
ixl_if_resume(if_ctx_t ctx)940 ixl_if_resume(if_ctx_t ctx)
941 {
942 struct ifnet *ifp = iflib_get_ifp(ctx);
943
944 INIT_DEBUGOUT("ixl_if_resume: begin");
945
946 /* Read & clear wake-up registers */
947
948 /* Required after D3->D0 transition */
949 if (ifp->if_flags & IFF_UP)
950 ixl_if_init(ctx);
951
952 return (0);
953 }
954
955 void
ixl_if_init(if_ctx_t ctx)956 ixl_if_init(if_ctx_t ctx)
957 {
958 struct ixl_pf *pf = iflib_get_softc(ctx);
959 struct ixl_vsi *vsi = &pf->vsi;
960 struct i40e_hw *hw = &pf->hw;
961 struct ifnet *ifp = iflib_get_ifp(ctx);
962 device_t dev = iflib_get_dev(ctx);
963 u8 tmpaddr[ETHER_ADDR_LEN];
964 int ret;
965
966 if (IXL_PF_IN_RECOVERY_MODE(pf))
967 return;
968 /*
969 * If the aq is dead here, it probably means something outside of the driver
970 * did something to the adapter, like a PF reset.
971 * So, rebuild the driver's state here if that occurs.
972 */
973 if (!i40e_check_asq_alive(&pf->hw)) {
974 device_printf(dev, "Admin Queue is down; resetting...\n");
975 ixl_teardown_hw_structs(pf);
976 ixl_rebuild_hw_structs_after_reset(pf, false);
977 }
978
979 /* Get the latest mac address... User might use a LAA */
980 bcopy(IF_LLADDR(vsi->ifp), tmpaddr, ETH_ALEN);
981 if (!ixl_ether_is_equal(hw->mac.addr, tmpaddr) &&
982 (i40e_validate_mac_addr(tmpaddr) == I40E_SUCCESS)) {
983 ixl_del_all_vlan_filters(vsi, hw->mac.addr);
984 bcopy(tmpaddr, hw->mac.addr, ETH_ALEN);
985 ret = i40e_aq_mac_address_write(hw,
986 I40E_AQC_WRITE_TYPE_LAA_ONLY,
987 hw->mac.addr, NULL);
988 if (ret) {
989 device_printf(dev, "LLA address change failed!!\n");
990 return;
991 }
992 /*
993 * New filters are configured by ixl_reconfigure_filters
994 * at the end of ixl_init_locked.
995 */
996 }
997
998 iflib_set_mac(ctx, hw->mac.addr);
999
1000 /* Prepare the VSI: rings, hmc contexts, etc... */
1001 if (ixl_initialize_vsi(vsi)) {
1002 device_printf(dev, "initialize vsi failed!!\n");
1003 return;
1004 }
1005
1006 ixl_set_link(pf, true);
1007
1008 /* Reconfigure multicast filters in HW */
1009 ixl_if_multi_set(ctx);
1010
1011 /* Set up RSS */
1012 ixl_config_rss(pf);
1013
1014 /* Set up MSI-X routing and the ITR settings */
1015 if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
1016 ixl_configure_queue_intr_msix(pf);
1017 ixl_configure_itr(pf);
1018 } else
1019 ixl_configure_legacy(pf);
1020
1021 if (vsi->enable_head_writeback)
1022 ixl_init_tx_cidx(vsi);
1023 else
1024 ixl_init_tx_rsqs(vsi);
1025
1026 ixl_enable_rings(vsi);
1027
1028 i40e_aq_set_default_vsi(hw, vsi->seid, NULL);
1029
1030 /* Re-add configure filters to HW */
1031 ixl_reconfigure_filters(vsi);
1032
1033 /* Configure promiscuous mode */
1034 ixl_if_promisc_set(ctx, if_getflags(ifp));
1035
1036 #ifdef IXL_IW
1037 if (ixl_enable_iwarp && pf->iw_enabled) {
1038 ret = ixl_iw_pf_init(pf);
1039 if (ret)
1040 device_printf(dev,
1041 "initialize iwarp failed, code %d\n", ret);
1042 }
1043 #endif
1044 }
1045
1046 void
ixl_if_stop(if_ctx_t ctx)1047 ixl_if_stop(if_ctx_t ctx)
1048 {
1049 struct ixl_pf *pf = iflib_get_softc(ctx);
1050 struct ifnet *ifp = iflib_get_ifp(ctx);
1051 struct ixl_vsi *vsi = &pf->vsi;
1052
1053 INIT_DEBUGOUT("ixl_if_stop: begin\n");
1054
1055 if (IXL_PF_IN_RECOVERY_MODE(pf))
1056 return;
1057
1058 // TODO: This may need to be reworked
1059 #ifdef IXL_IW
1060 /* Stop iWARP device */
1061 if (ixl_enable_iwarp && pf->iw_enabled)
1062 ixl_iw_pf_stop(pf);
1063 #endif
1064
1065 ixl_disable_rings_intr(vsi);
1066 ixl_disable_rings(pf, vsi, &pf->qtag);
1067
1068 /*
1069 * Don't set link state if only reconfiguring
1070 * e.g. on MTU change.
1071 */
1072 if ((if_getflags(ifp) & IFF_UP) == 0 &&
1073 !ixl_test_state(&pf->state, IXL_STATE_LINK_ACTIVE_ON_DOWN))
1074 ixl_set_link(pf, false);
1075 }
1076
1077 static int
ixl_if_msix_intr_assign(if_ctx_t ctx,int msix)1078 ixl_if_msix_intr_assign(if_ctx_t ctx, int msix)
1079 {
1080 struct ixl_pf *pf = iflib_get_softc(ctx);
1081 struct ixl_vsi *vsi = &pf->vsi;
1082 struct ixl_rx_queue *rx_que = vsi->rx_queues;
1083 struct ixl_tx_queue *tx_que = vsi->tx_queues;
1084 int err, i, rid, vector = 0;
1085 char buf[16];
1086
1087 MPASS(vsi->shared->isc_nrxqsets > 0);
1088 MPASS(vsi->shared->isc_ntxqsets > 0);
1089
1090 /* Admin Que must use vector 0*/
1091 rid = vector + 1;
1092 err = iflib_irq_alloc_generic(ctx, &vsi->irq, rid, IFLIB_INTR_ADMIN,
1093 ixl_msix_adminq, pf, 0, "aq");
1094 if (err) {
1095 iflib_irq_free(ctx, &vsi->irq);
1096 device_printf(iflib_get_dev(ctx),
1097 "Failed to register Admin Que handler");
1098 return (err);
1099 }
1100 /* Create soft IRQ for handling VFLRs */
1101 iflib_softirq_alloc_generic(ctx, NULL, IFLIB_INTR_IOV, pf, 0, "iov");
1102
1103 /* Now set up the stations */
1104 for (i = 0, vector = 1; i < vsi->shared->isc_nrxqsets; i++, vector++, rx_que++) {
1105 rid = vector + 1;
1106
1107 snprintf(buf, sizeof(buf), "rxq%d", i);
1108 err = iflib_irq_alloc_generic(ctx, &rx_que->que_irq, rid,
1109 IFLIB_INTR_RXTX, ixl_msix_que, rx_que, rx_que->rxr.me, buf);
1110 /* XXX: Does the driver work as expected if there are fewer num_rx_queues than
1111 * what's expected in the iflib context? */
1112 if (err) {
1113 device_printf(iflib_get_dev(ctx),
1114 "Failed to allocate queue RX int vector %d, err: %d\n", i, err);
1115 vsi->num_rx_queues = i + 1;
1116 goto fail;
1117 }
1118 rx_que->msix = vector;
1119 }
1120
1121 bzero(buf, sizeof(buf));
1122
1123 for (i = 0; i < vsi->shared->isc_ntxqsets; i++, tx_que++) {
1124 snprintf(buf, sizeof(buf), "txq%d", i);
1125 iflib_softirq_alloc_generic(ctx,
1126 &vsi->rx_queues[i % vsi->shared->isc_nrxqsets].que_irq,
1127 IFLIB_INTR_TX, tx_que, tx_que->txr.me, buf);
1128
1129 /* TODO: Maybe call a strategy function for this to figure out which
1130 * interrupts to map Tx queues to. I don't know if there's an immediately
1131 * better way than this other than a user-supplied map, though. */
1132 tx_que->msix = (i % vsi->shared->isc_nrxqsets) + 1;
1133 }
1134
1135 return (0);
1136 fail:
1137 iflib_irq_free(ctx, &vsi->irq);
1138 rx_que = vsi->rx_queues;
1139 for (int i = 0; i < vsi->num_rx_queues; i++, rx_que++)
1140 iflib_irq_free(ctx, &rx_que->que_irq);
1141 return (err);
1142 }
1143
1144 /*
1145 * Enable all interrupts
1146 *
1147 * Called in:
1148 * iflib_init_locked, after ixl_if_init()
1149 */
1150 static void
ixl_if_enable_intr(if_ctx_t ctx)1151 ixl_if_enable_intr(if_ctx_t ctx)
1152 {
1153 struct ixl_pf *pf = iflib_get_softc(ctx);
1154 struct ixl_vsi *vsi = &pf->vsi;
1155 struct i40e_hw *hw = vsi->hw;
1156 struct ixl_rx_queue *que = vsi->rx_queues;
1157
1158 ixl_enable_intr0(hw);
1159 /* Enable queue interrupts */
1160 for (int i = 0; i < vsi->num_rx_queues; i++, que++)
1161 /* TODO: Queue index parameter is probably wrong */
1162 ixl_enable_queue(hw, que->rxr.me);
1163 }
1164
1165 /*
1166 * Disable queue interrupts
1167 *
1168 * Other interrupt causes need to remain active.
1169 */
1170 static void
ixl_if_disable_intr(if_ctx_t ctx)1171 ixl_if_disable_intr(if_ctx_t ctx)
1172 {
1173 struct ixl_pf *pf = iflib_get_softc(ctx);
1174 struct ixl_vsi *vsi = &pf->vsi;
1175 struct i40e_hw *hw = vsi->hw;
1176 struct ixl_rx_queue *rx_que = vsi->rx_queues;
1177
1178 if (vsi->shared->isc_intr == IFLIB_INTR_MSIX) {
1179 for (int i = 0; i < vsi->num_rx_queues; i++, rx_que++)
1180 ixl_disable_queue(hw, rx_que->msix - 1);
1181 } else {
1182 // Set PFINT_LNKLST0 FIRSTQ_INDX to 0x7FF
1183 // stops queues from triggering interrupts
1184 wr32(hw, I40E_PFINT_LNKLST0, 0x7FF);
1185 }
1186 }
1187
1188 static int
ixl_if_rx_queue_intr_enable(if_ctx_t ctx,uint16_t rxqid)1189 ixl_if_rx_queue_intr_enable(if_ctx_t ctx, uint16_t rxqid)
1190 {
1191 struct ixl_pf *pf = iflib_get_softc(ctx);
1192 struct ixl_vsi *vsi = &pf->vsi;
1193 struct i40e_hw *hw = vsi->hw;
1194 struct ixl_rx_queue *rx_que = &vsi->rx_queues[rxqid];
1195
1196 ixl_enable_queue(hw, rx_que->msix - 1);
1197 return (0);
1198 }
1199
1200 static int
ixl_if_tx_queue_intr_enable(if_ctx_t ctx,uint16_t txqid)1201 ixl_if_tx_queue_intr_enable(if_ctx_t ctx, uint16_t txqid)
1202 {
1203 struct ixl_pf *pf = iflib_get_softc(ctx);
1204 struct ixl_vsi *vsi = &pf->vsi;
1205 struct i40e_hw *hw = vsi->hw;
1206 struct ixl_tx_queue *tx_que = &vsi->tx_queues[txqid];
1207
1208 ixl_enable_queue(hw, tx_que->msix - 1);
1209 return (0);
1210 }
1211
1212 static int
ixl_if_tx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int ntxqs,int ntxqsets)1213 ixl_if_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs, int ntxqsets)
1214 {
1215 struct ixl_pf *pf = iflib_get_softc(ctx);
1216 struct ixl_vsi *vsi = &pf->vsi;
1217 if_softc_ctx_t scctx = vsi->shared;
1218 struct ixl_tx_queue *que;
1219 int i, j, error = 0;
1220
1221 MPASS(scctx->isc_ntxqsets > 0);
1222 MPASS(ntxqs == 1);
1223 MPASS(scctx->isc_ntxqsets == ntxqsets);
1224
1225 /* Allocate queue structure memory */
1226 if (!(vsi->tx_queues =
1227 (struct ixl_tx_queue *) malloc(sizeof(struct ixl_tx_queue) *ntxqsets, M_IXL, M_NOWAIT | M_ZERO))) {
1228 device_printf(iflib_get_dev(ctx), "Unable to allocate TX ring memory\n");
1229 return (ENOMEM);
1230 }
1231
1232 for (i = 0, que = vsi->tx_queues; i < ntxqsets; i++, que++) {
1233 struct tx_ring *txr = &que->txr;
1234
1235 txr->me = i;
1236 que->vsi = vsi;
1237
1238 if (!vsi->enable_head_writeback) {
1239 /* Allocate report status array */
1240 if (!(txr->tx_rsq = malloc(sizeof(qidx_t) * scctx->isc_ntxd[0], M_IXL, M_NOWAIT))) {
1241 device_printf(iflib_get_dev(ctx), "failed to allocate tx_rsq memory\n");
1242 error = ENOMEM;
1243 goto fail;
1244 }
1245 /* Init report status array */
1246 for (j = 0; j < scctx->isc_ntxd[0]; j++)
1247 txr->tx_rsq[j] = QIDX_INVALID;
1248 }
1249 /* get the virtual and physical address of the hardware queues */
1250 txr->tail = I40E_QTX_TAIL(txr->me);
1251 txr->tx_base = (struct i40e_tx_desc *)vaddrs[i * ntxqs];
1252 txr->tx_paddr = paddrs[i * ntxqs];
1253 txr->que = que;
1254 }
1255
1256 return (0);
1257 fail:
1258 ixl_if_queues_free(ctx);
1259 return (error);
1260 }
1261
1262 static int
ixl_if_rx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int nrxqs,int nrxqsets)1263 ixl_if_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs, int nrxqsets)
1264 {
1265 struct ixl_pf *pf = iflib_get_softc(ctx);
1266 struct ixl_vsi *vsi = &pf->vsi;
1267 struct ixl_rx_queue *que;
1268 int i, error = 0;
1269
1270 #ifdef INVARIANTS
1271 if_softc_ctx_t scctx = vsi->shared;
1272 MPASS(scctx->isc_nrxqsets > 0);
1273 MPASS(nrxqs == 1);
1274 MPASS(scctx->isc_nrxqsets == nrxqsets);
1275 #endif
1276
1277 /* Allocate queue structure memory */
1278 if (!(vsi->rx_queues =
1279 (struct ixl_rx_queue *) malloc(sizeof(struct ixl_rx_queue) *
1280 nrxqsets, M_IXL, M_NOWAIT | M_ZERO))) {
1281 device_printf(iflib_get_dev(ctx), "Unable to allocate RX ring memory\n");
1282 error = ENOMEM;
1283 goto fail;
1284 }
1285
1286 for (i = 0, que = vsi->rx_queues; i < nrxqsets; i++, que++) {
1287 struct rx_ring *rxr = &que->rxr;
1288
1289 rxr->me = i;
1290 que->vsi = vsi;
1291
1292 /* get the virtual and physical address of the hardware queues */
1293 rxr->tail = I40E_QRX_TAIL(rxr->me);
1294 rxr->rx_base = (union i40e_rx_desc *)vaddrs[i * nrxqs];
1295 rxr->rx_paddr = paddrs[i * nrxqs];
1296 rxr->que = que;
1297 }
1298
1299 return (0);
1300 fail:
1301 ixl_if_queues_free(ctx);
1302 return (error);
1303 }
1304
1305 static void
ixl_if_queues_free(if_ctx_t ctx)1306 ixl_if_queues_free(if_ctx_t ctx)
1307 {
1308 struct ixl_pf *pf = iflib_get_softc(ctx);
1309 struct ixl_vsi *vsi = &pf->vsi;
1310
1311 if (vsi->tx_queues != NULL && !vsi->enable_head_writeback) {
1312 struct ixl_tx_queue *que;
1313 int i = 0;
1314
1315 for (i = 0, que = vsi->tx_queues; i < vsi->num_tx_queues; i++, que++) {
1316 struct tx_ring *txr = &que->txr;
1317 if (txr->tx_rsq != NULL) {
1318 free(txr->tx_rsq, M_IXL);
1319 txr->tx_rsq = NULL;
1320 }
1321 }
1322 }
1323
1324 if (vsi->tx_queues != NULL) {
1325 free(vsi->tx_queues, M_IXL);
1326 vsi->tx_queues = NULL;
1327 }
1328 if (vsi->rx_queues != NULL) {
1329 free(vsi->rx_queues, M_IXL);
1330 vsi->rx_queues = NULL;
1331 }
1332
1333 if (!IXL_PF_IN_RECOVERY_MODE(pf))
1334 sysctl_ctx_free(&vsi->sysctl_ctx);
1335 }
1336
1337 void
ixl_update_link_status(struct ixl_pf * pf)1338 ixl_update_link_status(struct ixl_pf *pf)
1339 {
1340 struct ixl_vsi *vsi = &pf->vsi;
1341 struct i40e_hw *hw = &pf->hw;
1342 u64 baudrate;
1343
1344 if (pf->link_up) {
1345 if (vsi->link_active == FALSE) {
1346 vsi->link_active = TRUE;
1347 baudrate = ixl_max_aq_speed_to_value(hw->phy.link_info.link_speed);
1348 iflib_link_state_change(vsi->ctx, LINK_STATE_UP, baudrate);
1349 ixl_link_up_msg(pf);
1350 #ifdef PCI_IOV
1351 ixl_broadcast_link_state(pf);
1352 #endif
1353 }
1354 } else { /* Link down */
1355 if (vsi->link_active == TRUE) {
1356 vsi->link_active = FALSE;
1357 iflib_link_state_change(vsi->ctx, LINK_STATE_DOWN, 0);
1358 #ifdef PCI_IOV
1359 ixl_broadcast_link_state(pf);
1360 #endif
1361 }
1362 }
1363 }
1364
1365 static void
ixl_handle_lan_overflow_event(struct ixl_pf * pf,struct i40e_arq_event_info * e)1366 ixl_handle_lan_overflow_event(struct ixl_pf *pf, struct i40e_arq_event_info *e)
1367 {
1368 device_t dev = pf->dev;
1369 u32 rxq_idx, qtx_ctl;
1370
1371 rxq_idx = (e->desc.params.external.param0 & I40E_PRTDCB_RUPTQ_RXQNUM_MASK) >>
1372 I40E_PRTDCB_RUPTQ_RXQNUM_SHIFT;
1373 qtx_ctl = e->desc.params.external.param1;
1374
1375 device_printf(dev, "LAN overflow event: global rxq_idx %d\n", rxq_idx);
1376 device_printf(dev, "LAN overflow event: QTX_CTL 0x%08x\n", qtx_ctl);
1377 }
1378
1379 static int
ixl_process_adminq(struct ixl_pf * pf,u16 * pending)1380 ixl_process_adminq(struct ixl_pf *pf, u16 *pending)
1381 {
1382 enum i40e_status_code status = I40E_SUCCESS;
1383 struct i40e_arq_event_info event;
1384 struct i40e_hw *hw = &pf->hw;
1385 device_t dev = pf->dev;
1386 u16 opcode;
1387 u32 loop = 0, reg;
1388
1389 event.buf_len = IXL_AQ_BUF_SZ;
1390 event.msg_buf = malloc(event.buf_len, M_IXL, M_NOWAIT | M_ZERO);
1391 if (!event.msg_buf) {
1392 device_printf(dev, "%s: Unable to allocate memory for Admin"
1393 " Queue event!\n", __func__);
1394 return (ENOMEM);
1395 }
1396
1397 /* clean and process any events */
1398 do {
1399 status = i40e_clean_arq_element(hw, &event, pending);
1400 if (status)
1401 break;
1402 opcode = LE16_TO_CPU(event.desc.opcode);
1403 ixl_dbg(pf, IXL_DBG_AQ,
1404 "Admin Queue event: %#06x\n", opcode);
1405 switch (opcode) {
1406 case i40e_aqc_opc_get_link_status:
1407 ixl_link_event(pf, &event);
1408 break;
1409 case i40e_aqc_opc_send_msg_to_pf:
1410 #ifdef PCI_IOV
1411 ixl_handle_vf_msg(pf, &event);
1412 #endif
1413 break;
1414 /*
1415 * This should only occur on no-drop queues, which
1416 * aren't currently configured.
1417 */
1418 case i40e_aqc_opc_event_lan_overflow:
1419 ixl_handle_lan_overflow_event(pf, &event);
1420 break;
1421 default:
1422 break;
1423 }
1424 } while (*pending && (loop++ < IXL_ADM_LIMIT));
1425
1426 free(event.msg_buf, M_IXL);
1427
1428 /* Re-enable admin queue interrupt cause */
1429 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
1430 reg |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
1431 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
1432
1433 return (status);
1434 }
1435
1436 static void
ixl_if_update_admin_status(if_ctx_t ctx)1437 ixl_if_update_admin_status(if_ctx_t ctx)
1438 {
1439 struct ixl_pf *pf = iflib_get_softc(ctx);
1440 struct i40e_hw *hw = &pf->hw;
1441 u16 pending;
1442
1443 if (IXL_PF_IS_RESETTING(pf))
1444 ixl_handle_empr_reset(pf);
1445
1446 /*
1447 * Admin Queue is shut down while handling reset.
1448 * Don't proceed if it hasn't been re-initialized
1449 * e.g due to an issue with new FW.
1450 */
1451 if (!i40e_check_asq_alive(&pf->hw))
1452 return;
1453
1454 if (ixl_test_state(&pf->state, IXL_STATE_MDD_PENDING))
1455 ixl_handle_mdd_event(pf);
1456
1457 ixl_process_adminq(pf, &pending);
1458 ixl_update_link_status(pf);
1459
1460 /*
1461 * If there are still messages to process, reschedule ourselves.
1462 * Otherwise, re-enable our interrupt and go to sleep.
1463 */
1464 if (pending > 0)
1465 iflib_admin_intr_deferred(ctx);
1466 else
1467 ixl_enable_intr0(hw);
1468 }
1469
1470 static void
ixl_if_multi_set(if_ctx_t ctx)1471 ixl_if_multi_set(if_ctx_t ctx)
1472 {
1473 struct ixl_pf *pf = iflib_get_softc(ctx);
1474 struct ixl_vsi *vsi = &pf->vsi;
1475 struct i40e_hw *hw = vsi->hw;
1476 int mcnt;
1477
1478 IOCTL_DEBUGOUT("ixl_if_multi_set: begin");
1479
1480 /* Delete filters for removed multicast addresses */
1481 ixl_del_multi(vsi, false);
1482
1483 mcnt = min(if_llmaddr_count(iflib_get_ifp(ctx)), MAX_MULTICAST_ADDR);
1484 if (__predict_false(mcnt == MAX_MULTICAST_ADDR)) {
1485 i40e_aq_set_vsi_multicast_promiscuous(hw,
1486 vsi->seid, TRUE, NULL);
1487 ixl_del_multi(vsi, true);
1488 return;
1489 }
1490
1491 ixl_add_multi(vsi);
1492 IOCTL_DEBUGOUT("ixl_if_multi_set: end");
1493 }
1494
1495 static int
ixl_if_mtu_set(if_ctx_t ctx,uint32_t mtu)1496 ixl_if_mtu_set(if_ctx_t ctx, uint32_t mtu)
1497 {
1498 struct ixl_pf *pf = iflib_get_softc(ctx);
1499 struct ixl_vsi *vsi = &pf->vsi;
1500
1501 IOCTL_DEBUGOUT("ioctl: SIOCSIFMTU (Set Interface MTU)");
1502 if (mtu > IXL_MAX_FRAME - ETHER_HDR_LEN - ETHER_CRC_LEN -
1503 ETHER_VLAN_ENCAP_LEN)
1504 return (EINVAL);
1505
1506 vsi->shared->isc_max_frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN +
1507 ETHER_VLAN_ENCAP_LEN;
1508
1509 return (0);
1510 }
1511
1512 static void
ixl_if_media_status(if_ctx_t ctx,struct ifmediareq * ifmr)1513 ixl_if_media_status(if_ctx_t ctx, struct ifmediareq *ifmr)
1514 {
1515 struct ixl_pf *pf = iflib_get_softc(ctx);
1516 struct i40e_hw *hw = &pf->hw;
1517
1518 INIT_DEBUGOUT("ixl_media_status: begin");
1519
1520 ifmr->ifm_status = IFM_AVALID;
1521 ifmr->ifm_active = IFM_ETHER;
1522
1523 if (!pf->link_up) {
1524 return;
1525 }
1526
1527 ifmr->ifm_status |= IFM_ACTIVE;
1528 /* Hardware is always full-duplex */
1529 ifmr->ifm_active |= IFM_FDX;
1530
1531 switch (hw->phy.link_info.phy_type) {
1532 /* 100 M */
1533 case I40E_PHY_TYPE_100BASE_TX:
1534 ifmr->ifm_active |= IFM_100_TX;
1535 break;
1536 /* 1 G */
1537 case I40E_PHY_TYPE_1000BASE_T:
1538 ifmr->ifm_active |= IFM_1000_T;
1539 break;
1540 case I40E_PHY_TYPE_1000BASE_SX:
1541 ifmr->ifm_active |= IFM_1000_SX;
1542 break;
1543 case I40E_PHY_TYPE_1000BASE_LX:
1544 ifmr->ifm_active |= IFM_1000_LX;
1545 break;
1546 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
1547 ifmr->ifm_active |= IFM_1000_T;
1548 break;
1549 /* 2.5 G */
1550 case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
1551 ifmr->ifm_active |= IFM_2500_T;
1552 break;
1553 /* 5 G */
1554 case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
1555 ifmr->ifm_active |= IFM_5000_T;
1556 break;
1557 /* 10 G */
1558 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
1559 ifmr->ifm_active |= IFM_10G_TWINAX;
1560 break;
1561 case I40E_PHY_TYPE_10GBASE_SR:
1562 ifmr->ifm_active |= IFM_10G_SR;
1563 break;
1564 case I40E_PHY_TYPE_10GBASE_LR:
1565 ifmr->ifm_active |= IFM_10G_LR;
1566 break;
1567 case I40E_PHY_TYPE_10GBASE_T:
1568 ifmr->ifm_active |= IFM_10G_T;
1569 break;
1570 case I40E_PHY_TYPE_XAUI:
1571 case I40E_PHY_TYPE_XFI:
1572 ifmr->ifm_active |= IFM_10G_TWINAX;
1573 break;
1574 case I40E_PHY_TYPE_10GBASE_AOC:
1575 ifmr->ifm_active |= IFM_10G_AOC;
1576 break;
1577 /* 25 G */
1578 case I40E_PHY_TYPE_25GBASE_KR:
1579 ifmr->ifm_active |= IFM_25G_KR;
1580 break;
1581 case I40E_PHY_TYPE_25GBASE_CR:
1582 ifmr->ifm_active |= IFM_25G_CR;
1583 break;
1584 case I40E_PHY_TYPE_25GBASE_SR:
1585 ifmr->ifm_active |= IFM_25G_SR;
1586 break;
1587 case I40E_PHY_TYPE_25GBASE_LR:
1588 ifmr->ifm_active |= IFM_25G_LR;
1589 break;
1590 case I40E_PHY_TYPE_25GBASE_AOC:
1591 ifmr->ifm_active |= IFM_25G_AOC;
1592 break;
1593 case I40E_PHY_TYPE_25GBASE_ACC:
1594 ifmr->ifm_active |= IFM_25G_ACC;
1595 break;
1596 /* 40 G */
1597 case I40E_PHY_TYPE_40GBASE_CR4:
1598 case I40E_PHY_TYPE_40GBASE_CR4_CU:
1599 ifmr->ifm_active |= IFM_40G_CR4;
1600 break;
1601 case I40E_PHY_TYPE_40GBASE_SR4:
1602 ifmr->ifm_active |= IFM_40G_SR4;
1603 break;
1604 case I40E_PHY_TYPE_40GBASE_LR4:
1605 ifmr->ifm_active |= IFM_40G_LR4;
1606 break;
1607 case I40E_PHY_TYPE_XLAUI:
1608 ifmr->ifm_active |= IFM_OTHER;
1609 break;
1610 case I40E_PHY_TYPE_1000BASE_KX:
1611 ifmr->ifm_active |= IFM_1000_KX;
1612 break;
1613 case I40E_PHY_TYPE_SGMII:
1614 ifmr->ifm_active |= IFM_1000_SGMII;
1615 break;
1616 /* ERJ: What's the difference between these? */
1617 case I40E_PHY_TYPE_10GBASE_CR1_CU:
1618 case I40E_PHY_TYPE_10GBASE_CR1:
1619 ifmr->ifm_active |= IFM_10G_CR1;
1620 break;
1621 case I40E_PHY_TYPE_10GBASE_KX4:
1622 ifmr->ifm_active |= IFM_10G_KX4;
1623 break;
1624 case I40E_PHY_TYPE_10GBASE_KR:
1625 ifmr->ifm_active |= IFM_10G_KR;
1626 break;
1627 case I40E_PHY_TYPE_SFI:
1628 ifmr->ifm_active |= IFM_10G_SFI;
1629 break;
1630 /* Our single 20G media type */
1631 case I40E_PHY_TYPE_20GBASE_KR2:
1632 ifmr->ifm_active |= IFM_20G_KR2;
1633 break;
1634 case I40E_PHY_TYPE_40GBASE_KR4:
1635 ifmr->ifm_active |= IFM_40G_KR4;
1636 break;
1637 case I40E_PHY_TYPE_XLPPI:
1638 case I40E_PHY_TYPE_40GBASE_AOC:
1639 ifmr->ifm_active |= IFM_40G_XLPPI;
1640 break;
1641 /* Unknown to driver */
1642 default:
1643 ifmr->ifm_active |= IFM_UNKNOWN;
1644 break;
1645 }
1646 /* Report flow control status as well */
1647 if (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
1648 ifmr->ifm_active |= IFM_ETH_TXPAUSE;
1649 if (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
1650 ifmr->ifm_active |= IFM_ETH_RXPAUSE;
1651 }
1652
1653 static int
ixl_if_media_change(if_ctx_t ctx)1654 ixl_if_media_change(if_ctx_t ctx)
1655 {
1656 struct ifmedia *ifm = iflib_get_media(ctx);
1657
1658 INIT_DEBUGOUT("ixl_media_change: begin");
1659
1660 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1661 return (EINVAL);
1662
1663 if_printf(iflib_get_ifp(ctx), "Media change is not supported.\n");
1664 return (ENODEV);
1665 }
1666
1667 static int
ixl_if_promisc_set(if_ctx_t ctx,int flags)1668 ixl_if_promisc_set(if_ctx_t ctx, int flags)
1669 {
1670 struct ixl_pf *pf = iflib_get_softc(ctx);
1671 struct ixl_vsi *vsi = &pf->vsi;
1672 struct ifnet *ifp = iflib_get_ifp(ctx);
1673 struct i40e_hw *hw = vsi->hw;
1674 int err;
1675 bool uni = FALSE, multi = FALSE;
1676
1677 if (flags & IFF_PROMISC)
1678 uni = multi = TRUE;
1679 else if (flags & IFF_ALLMULTI || if_llmaddr_count(ifp) >=
1680 MAX_MULTICAST_ADDR)
1681 multi = TRUE;
1682
1683 err = i40e_aq_set_vsi_unicast_promiscuous(hw,
1684 vsi->seid, uni, NULL, true);
1685 if (err)
1686 return (err);
1687 err = i40e_aq_set_vsi_multicast_promiscuous(hw,
1688 vsi->seid, multi, NULL);
1689 return (err);
1690 }
1691
1692 static void
ixl_if_timer(if_ctx_t ctx,uint16_t qid)1693 ixl_if_timer(if_ctx_t ctx, uint16_t qid)
1694 {
1695 struct ixl_pf *pf = iflib_get_softc(ctx);
1696
1697 if (qid != 0)
1698 return;
1699
1700 ixl_update_stats_counters(pf);
1701 }
1702
1703 static void
ixl_if_vlan_register(if_ctx_t ctx,u16 vtag)1704 ixl_if_vlan_register(if_ctx_t ctx, u16 vtag)
1705 {
1706 struct ixl_pf *pf = iflib_get_softc(ctx);
1707 struct ixl_vsi *vsi = &pf->vsi;
1708 struct i40e_hw *hw = vsi->hw;
1709 if_t ifp = iflib_get_ifp(ctx);
1710
1711 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
1712 return;
1713
1714 /*
1715 * Keep track of registered VLANS to know what
1716 * filters have to be configured when VLAN_HWFILTER
1717 * capability is enabled.
1718 */
1719 ++vsi->num_vlans;
1720 bit_set(vsi->vlans_map, vtag);
1721
1722 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0)
1723 return;
1724
1725 if (vsi->num_vlans < IXL_MAX_VLAN_FILTERS)
1726 ixl_add_filter(vsi, hw->mac.addr, vtag);
1727 else if (vsi->num_vlans == IXL_MAX_VLAN_FILTERS) {
1728 /*
1729 * There is not enough HW resources to add filters
1730 * for all registered VLANs. Re-configure filtering
1731 * to allow reception of all expected traffic.
1732 */
1733 device_printf(vsi->dev,
1734 "Not enough HW filters for all VLANs. VLAN HW filtering disabled");
1735 ixl_del_all_vlan_filters(vsi, hw->mac.addr);
1736 ixl_add_filter(vsi, hw->mac.addr, IXL_VLAN_ANY);
1737 }
1738 }
1739
1740 static void
ixl_if_vlan_unregister(if_ctx_t ctx,u16 vtag)1741 ixl_if_vlan_unregister(if_ctx_t ctx, u16 vtag)
1742 {
1743 struct ixl_pf *pf = iflib_get_softc(ctx);
1744 struct ixl_vsi *vsi = &pf->vsi;
1745 struct i40e_hw *hw = vsi->hw;
1746 if_t ifp = iflib_get_ifp(ctx);
1747
1748 if ((vtag == 0) || (vtag > 4095)) /* Invalid */
1749 return;
1750
1751 --vsi->num_vlans;
1752 bit_clear(vsi->vlans_map, vtag);
1753
1754 if ((if_getcapenable(ifp) & IFCAP_VLAN_HWFILTER) == 0)
1755 return;
1756
1757 /* One filter is used for untagged frames */
1758 if (vsi->num_vlans < IXL_MAX_VLAN_FILTERS - 1)
1759 ixl_del_filter(vsi, hw->mac.addr, vtag);
1760 else if (vsi->num_vlans == IXL_MAX_VLAN_FILTERS - 1) {
1761 ixl_del_filter(vsi, hw->mac.addr, IXL_VLAN_ANY);
1762 ixl_add_vlan_filters(vsi, hw->mac.addr);
1763 }
1764 }
1765
1766 static uint64_t
ixl_if_get_counter(if_ctx_t ctx,ift_counter cnt)1767 ixl_if_get_counter(if_ctx_t ctx, ift_counter cnt)
1768 {
1769 struct ixl_pf *pf = iflib_get_softc(ctx);
1770 struct ixl_vsi *vsi = &pf->vsi;
1771 if_t ifp = iflib_get_ifp(ctx);
1772
1773 switch (cnt) {
1774 case IFCOUNTER_IPACKETS:
1775 return (vsi->ipackets);
1776 case IFCOUNTER_IERRORS:
1777 return (vsi->ierrors);
1778 case IFCOUNTER_OPACKETS:
1779 return (vsi->opackets);
1780 case IFCOUNTER_OERRORS:
1781 return (vsi->oerrors);
1782 case IFCOUNTER_COLLISIONS:
1783 /* Collisions are by standard impossible in 40G/10G Ethernet */
1784 return (0);
1785 case IFCOUNTER_IBYTES:
1786 return (vsi->ibytes);
1787 case IFCOUNTER_OBYTES:
1788 return (vsi->obytes);
1789 case IFCOUNTER_IMCASTS:
1790 return (vsi->imcasts);
1791 case IFCOUNTER_OMCASTS:
1792 return (vsi->omcasts);
1793 case IFCOUNTER_IQDROPS:
1794 return (vsi->iqdrops);
1795 case IFCOUNTER_OQDROPS:
1796 return (vsi->oqdrops);
1797 case IFCOUNTER_NOPROTO:
1798 return (vsi->noproto);
1799 default:
1800 return (if_get_counter_default(ifp, cnt));
1801 }
1802 }
1803
1804 #ifdef PCI_IOV
1805 static void
ixl_if_vflr_handle(if_ctx_t ctx)1806 ixl_if_vflr_handle(if_ctx_t ctx)
1807 {
1808 struct ixl_pf *pf = iflib_get_softc(ctx);
1809
1810 ixl_handle_vflr(pf);
1811 }
1812 #endif
1813
1814 static int
ixl_if_i2c_req(if_ctx_t ctx,struct ifi2creq * req)1815 ixl_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req)
1816 {
1817 struct ixl_pf *pf = iflib_get_softc(ctx);
1818
1819 if (pf->read_i2c_byte == NULL)
1820 return (EINVAL);
1821
1822 for (int i = 0; i < req->len; i++)
1823 if (pf->read_i2c_byte(pf, req->offset + i,
1824 req->dev_addr, &req->data[i]))
1825 return (EIO);
1826 return (0);
1827 }
1828
1829 static int
ixl_if_priv_ioctl(if_ctx_t ctx,u_long command,caddr_t data)1830 ixl_if_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data)
1831 {
1832 struct ixl_pf *pf = iflib_get_softc(ctx);
1833 struct ifdrv *ifd = (struct ifdrv *)data;
1834 int error = 0;
1835
1836 /*
1837 * The iflib_if_ioctl forwards SIOCxDRVSPEC and SIOGPRIVATE_0 without
1838 * performing privilege checks. It is important that this function
1839 * perform the necessary checks for commands which should only be
1840 * executed by privileged threads.
1841 */
1842
1843 switch(command) {
1844 case SIOCGDRVSPEC:
1845 case SIOCSDRVSPEC:
1846 /* NVM update command */
1847 if (ifd->ifd_cmd == I40E_NVM_ACCESS) {
1848 error = priv_check(curthread, PRIV_DRIVER);
1849 if (error)
1850 break;
1851 error = ixl_handle_nvmupd_cmd(pf, ifd);
1852 } else {
1853 error = EINVAL;
1854 }
1855 break;
1856 default:
1857 error = EOPNOTSUPP;
1858 }
1859
1860 return (error);
1861 }
1862
1863 /* ixl_if_needs_restart - Tell iflib when the driver needs to be reinitialized
1864 * @ctx: iflib context
1865 * @event: event code to check
1866 *
1867 * Defaults to returning false for every event.
1868 *
1869 * @returns true if iflib needs to reinit the interface, false otherwise
1870 */
1871 static bool
ixl_if_needs_restart(if_ctx_t ctx __unused,enum iflib_restart_event event)1872 ixl_if_needs_restart(if_ctx_t ctx __unused, enum iflib_restart_event event)
1873 {
1874 switch (event) {
1875 case IFLIB_RESTART_VLAN_CONFIG:
1876 default:
1877 return (false);
1878 }
1879 }
1880
1881 /*
1882 * Sanity check and save off tunable values.
1883 */
1884 static void
ixl_save_pf_tunables(struct ixl_pf * pf)1885 ixl_save_pf_tunables(struct ixl_pf *pf)
1886 {
1887 device_t dev = pf->dev;
1888
1889 /* Save tunable information */
1890 #ifdef IXL_DEBUG_FC
1891 pf->enable_tx_fc_filter = ixl_enable_tx_fc_filter;
1892 #endif
1893 #ifdef IXL_DEBUG
1894 pf->recovery_mode = ixl_debug_recovery_mode;
1895 #endif
1896 pf->dbg_mask = ixl_core_debug_mask;
1897 pf->hw.debug_mask = ixl_shared_debug_mask;
1898 pf->vsi.enable_head_writeback = !!(ixl_enable_head_writeback);
1899 pf->enable_vf_loopback = !!(ixl_enable_vf_loopback);
1900 #if 0
1901 pf->dynamic_rx_itr = ixl_dynamic_rx_itr;
1902 pf->dynamic_tx_itr = ixl_dynamic_tx_itr;
1903 #endif
1904
1905 if (ixl_i2c_access_method > 3 || ixl_i2c_access_method < 0)
1906 pf->i2c_access_method = 0;
1907 else
1908 pf->i2c_access_method = ixl_i2c_access_method;
1909
1910 if (ixl_tx_itr < 0 || ixl_tx_itr > IXL_MAX_ITR) {
1911 device_printf(dev, "Invalid tx_itr value of %d set!\n",
1912 ixl_tx_itr);
1913 device_printf(dev, "tx_itr must be between %d and %d, "
1914 "inclusive\n",
1915 0, IXL_MAX_ITR);
1916 device_printf(dev, "Using default value of %d instead\n",
1917 IXL_ITR_4K);
1918 pf->tx_itr = IXL_ITR_4K;
1919 } else
1920 pf->tx_itr = ixl_tx_itr;
1921
1922 if (ixl_rx_itr < 0 || ixl_rx_itr > IXL_MAX_ITR) {
1923 device_printf(dev, "Invalid rx_itr value of %d set!\n",
1924 ixl_rx_itr);
1925 device_printf(dev, "rx_itr must be between %d and %d, "
1926 "inclusive\n",
1927 0, IXL_MAX_ITR);
1928 device_printf(dev, "Using default value of %d instead\n",
1929 IXL_ITR_8K);
1930 pf->rx_itr = IXL_ITR_8K;
1931 } else
1932 pf->rx_itr = ixl_rx_itr;
1933
1934 pf->fc = -1;
1935 if (ixl_flow_control != -1) {
1936 if (ixl_flow_control < 0 || ixl_flow_control > 3) {
1937 device_printf(dev,
1938 "Invalid flow_control value of %d set!\n",
1939 ixl_flow_control);
1940 device_printf(dev,
1941 "flow_control must be between %d and %d, "
1942 "inclusive\n", 0, 3);
1943 device_printf(dev,
1944 "Using default configuration instead\n");
1945 } else
1946 pf->fc = ixl_flow_control;
1947 }
1948 }
1949
1950