1 /*- 2 * Copyright (c) 1999 Matthew R. Green 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * from: NetBSD: iommuvar.h,v 1.6 2008/05/29 14:51:26 mrg Exp 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _MACHINE_IOMMUVAR_H_ 32 #define _MACHINE_IOMMUVAR_H_ 33 34 #define IO_PAGE_SIZE PAGE_SIZE_8K 35 #define IO_PAGE_MASK PAGE_MASK_8K 36 #define IO_PAGE_SHIFT PAGE_SHIFT_8K 37 #define round_io_page(x) round_page(x) 38 #define trunc_io_page(x) trunc_page(x) 39 40 /* 41 * LRU queue handling for lazy resource allocation 42 */ 43 TAILQ_HEAD(iommu_maplruq_head, bus_dmamap); 44 45 /* 46 * Per-IOMMU state; the parenthesized comments indicate the locking strategy: 47 * i - protected by is_mtx. 48 * r - read-only after initialization. 49 * * - comment refers to pointer target / target hardware registers 50 * (for bus_addr_t). 51 * is_maplruq is also locked by is_mtx. Elements of is_tsb may only be 52 * accessed from functions operating on the map owning the corresponding 53 * resource, so the locking the user is required to do to protect the 54 * map is sufficient. 55 * dm_reslist of all maps are locked by is_mtx as well. 56 * is_dvma_rman has its own internal lock. 57 */ 58 struct iommu_state { 59 struct mtx is_mtx; 60 struct rman is_dvma_rman; /* DVMA space rman */ 61 struct iommu_maplruq_head is_maplruq; /* (i) LRU queue */ 62 vm_paddr_t is_ptsb; /* (r) TSB physical address */ 63 uint64_t *is_tsb; /* (*i) TSB virtual address */ 64 int is_tsbsize; /* (r) 0 = 8K, ... */ 65 uint64_t is_pmaxaddr; /* (r) max. physical address */ 66 uint64_t is_dvmabase; /* (r) */ 67 uint64_t is_cr; /* (r) Control reg value */ 68 69 vm_paddr_t is_flushpa[2]; /* (r) */ 70 volatile uint64_t *is_flushva[2]; /* (r, *i) */ 71 /* 72 * (i) 73 * When a flush is completed, 64 bytes will be stored at the given 74 * location, the first double word being 1, to indicate completion. 75 * The lower 6 address bits are ignored, so the addresses need to be 76 * suitably aligned; over-allocate a large enough margin to be able 77 * to adjust it. 78 * Two such buffers are needed. 79 */ 80 volatile char is_flush[STRBUF_FLUSHSYNC_NBYTES * 3 - 1]; 81 82 /* copies of our parent's state, to allow us to be self contained */ 83 bus_space_tag_t is_bustag; /* (r) Our bus tag */ 84 bus_space_handle_t is_bushandle; /* (r) */ 85 bus_addr_t is_iommu; /* (r, *i) IOMMU registers */ 86 bus_addr_t is_sb[2]; /* (r, *i) Streaming buffer */ 87 /* Tag diagnostics access */ 88 bus_addr_t is_dtag; /* (r, *r) */ 89 /* Data RAM diagnostic access */ 90 bus_addr_t is_ddram; /* (r, *r) */ 91 /* LRU queue diag. access */ 92 bus_addr_t is_dqueue; /* (r, *r) */ 93 /* Virtual address diagnostics register */ 94 bus_addr_t is_dva; /* (r, *r) */ 95 /* Tag compare diagnostics access */ 96 bus_addr_t is_dtcmp; /* (r, *r) */ 97 /* behavior flags */ 98 u_int is_flags; /* (r) */ 99 #define IOMMU_RERUN_DISABLE (1 << 0) 100 #define IOMMU_FIRE (1 << 1) 101 #define IOMMU_FLUSH_CACHE (1 << 2) 102 #define IOMMU_PRESERVE_PROM (1 << 3) 103 }; 104 105 /* interfaces for PCI/SBus code */ 106 void iommu_init(const char *name, struct iommu_state *is, u_int tsbsize, 107 uint32_t iovabase, u_int resvpg); 108 void iommu_reset(struct iommu_state *is); 109 void iommu_decode_fault(struct iommu_state *is, vm_offset_t phys); 110 111 extern struct bus_dma_methods iommu_dma_methods; 112 113 #endif /* !_MACHINE_IOMMUVAR_H_ */ 114