xref: /freebsd-11-stable/sys/dev/vxge/vxgehal/vxgehal-virtualpath.h (revision 4ab2e064d7950be84256d671a7ae93f87cc6aa36)
1 /*-
2  * Copyright(c) 2002-2011 Exar Corp.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification are permitted provided the following conditions are met:
7  *
8  *    1. Redistributions of source code must retain the above copyright notice,
9  *       this list of conditions and the following disclaimer.
10  *
11  *    2. Redistributions in binary form must reproduce the above copyright
12  *       notice, this list of conditions and the following disclaimer in the
13  *       documentation and/or other materials provided with the distribution.
14  *
15  *    3. Neither the name of the Exar Corporation nor the names of its
16  *       contributors may be used to endorse or promote products derived from
17  *       this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 /*$FreeBSD$*/
32 
33 #ifndef	VXGE_HAL_VIRTUALPATH_H
34 #define	VXGE_HAL_VIRTUALPATH_H
35 
36 __EXTERN_BEGIN_DECLS
37 
38 struct __hal_device_t;
39 
40 
41 /*
42  * struct __hal_virtualpath_t - Virtual Path
43  *
44  * @vp_id: Virtual path id
45  * @vp_open: This flag specifies if vxge_hal_vp_open is called from LL Driver
46  * @hldev: Hal device
47  * @vp_config: Virtual Path Config
48  * @vp_reg: VPATH Register map address in BAR0
49  * @vpmgmt_reg: VPATH_MGMT register map address
50  * @is_first_vpath: 1 if this first vpath in this vfunc, 0 otherwise
51  * @promisc_en: Promisc mode state flag.
52  * @min_bandwidth: Guaranteed Band Width in Mbps
53  * @max_bandwidth: Maximum Band Width in Mbps
54  * @max_mtu: Max mtu that can be supported
55  * @sess_grps_available: The mask of available session groups for this vpath
56  * @bmap_root_assigned: The bitmap root for this vpath
57  * @vsport_choices: The mask of vsports that are available for this vpath
58  * @vsport_number: vsport attached to this vpath
59  * @sess_grp_start: Session oid start
60  * @sess_grp_end: session oid end
61  * @max_kdfc_db: Maximum kernel mode doorbells
62  * @max_nofl_db: Maximum non offload doorbells
63  * @max_ofl_db: Maximum offload doorbells
64  * @max_msg_db: Maximum message doorbells
65  * @rxd_mem_size: Maximum RxD memory size
66  * @tx_intr_num: Interrupt Number associated with the TX
67  * @rx_intr_num: Interrupt Number associated with the RX
68  * @einta_intr_num: Interrupt Number associated with Emulated MSIX DeAssert IntA
69  * @bmap_intr_num: Interrupt Number associated with the bitmap
70  * @nce_oid_db: NCE ID database
71  * @session_oid_db: Session Object Id database
72  * @active_lros: Active LRO session list
73  * @active_lro_count: Active LRO count
74  * @free_lros: Free LRO session list
75  * @free_lro_count: Free LRO count
76  * @lro_lock: LRO session lists' lock
77  * @sqs: List of send queues
78  * @sq_lock: Lock for operations on sqs
79  * @srqs: List of SRQs
80  * @srq_lock: Lock for operations on srqs
81  * @srq_oid_db: DRQ object id database
82  * @cqrqs: CQRQs
83  * @cqrq_lock: Lock for operations on cqrqs
84  * @cqrq_oid_db: CQRQ object id database
85  * @umqh: UP Message Queue
86  * @dmqh: Down Message Queue
87  * @umq_dmq_ir: The adapter will overwrite and update this location as Messages
88  *		are read from DMQ and written into UMQ.
89  * @umq_dmq_ir_reg_entry: Reg entry of umq_dmq_ir_t
90  * @ringh: Ring Queue
91  * @fifoh: FIFO Queue
92  * @vpath_handles: Virtual Path handles list
93  * @vpath_handles_lock: Lock for operations on Virtual Path handles list
94  * @stats_block: Memory for DMAing stats
95  * @stats: Vpath statistics
96  *
97  * Virtual path structure to encapsulate the data related to a virtual path.
98  * Virtual paths are allocated by the HAL upon getting configuration from the
99  * driver and inserted into the list of virtual paths.
100  */
101 typedef struct __hal_virtualpath_t {
102 	u32				vp_id;
103 
104 	u32				vp_open;
105 #define	VXGE_HAL_VP_NOT_OPEN		0
106 #define	VXGE_HAL_VP_OPEN		1
107 
108 	struct __hal_device_t		*hldev;
109 	vxge_hal_vp_config_t		*vp_config;
110 	vxge_hal_vpath_reg_t		*vp_reg;
111 	vxge_hal_vpmgmt_reg_t		*vpmgmt_reg;
112 	__hal_non_offload_db_wrapper_t	*nofl_db;
113 	__hal_messaging_db_wrapper_t	*msg_db;
114 	u32				is_first_vpath;
115 
116 	u32				promisc_en;
117 #define	VXGE_HAL_VP_PROMISC_ENABLE	1
118 #define	VXGE_HAL_VP_PROMISC_DISABLE	0
119 
120 	u32				min_bandwidth;
121 	u32				max_bandwidth;
122 
123 	u32				max_mtu;
124 	u64				sess_grps_available;
125 	u32				bmap_root_assigned;
126 	u32				vsport_choices;
127 	u32				vsport_number;
128 	u32				sess_grp_start;
129 	u32				sess_grp_end;
130 	u32				max_kdfc_db;
131 	u32				max_nofl_db;
132 	u32				max_ofl_db;
133 	u32				max_msg_db;
134 	u32				rxd_mem_size;
135 	u32				tx_intr_num;
136 	u32				rx_intr_num;
137 	u32				einta_intr_num;
138 	u32				bmap_intr_num;
139 
140 	u64				tim_tti_cfg1_saved;
141 	u64				tim_tti_cfg3_saved;
142 	u64				tim_rti_cfg1_saved;
143 	u64				tim_rti_cfg3_saved;
144 
145 
146 	vxge_hal_ring_h			ringh;
147 	vxge_hal_fifo_h			fifoh;
148 	vxge_list_t			vpath_handles;
149 	spinlock_t			vpath_handles_lock;
150 	__hal_blockpool_entry_t		*stats_block;
151 	vxge_hal_vpath_stats_hw_info_t	*hw_stats;
152 	vxge_hal_vpath_stats_hw_info_t	*hw_stats_sav;
153 	vxge_hal_vpath_stats_sw_info_t	*sw_stats;
154 } __hal_virtualpath_t;
155 
156 /*
157  * struct __hal_vpath_handle_t - List item to store callback information
158  * @item: List head to keep the item in linked list
159  * @vpath: Virtual path to which this item belongs
160  * @cb_fn: Callback function to be called
161  * @client_handle: Client handle to be returned with the callback
162  *
163  * This structure is used to store the callback information.
164  */
165 typedef struct __hal_vpath_handle_t {
166 	vxge_list_t			item;
167 	__hal_virtualpath_t		*vpath;
168 	vxge_hal_vpath_callback_f	cb_fn;
169 	vxge_hal_client_h		client_handle;
170 } __hal_vpath_handle_t;
171 
172 
173 #define	VXGE_HAL_VIRTUAL_PATH_HANDLE(vpath)				\
174 		((vxge_hal_vpath_h)(vpath)->vpath_handles.next)
175 
176 #define	VXGE_HAL_VPATH_STATS_PIO_READ(offset) {				\
177 	status = __hal_vpath_stats_access(vpath,			\
178 			VXGE_HAL_STATS_OP_READ,				\
179 			offset,						\
180 			&val64);					\
181 	if (status != VXGE_HAL_OK) {					\
182 		vxge_hal_trace_log_stats("<== %s:%s:%d  Result: %d",	\
183 		    __FILE__, __func__, __LINE__, status);		\
184 		return (status);					\
185 	}								\
186 }
187 
188 vxge_hal_status_e
189 __hal_vpath_size_quantum_set(
190     vxge_hal_device_h devh,
191     u32 vp_id);
192 
193 vxge_hal_status_e
194 __hal_vpath_mgmt_read(
195     struct __hal_device_t *hldev,
196     __hal_virtualpath_t *vpath);
197 
198 vxge_hal_status_e
199 __hal_vpath_pci_read(
200     struct __hal_device_t *hldev,
201     u32 vp_id,
202     u32 offset,
203     u32 length,
204     void *val);
205 
206 vxge_hal_status_e
207 __hal_vpath_reset_check(
208     __hal_virtualpath_t *vpath);
209 
210 vxge_hal_status_e
211 __hal_vpath_fw_memo_get(
212     pci_dev_h pdev,
213     pci_reg_h regh0,
214     u32 vp_id,
215     vxge_hal_vpath_reg_t *vpath_reg,
216     u32 action,
217     u64 param_index,
218     u64 *data0,
219     u64 *data1);
220 
221 vxge_hal_status_e
222 __hal_vpath_fw_flash_ver_get(
223     pci_dev_h pdev,
224     pci_reg_h regh0,
225     u32 vp_id,
226     vxge_hal_vpath_reg_t *vpath_reg,
227     vxge_hal_device_version_t *fw_version,
228     vxge_hal_device_date_t *fw_date,
229     vxge_hal_device_version_t *flash_version,
230     vxge_hal_device_date_t *flash_date);
231 
232 vxge_hal_status_e
233 __hal_vpath_card_info_get(
234     pci_dev_h pdev,
235     pci_reg_h regh0,
236     u32 vp_id,
237     vxge_hal_vpath_reg_t *vpath_reg,
238     u8 *serial_number,
239     u8 *part_number,
240     u8 *product_description);
241 
242 vxge_hal_status_e
243 __hal_vpath_pmd_info_get(
244     pci_dev_h pdev,
245     pci_reg_h regh0,
246     u32 vp_id,
247     vxge_hal_vpath_reg_t *vpath_reg,
248     u32 *ports,
249     vxge_hal_device_pmd_info_t *pmd_port0,
250     vxge_hal_device_pmd_info_t *pmd_port1);
251 
252 u64
253 __hal_vpath_pci_func_mode_get(
254     pci_dev_h pdev,
255     pci_reg_h regh0,
256     u32 vp_id,
257     vxge_hal_vpath_reg_t *vpath_reg);
258 
259 vxge_hal_device_lag_mode_e
260 __hal_vpath_lag_mode_get(
261     __hal_virtualpath_t *vpath);
262 
263 u64
264 __hal_vpath_vpath_map_get(
265     pci_dev_h pdev,
266     pci_reg_h regh0,
267     u32 vp_id,
268     u32 vh,
269     u32 func,
270     vxge_hal_vpath_reg_t *vpath_reg);
271 
272 vxge_hal_status_e
273 __hal_vpath_fw_upgrade(
274     pci_dev_h pdev,
275     pci_reg_h regh0,
276     u32 vp_id,
277     vxge_hal_vpath_reg_t *vpath_reg,
278     u8 *buffer,
279     u32 length);
280 
281 vxge_hal_status_e
282 __hal_vpath_pcie_func_mode_set(
283     struct __hal_device_t *hldev,
284     u32 vp_id,
285     u32 func_mode);
286 
287 vxge_hal_status_e
288 __hal_vpath_flick_link_led(
289     struct __hal_device_t *hldev,
290     u32 vp_id,
291     u32 port,
292     u32 on_off);
293 
294 vxge_hal_status_e
295 __hal_vpath_udp_rth_set(
296     struct __hal_device_t *hldev,
297     u32 vp_id,
298     u32 on_off);
299 
300 vxge_hal_status_e
301 __hal_vpath_rts_table_get(
302     vxge_hal_vpath_h vpath_handle,
303     u32 action,
304     u32 rts_table,
305     u32 offset,
306     u64 *data1,
307     u64 *data2);
308 
309 vxge_hal_status_e
310 __hal_vpath_rts_table_set(
311     vxge_hal_vpath_h vpath_handle,
312     u32 action,
313     u32 rts_table,
314     u32 offset,
315     u64 data1,
316     u64 data2);
317 
318 
319 vxge_hal_status_e
320 __hal_vpath_hw_reset(
321     vxge_hal_device_h devh,
322     u32 vp_id);
323 
324 vxge_hal_status_e
325 __hal_vpath_sw_reset(
326     vxge_hal_device_h devh,
327     u32 vp_id);
328 
329 vxge_hal_status_e
330 __hal_vpath_prc_configure(
331     vxge_hal_device_h devh,
332     u32 vp_id);
333 
334 vxge_hal_status_e
335 __hal_vpath_kdfc_configure(
336     vxge_hal_device_h devh,
337     u32 vp_id);
338 
339 vxge_hal_status_e
340 __hal_vpath_mac_configure(
341     vxge_hal_device_h devh,
342     u32 vp_id);
343 
344 vxge_hal_status_e
345 __hal_vpath_tim_configure(
346     vxge_hal_device_h devh,
347     u32 vp_id);
348 
349 vxge_hal_status_e
350 __hal_vpath_hw_initialize(
351     vxge_hal_device_h devh,
352     u32 vp_id);
353 
354 vxge_hal_status_e
355 __hal_vp_initialize(
356     vxge_hal_device_h devh,
357     u32 vp_id,
358     vxge_hal_vp_config_t *config);
359 
360 void
361 __hal_vp_terminate(
362     vxge_hal_device_h devh,
363     u32 vp_id);
364 
365 vxge_hal_status_e
366 __hal_vpath_hw_addr_get(
367     pci_dev_h pdev,
368     pci_reg_h regh0,
369     u32 vp_id,
370     vxge_hal_vpath_reg_t *vpath_reg,
371     macaddr_t macaddr,
372     macaddr_t macaddr_mask);
373 
374 
375 vxge_hal_status_e
376 __hal_vpath_intr_enable(
377     __hal_virtualpath_t *vpath);
378 
379 vxge_hal_status_e
380 __hal_vpath_intr_disable(
381     __hal_virtualpath_t *vpath);
382 
383 vxge_hal_device_link_state_e
384 __hal_vpath_link_state_test(
385     __hal_virtualpath_t *vpath);
386 
387 vxge_hal_device_link_state_e
388 __hal_vpath_link_state_poll(
389     __hal_virtualpath_t *vpath);
390 
391 vxge_hal_device_data_rate_e
392 __hal_vpath_data_rate_poll(
393     __hal_virtualpath_t *vpath);
394 
395 vxge_hal_status_e
396 __hal_vpath_alarm_process(
397     __hal_virtualpath_t *vpath,
398     u32 skip_alarms);
399 
400 vxge_hal_status_e
401 __hal_vpath_stats_access(
402     __hal_virtualpath_t *vpath,
403     u32 operation,
404     u32 offset,
405     u64 *stat);
406 
407 vxge_hal_status_e
408 __hal_vpath_xmac_tx_stats_get(
409     __hal_virtualpath_t *vpath,
410     vxge_hal_xmac_vpath_tx_stats_t *vpath_tx_stats);
411 
412 vxge_hal_status_e
413 __hal_vpath_xmac_rx_stats_get(
414     __hal_virtualpath_t *vpath,
415     vxge_hal_xmac_vpath_rx_stats_t *vpath_rx_stats);
416 
417 
418 vxge_hal_status_e
419 __hal_vpath_hw_stats_get(
420     __hal_virtualpath_t *vpath,
421     vxge_hal_vpath_stats_hw_info_t *hw_stats);
422 
423 __EXTERN_END_DECLS
424 
425 #endif	/* VXGE_HAL_VIRTUALPATH_H */
426