| /freebsd-10-stable/contrib/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.h | 88 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
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| D | Mips16InstrInfo.cpp | 103 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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| D | MipsSEInstrInfo.cpp | 178 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| D | Thumb1InstrInfo.cpp | 53 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| D | Thumb1FrameLowering.cpp | 344 bool isKill = true; in spillCalleeSavedRegisters() local
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| D | Thumb2InstrInfo.cpp | 128 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| D | ARMLoadStoreOptimizer.cpp | 82 bool isKill; member
460 bool isKill = memOps[i].isKill || KilledRegs.count(Reg); in MergeOpsUpdate() local
1326 bool isKill = MO.isDef() ? false : MO.isKill(); in LoadStoreMultipleOpti() local
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| D | Thumb1RegisterInfo.cpp | 268 bool isKill = BaseReg != ARM::SP; in emitThumbRegPlusImmediate() local
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| /freebsd-10-stable/contrib/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 154 bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); in eliminateFrameIndex() local
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| D | XCoreInstrInfo.cpp | 367 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 108 unsigned Reg, bool isKill, int Offset) { in addRegOffset()
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| D | X86InstrInfo.cpp | 1852 unsigned &NewSrc, bool &isKill, bool &isUndef, in classifyLEAReg()
1934 bool isKill = MI->getOperand(1).isKill(); in convertToThreeAddressWithLEA() local
2121 bool isKill, isUndef; in convertToThreeAddress() local
2161 bool isKill, isUndef; in convertToThreeAddress() local
2192 bool isKill, isUndef; in convertToThreeAddress() local
2228 bool isKill, isUndef; in convertToThreeAddress() local
2297 bool isKill, isUndef; in convertToThreeAddress() local
3217 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
3233 bool isKill, in storeRegToAddr()
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| /freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 349 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| D | MachineInstrBundle.cpp | 198 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
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| D | TwoAddressInstructionPass.cpp | 862 bool isKill = MO.isKill() || in rescheduleMIBelowKill() local
996 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local
1634 bool isKill = UseMO.isKill(); in eliminateRegSequence() local
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| D | MachineInstr.cpp | 130 bool isKill, bool isDead, bool isUndef, in ChangeToRegister()
1000 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, in findRegisterUseOperandIdx()
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| /freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 471 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
507 bool isKill, in storeRegToAddr()
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 564 unsigned SrcReg, bool isKill, in StoreRegToStackSlot()
659 unsigned SrcReg, bool isKill, int FrameIdx, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | MachineOperand.h | 289 bool isKill() const { in isKill() function
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| D | LiveInterval.h | 107 bool isKill() const { in isKill() function
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| /freebsd-10-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUInstrInfo.cpp | 109 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 398 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 503 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 350 bool isKill = Op.hasOneUse() && in AddRegisterOperand() local
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