1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/bus.h>
32 #include <sys/eventhandler.h>
33 #include <sys/sysctl.h>
34 #include <sys/systm.h>
35
36 #include <dev/pci/pcivar.h>
37 #include <dev/pci/pcireg.h>
38
39 #include <machine/cpu.h>
40 #include <machine/md_var.h>
41
42 #include "vmm_util.h"
43 #include "vmm_mem.h"
44 #include "iommu.h"
45
46 SYSCTL_DECL(_hw_vmm);
47 SYSCTL_NODE(_hw_vmm, OID_AUTO, iommu, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
48 "bhyve iommu parameters");
49
50 static int iommu_avail;
51 SYSCTL_INT(_hw_vmm_iommu, OID_AUTO, initialized, CTLFLAG_RD, &iommu_avail,
52 0, "bhyve iommu initialized?");
53
54 static int iommu_enable = 1;
55 SYSCTL_INT(_hw_vmm_iommu, OID_AUTO, enable, CTLFLAG_RDTUN, &iommu_enable, 0,
56 "Enable use of I/O MMU (required for PCI passthrough).");
57
58 static const struct iommu_ops *ops;
59 static void *host_domain;
60 static eventhandler_tag add_tag, delete_tag;
61
62 static __inline int
IOMMU_INIT(void)63 IOMMU_INIT(void)
64 {
65 if (ops != NULL)
66 return ((*ops->init)());
67 else
68 return (ENXIO);
69 }
70
71 static __inline void
IOMMU_CLEANUP(void)72 IOMMU_CLEANUP(void)
73 {
74 if (ops != NULL && iommu_avail)
75 (*ops->cleanup)();
76 }
77
78 static __inline void *
IOMMU_CREATE_DOMAIN(vm_paddr_t maxaddr)79 IOMMU_CREATE_DOMAIN(vm_paddr_t maxaddr)
80 {
81
82 if (ops != NULL && iommu_avail)
83 return ((*ops->create_domain)(maxaddr));
84 else
85 return (NULL);
86 }
87
88 static __inline void
IOMMU_DESTROY_DOMAIN(void * dom)89 IOMMU_DESTROY_DOMAIN(void *dom)
90 {
91
92 if (ops != NULL && iommu_avail)
93 (*ops->destroy_domain)(dom);
94 }
95
96 static __inline uint64_t
IOMMU_CREATE_MAPPING(void * domain,vm_paddr_t gpa,vm_paddr_t hpa,uint64_t len)97 IOMMU_CREATE_MAPPING(void *domain, vm_paddr_t gpa, vm_paddr_t hpa, uint64_t len)
98 {
99
100 if (ops != NULL && iommu_avail)
101 return ((*ops->create_mapping)(domain, gpa, hpa, len));
102 else
103 return (len); /* XXX */
104 }
105
106 static __inline uint64_t
IOMMU_REMOVE_MAPPING(void * domain,vm_paddr_t gpa,uint64_t len)107 IOMMU_REMOVE_MAPPING(void *domain, vm_paddr_t gpa, uint64_t len)
108 {
109
110 if (ops != NULL && iommu_avail)
111 return ((*ops->remove_mapping)(domain, gpa, len));
112 else
113 return (len); /* XXX */
114 }
115
116 static __inline void
IOMMU_ADD_DEVICE(void * domain,uint16_t rid)117 IOMMU_ADD_DEVICE(void *domain, uint16_t rid)
118 {
119
120 if (ops != NULL && iommu_avail)
121 (*ops->add_device)(domain, rid);
122 }
123
124 static __inline void
IOMMU_REMOVE_DEVICE(void * domain,uint16_t rid)125 IOMMU_REMOVE_DEVICE(void *domain, uint16_t rid)
126 {
127
128 if (ops != NULL && iommu_avail)
129 (*ops->remove_device)(domain, rid);
130 }
131
132 static __inline void
IOMMU_INVALIDATE_TLB(void * domain)133 IOMMU_INVALIDATE_TLB(void *domain)
134 {
135
136 if (ops != NULL && iommu_avail)
137 (*ops->invalidate_tlb)(domain);
138 }
139
140 static __inline void
IOMMU_ENABLE(void)141 IOMMU_ENABLE(void)
142 {
143
144 if (ops != NULL && iommu_avail)
145 (*ops->enable)();
146 }
147
148 static __inline void
IOMMU_DISABLE(void)149 IOMMU_DISABLE(void)
150 {
151
152 if (ops != NULL && iommu_avail)
153 (*ops->disable)();
154 }
155
156 static void
iommu_pci_add(void * arg,device_t dev)157 iommu_pci_add(void *arg, device_t dev)
158 {
159
160 /* Add new devices to the host domain. */
161 iommu_add_device(host_domain, pci_get_rid(dev));
162 }
163
164 static void
iommu_pci_delete(void * arg,device_t dev)165 iommu_pci_delete(void *arg, device_t dev)
166 {
167
168 iommu_remove_device(host_domain, pci_get_rid(dev));
169 }
170
171 static void
iommu_init(void)172 iommu_init(void)
173 {
174 int error, bus, slot, func;
175 vm_paddr_t maxaddr;
176 devclass_t dc;
177 device_t dev;
178
179 if (!iommu_enable)
180 return;
181
182 if (vmm_is_intel())
183 ops = &iommu_ops_intel;
184 else if (vmm_is_svm())
185 ops = &iommu_ops_amd;
186 else
187 ops = NULL;
188
189 error = IOMMU_INIT();
190 if (error)
191 return;
192
193 iommu_avail = 1;
194
195 /*
196 * Create a domain for the devices owned by the host
197 */
198 maxaddr = vmm_mem_maxaddr();
199 host_domain = IOMMU_CREATE_DOMAIN(maxaddr);
200 if (host_domain == NULL) {
201 printf("iommu_init: unable to create a host domain");
202 IOMMU_CLEANUP();
203 ops = NULL;
204 iommu_avail = 0;
205 return;
206 }
207
208 /*
209 * Create 1:1 mappings from '0' to 'maxaddr' for devices assigned to
210 * the host
211 */
212 iommu_create_mapping(host_domain, 0, 0, maxaddr);
213
214 add_tag = EVENTHANDLER_REGISTER(pci_add_device, iommu_pci_add, NULL, 0);
215 delete_tag = EVENTHANDLER_REGISTER(pci_delete_device, iommu_pci_delete,
216 NULL, 0);
217 dc = devclass_find("ppt");
218 for (bus = 0; bus <= PCI_BUSMAX; bus++) {
219 for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
220 for (func = 0; func <= PCI_FUNCMAX; func++) {
221 dev = pci_find_dbsf(0, bus, slot, func);
222 if (dev == NULL)
223 continue;
224
225 /* Skip passthrough devices. */
226 if (dc != NULL &&
227 device_get_devclass(dev) == dc)
228 continue;
229
230 /*
231 * Everything else belongs to the host
232 * domain.
233 */
234 iommu_add_device(host_domain,
235 pci_get_rid(dev));
236 }
237 }
238 }
239 IOMMU_ENABLE();
240
241 }
242
243 void
iommu_cleanup(void)244 iommu_cleanup(void)
245 {
246
247 if (add_tag != NULL) {
248 EVENTHANDLER_DEREGISTER(pci_add_device, add_tag);
249 add_tag = NULL;
250 }
251 if (delete_tag != NULL) {
252 EVENTHANDLER_DEREGISTER(pci_delete_device, delete_tag);
253 delete_tag = NULL;
254 }
255 IOMMU_DISABLE();
256 IOMMU_DESTROY_DOMAIN(host_domain);
257 IOMMU_CLEANUP();
258 }
259
260 void *
iommu_create_domain(vm_paddr_t maxaddr)261 iommu_create_domain(vm_paddr_t maxaddr)
262 {
263 static volatile int iommu_initted;
264
265 if (iommu_initted < 2) {
266 if (atomic_cmpset_int(&iommu_initted, 0, 1)) {
267 iommu_init();
268 atomic_store_rel_int(&iommu_initted, 2);
269 } else
270 while (iommu_initted == 1)
271 cpu_spinwait();
272 }
273 return (IOMMU_CREATE_DOMAIN(maxaddr));
274 }
275
276 void
iommu_destroy_domain(void * dom)277 iommu_destroy_domain(void *dom)
278 {
279
280 IOMMU_DESTROY_DOMAIN(dom);
281 }
282
283 void
iommu_create_mapping(void * dom,vm_paddr_t gpa,vm_paddr_t hpa,size_t len)284 iommu_create_mapping(void *dom, vm_paddr_t gpa, vm_paddr_t hpa, size_t len)
285 {
286 uint64_t mapped, remaining;
287
288 remaining = len;
289
290 while (remaining > 0) {
291 mapped = IOMMU_CREATE_MAPPING(dom, gpa, hpa, remaining);
292 gpa += mapped;
293 hpa += mapped;
294 remaining -= mapped;
295 }
296 }
297
298 void
iommu_remove_mapping(void * dom,vm_paddr_t gpa,size_t len)299 iommu_remove_mapping(void *dom, vm_paddr_t gpa, size_t len)
300 {
301 uint64_t unmapped, remaining;
302
303 remaining = len;
304
305 while (remaining > 0) {
306 unmapped = IOMMU_REMOVE_MAPPING(dom, gpa, remaining);
307 gpa += unmapped;
308 remaining -= unmapped;
309 }
310 }
311
312 void *
iommu_host_domain(void)313 iommu_host_domain(void)
314 {
315
316 return (host_domain);
317 }
318
319 void
iommu_add_device(void * dom,uint16_t rid)320 iommu_add_device(void *dom, uint16_t rid)
321 {
322
323 IOMMU_ADD_DEVICE(dom, rid);
324 }
325
326 void
iommu_remove_device(void * dom,uint16_t rid)327 iommu_remove_device(void *dom, uint16_t rid)
328 {
329
330 IOMMU_REMOVE_DEVICE(dom, rid);
331 }
332
333 void
iommu_invalidate_tlb(void * domain)334 iommu_invalidate_tlb(void *domain)
335 {
336
337 IOMMU_INVALIDATE_TLB(domain);
338 }
339