1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2019 Intel Corporation
4 */
5
6 #include <linux/list.h>
7 #include <linux/list_sort.h>
8 #include <linux/llist.h>
9
10 #include "i915_drv.h"
11 #include "intel_engine.h"
12 #include "intel_engine_user.h"
13 #include "intel_gt.h"
14 #include "uc/intel_guc_submission.h"
15
16 struct intel_engine_cs *
intel_engine_lookup_user(struct drm_i915_private * i915,u8 class,u8 instance)17 intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance)
18 {
19 struct rb_node *p = i915->uabi_engines.rb_node;
20
21 while (p) {
22 struct intel_engine_cs *it =
23 rb_entry(p, typeof(*it), uabi_node);
24
25 if (class < it->uabi_class)
26 p = p->rb_left;
27 else if (class > it->uabi_class ||
28 instance > it->uabi_instance)
29 p = p->rb_right;
30 else if (instance < it->uabi_instance)
31 p = p->rb_left;
32 else
33 return it;
34 }
35
36 return NULL;
37 }
38
intel_engine_add_user(struct intel_engine_cs * engine)39 void intel_engine_add_user(struct intel_engine_cs *engine)
40 {
41 llist_add(&engine->uabi_llist, &engine->i915->uabi_engines_llist);
42 }
43
44 #define I915_NO_UABI_CLASS ((u16)(-1))
45
46 static const u16 uabi_classes[] = {
47 [RENDER_CLASS] = I915_ENGINE_CLASS_RENDER,
48 [COPY_ENGINE_CLASS] = I915_ENGINE_CLASS_COPY,
49 [VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
50 [VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
51 [COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
52 [OTHER_CLASS] = I915_NO_UABI_CLASS, /* Not exposed to users, no uabi class. */
53 };
54
engine_cmp(void * priv,const struct list_head * A,const struct list_head * B)55 static int engine_cmp(void *priv, const struct list_head *A,
56 const struct list_head *B)
57 {
58 const struct intel_engine_cs *a =
59 container_of(A, typeof(*a), uabi_list);
60 const struct intel_engine_cs *b =
61 container_of(B, typeof(*b), uabi_list);
62
63 if (uabi_classes[a->class] < uabi_classes[b->class])
64 return -1;
65 if (uabi_classes[a->class] > uabi_classes[b->class])
66 return 1;
67
68 if (a->instance < b->instance)
69 return -1;
70 if (a->instance > b->instance)
71 return 1;
72
73 return 0;
74 }
75
get_engines(struct drm_i915_private * i915)76 static struct llist_node *get_engines(struct drm_i915_private *i915)
77 {
78 return llist_del_all(&i915->uabi_engines_llist);
79 }
80
sort_engines(struct drm_i915_private * i915,struct list_head * engines)81 static void sort_engines(struct drm_i915_private *i915,
82 struct list_head *engines)
83 {
84 struct llist_node *pos, *next;
85
86 llist_for_each_safe(pos, next, get_engines(i915)) {
87 struct intel_engine_cs *engine =
88 container_of(pos, typeof(*engine), uabi_llist);
89 list_add(&engine->uabi_list, engines);
90 }
91 list_sort(NULL, engines, engine_cmp);
92 }
93
94 #ifdef __linux__
set_scheduler_caps(struct drm_i915_private * i915)95 static void set_scheduler_caps(struct drm_i915_private *i915)
96 {
97 static const struct {
98 u8 engine;
99 u8 sched;
100 } map[] = {
101 #define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) }
102 MAP(HAS_PREEMPTION, PREEMPTION),
103 MAP(HAS_SEMAPHORES, SEMAPHORES),
104 MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
105 #undef MAP
106 };
107 struct intel_engine_cs *engine;
108 u32 enabled, disabled;
109
110 enabled = 0;
111 disabled = 0;
112 for_each_uabi_engine(engine, i915) { /* all engines must agree! */
113 int i;
114
115 if (engine->sched_engine->schedule)
116 enabled |= (I915_SCHEDULER_CAP_ENABLED |
117 I915_SCHEDULER_CAP_PRIORITY);
118 else
119 disabled |= (I915_SCHEDULER_CAP_ENABLED |
120 I915_SCHEDULER_CAP_PRIORITY);
121
122 if (intel_uc_uses_guc_submission(&engine->gt->uc))
123 enabled |= I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP;
124
125 for (i = 0; i < ARRAY_SIZE(map); i++) {
126 if (engine->flags & BIT(map[i].engine))
127 enabled |= BIT(map[i].sched);
128 else
129 disabled |= BIT(map[i].sched);
130 }
131 }
132
133 i915->caps.scheduler = enabled & ~disabled;
134 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED))
135 i915->caps.scheduler = 0;
136 }
137 #else
138 /* without the pointless ilog2 -> BIT() */
set_scheduler_caps(struct drm_i915_private * i915)139 static void set_scheduler_caps(struct drm_i915_private *i915)
140 {
141 static const struct {
142 u8 engine;
143 u8 sched;
144 } map[] = {
145 #define MAP(x, y) { I915_ENGINE_##x, I915_SCHEDULER_CAP_##y }
146 MAP(HAS_PREEMPTION, PREEMPTION),
147 MAP(HAS_SEMAPHORES, SEMAPHORES),
148 MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
149 #undef MAP
150 };
151 struct intel_engine_cs *engine;
152 u32 enabled, disabled;
153
154 enabled = 0;
155 disabled = 0;
156 for_each_uabi_engine(engine, i915) { /* all engines must agree! */
157 int i;
158
159 if (engine->sched_engine->schedule)
160 enabled |= (I915_SCHEDULER_CAP_ENABLED |
161 I915_SCHEDULER_CAP_PRIORITY);
162 else
163 disabled |= (I915_SCHEDULER_CAP_ENABLED |
164 I915_SCHEDULER_CAP_PRIORITY);
165
166 if (intel_uc_uses_guc_submission(&engine->gt->uc))
167 enabled |= I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP;
168
169 for (i = 0; i < ARRAY_SIZE(map); i++) {
170 if (engine->flags & map[i].engine)
171 enabled |= map[i].sched;
172 else
173 disabled |= map[i].sched;
174 }
175 }
176
177 i915->caps.scheduler = enabled & ~disabled;
178 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_ENABLED))
179 i915->caps.scheduler = 0;
180 }
181 #endif
182
intel_engine_class_repr(u8 class)183 const char *intel_engine_class_repr(u8 class)
184 {
185 static const char * const uabi_names[] = {
186 [RENDER_CLASS] = "rcs",
187 [COPY_ENGINE_CLASS] = "bcs",
188 [VIDEO_DECODE_CLASS] = "vcs",
189 [VIDEO_ENHANCEMENT_CLASS] = "vecs",
190 [OTHER_CLASS] = "other",
191 [COMPUTE_CLASS] = "ccs",
192 };
193
194 if (class >= ARRAY_SIZE(uabi_names) || !uabi_names[class])
195 return "xxx";
196
197 return uabi_names[class];
198 }
199
200 struct legacy_ring {
201 struct intel_gt *gt;
202 u8 class;
203 u8 instance;
204 };
205
legacy_ring_idx(const struct legacy_ring * ring)206 static int legacy_ring_idx(const struct legacy_ring *ring)
207 {
208 static const struct {
209 u8 base, max;
210 } map[] = {
211 [RENDER_CLASS] = { RCS0, 1 },
212 [COPY_ENGINE_CLASS] = { BCS0, 1 },
213 [VIDEO_DECODE_CLASS] = { VCS0, I915_MAX_VCS },
214 [VIDEO_ENHANCEMENT_CLASS] = { VECS0, I915_MAX_VECS },
215 [COMPUTE_CLASS] = { CCS0, I915_MAX_CCS },
216 };
217
218 if (GEM_DEBUG_WARN_ON(ring->class >= ARRAY_SIZE(map)))
219 return INVALID_ENGINE;
220
221 if (GEM_DEBUG_WARN_ON(ring->instance >= map[ring->class].max))
222 return INVALID_ENGINE;
223
224 return map[ring->class].base + ring->instance;
225 }
226
add_legacy_ring(struct legacy_ring * ring,struct intel_engine_cs * engine)227 static void add_legacy_ring(struct legacy_ring *ring,
228 struct intel_engine_cs *engine)
229 {
230 if (engine->gt != ring->gt || engine->class != ring->class) {
231 ring->gt = engine->gt;
232 ring->class = engine->class;
233 ring->instance = 0;
234 }
235
236 engine->legacy_idx = legacy_ring_idx(ring);
237 if (engine->legacy_idx != INVALID_ENGINE)
238 ring->instance++;
239 }
240
engine_rename(struct intel_engine_cs * engine,const char * name,u16 instance)241 static void engine_rename(struct intel_engine_cs *engine, const char *name, u16 instance)
242 {
243 char old[sizeof(engine->name)];
244
245 memcpy(old, engine->name, sizeof(engine->name));
246 scnprintf(engine->name, sizeof(engine->name), "%s%u", name, instance);
247 drm_dbg(&engine->i915->drm, "renamed %s to %s\n", old, engine->name);
248 }
249
intel_engines_driver_register(struct drm_i915_private * i915)250 void intel_engines_driver_register(struct drm_i915_private *i915)
251 {
252 u16 name_instance, other_instance = 0;
253 struct legacy_ring ring = {};
254 struct list_head *it, *next;
255 struct rb_node **p, *prev;
256 DRM_LIST_HEAD(engines);
257
258 sort_engines(i915, &engines);
259
260 prev = NULL;
261 p = &i915->uabi_engines.rb_node;
262 list_for_each_safe(it, next, &engines) {
263 struct intel_engine_cs *engine =
264 container_of(it, typeof(*engine), uabi_list);
265
266 if (intel_gt_has_unrecoverable_error(engine->gt))
267 continue; /* ignore incomplete engines */
268
269 GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
270 engine->uabi_class = uabi_classes[engine->class];
271 if (engine->uabi_class == I915_NO_UABI_CLASS) {
272 name_instance = other_instance++;
273 } else {
274 GEM_BUG_ON(engine->uabi_class >=
275 ARRAY_SIZE(i915->engine_uabi_class_count));
276 name_instance =
277 i915->engine_uabi_class_count[engine->uabi_class]++;
278 }
279 engine->uabi_instance = name_instance;
280
281 /*
282 * Replace the internal name with the final user and log facing
283 * name.
284 */
285 engine_rename(engine,
286 intel_engine_class_repr(engine->class),
287 name_instance);
288
289 if (engine->uabi_class == I915_NO_UABI_CLASS)
290 continue;
291
292 rb_link_node(&engine->uabi_node, prev, p);
293 rb_insert_color(&engine->uabi_node, &i915->uabi_engines);
294
295 GEM_BUG_ON(intel_engine_lookup_user(i915,
296 engine->uabi_class,
297 engine->uabi_instance) != engine);
298
299 /* Fix up the mapping to match default execbuf::user_map[] */
300 add_legacy_ring(&ring, engine);
301
302 prev = &engine->uabi_node;
303 p = &prev->rb_right;
304 }
305
306 if (IS_ENABLED(CONFIG_DRM_I915_SELFTESTS) &&
307 IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) {
308 struct intel_engine_cs *engine;
309 unsigned int isolation;
310 int class, inst;
311 int errors = 0;
312
313 for (class = 0; class < ARRAY_SIZE(i915->engine_uabi_class_count); class++) {
314 for (inst = 0; inst < i915->engine_uabi_class_count[class]; inst++) {
315 engine = intel_engine_lookup_user(i915,
316 class, inst);
317 if (!engine) {
318 pr_err("UABI engine not found for { class:%d, instance:%d }\n",
319 class, inst);
320 errors++;
321 continue;
322 }
323
324 if (engine->uabi_class != class ||
325 engine->uabi_instance != inst) {
326 pr_err("Wrong UABI engine:%s { class:%d, instance:%d } found for { class:%d, instance:%d }\n",
327 engine->name,
328 engine->uabi_class,
329 engine->uabi_instance,
330 class, inst);
331 errors++;
332 continue;
333 }
334 }
335 }
336
337 /*
338 * Make sure that classes with multiple engine instances all
339 * share the same basic configuration.
340 */
341 isolation = intel_engines_has_context_isolation(i915);
342 for_each_uabi_engine(engine, i915) {
343 unsigned int bit = BIT(engine->uabi_class);
344 unsigned int expected = engine->default_state ? bit : 0;
345
346 if ((isolation & bit) != expected) {
347 pr_err("mismatching default context state for class %d on engine %s\n",
348 engine->uabi_class, engine->name);
349 errors++;
350 }
351 }
352
353 if (drm_WARN(&i915->drm, errors,
354 "Invalid UABI engine mapping found"))
355 i915->uabi_engines = RB_ROOT;
356 }
357
358 set_scheduler_caps(i915);
359 }
360
intel_engines_has_context_isolation(struct drm_i915_private * i915)361 unsigned int intel_engines_has_context_isolation(struct drm_i915_private *i915)
362 {
363 struct intel_engine_cs *engine;
364 unsigned int which;
365
366 which = 0;
367 for_each_uabi_engine(engine, i915)
368 if (engine->default_state)
369 which |= BIT(engine->uabi_class);
370
371 return which;
372 }
373