1 //===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "HexagonMCInstrInfo.h"
15
16 #include "Hexagon.h"
17 #include "HexagonBaseInfo.h"
18
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCInstrInfo.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22
23 namespace llvm {
24 iterator_range<MCInst::const_iterator>
bundleInstructions(MCInst const & MCI)25 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
26 assert(isBundle(MCI));
27 return iterator_range<MCInst::const_iterator>(
28 MCI.begin() + bundleInstructionsOffset, MCI.end());
29 }
30
bundleSize(MCInst const & MCI)31 size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
32 if (HexagonMCInstrInfo::isBundle(MCI))
33 return (MCI.size() - bundleInstructionsOffset);
34 else
35 return (1);
36 }
37
clampExtended(MCInstrInfo const & MCII,MCInst & MCI)38 void HexagonMCInstrInfo::clampExtended(MCInstrInfo const &MCII, MCInst &MCI) {
39 assert(HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
40 HexagonMCInstrInfo::isExtended(MCII, MCI));
41 MCOperand &exOp =
42 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
43 // If the extended value is a constant, then use it for the extended and
44 // for the extender instructions, masking off the lower 6 bits and
45 // including the assumed bits.
46 if (exOp.isImm()) {
47 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MCI);
48 int64_t Bits = exOp.getImm();
49 exOp.setImm((Bits & 0x3f) << Shift);
50 }
51 }
52
deriveDuplex(MCContext & Context,unsigned iClass,MCInst const & inst0,MCInst const & inst1)53 MCInst *HexagonMCInstrInfo::deriveDuplex(MCContext &Context, unsigned iClass,
54 MCInst const &inst0,
55 MCInst const &inst1) {
56 assert((iClass <= 0xf) && "iClass must have range of 0 to 0xf");
57 MCInst *duplexInst = new (Context) MCInst;
58 duplexInst->setOpcode(Hexagon::DuplexIClass0 + iClass);
59
60 MCInst *SubInst0 = new (Context) MCInst(deriveSubInst(inst0));
61 MCInst *SubInst1 = new (Context) MCInst(deriveSubInst(inst1));
62 duplexInst->addOperand(MCOperand::createInst(SubInst0));
63 duplexInst->addOperand(MCOperand::createInst(SubInst1));
64 return duplexInst;
65 }
66
extenderForIndex(MCInst const & MCB,size_t Index)67 MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB,
68 size_t Index) {
69 assert(Index <= bundleSize(MCB));
70 if (Index == 0)
71 return nullptr;
72 MCInst const *Inst =
73 MCB.getOperand(Index + bundleInstructionsOffset - 1).getInst();
74 if (isImmext(*Inst))
75 return Inst;
76 return nullptr;
77 }
78
79 HexagonII::MemAccessSize
getAccessSize(MCInstrInfo const & MCII,MCInst const & MCI)80 HexagonMCInstrInfo::getAccessSize(MCInstrInfo const &MCII, MCInst const &MCI) {
81 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
82
83 return (HexagonII::MemAccessSize((F >> HexagonII::MemAccessSizePos) &
84 HexagonII::MemAccesSizeMask));
85 }
86
getBitCount(MCInstrInfo const & MCII,MCInst const & MCI)87 unsigned HexagonMCInstrInfo::getBitCount(MCInstrInfo const &MCII,
88 MCInst const &MCI) {
89 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
90 return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
91 }
92
93 // Return constant extended operand number.
getCExtOpNum(MCInstrInfo const & MCII,MCInst const & MCI)94 unsigned short HexagonMCInstrInfo::getCExtOpNum(MCInstrInfo const &MCII,
95 MCInst const &MCI) {
96 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
97 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
98 }
99
getDesc(MCInstrInfo const & MCII,MCInst const & MCI)100 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
101 MCInst const &MCI) {
102 return (MCII.get(MCI.getOpcode()));
103 }
104
getExtendableOp(MCInstrInfo const & MCII,MCInst const & MCI)105 unsigned short HexagonMCInstrInfo::getExtendableOp(MCInstrInfo const &MCII,
106 MCInst const &MCI) {
107 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
108 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
109 }
110
111 MCOperand const &
getExtendableOperand(MCInstrInfo const & MCII,MCInst const & MCI)112 HexagonMCInstrInfo::getExtendableOperand(MCInstrInfo const &MCII,
113 MCInst const &MCI) {
114 unsigned O = HexagonMCInstrInfo::getExtendableOp(MCII, MCI);
115 MCOperand const &MO = MCI.getOperand(O);
116
117 assert((HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
118 HexagonMCInstrInfo::isExtended(MCII, MCI)) &&
119 (MO.isImm() || MO.isExpr()));
120 return (MO);
121 }
122
getExtentAlignment(MCInstrInfo const & MCII,MCInst const & MCI)123 unsigned HexagonMCInstrInfo::getExtentAlignment(MCInstrInfo const &MCII,
124 MCInst const &MCI) {
125 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
126 return ((F >> HexagonII::ExtentAlignPos) & HexagonII::ExtentAlignMask);
127 }
128
getExtentBits(MCInstrInfo const & MCII,MCInst const & MCI)129 unsigned HexagonMCInstrInfo::getExtentBits(MCInstrInfo const &MCII,
130 MCInst const &MCI) {
131 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
132 return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
133 }
134
135 // Return the max value that a constant extendable operand can have
136 // without being extended.
getMaxValue(MCInstrInfo const & MCII,MCInst const & MCI)137 int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
138 MCInst const &MCI) {
139 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
140 unsigned isSigned =
141 (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
142 unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
143
144 if (isSigned) // if value is signed
145 return ~(-1U << (bits - 1));
146 else
147 return ~(-1U << bits);
148 }
149
150 // Return the min value that a constant extendable operand can have
151 // without being extended.
getMinValue(MCInstrInfo const & MCII,MCInst const & MCI)152 int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
153 MCInst const &MCI) {
154 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
155 unsigned isSigned =
156 (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
157 unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
158
159 if (isSigned) // if value is signed
160 return -1U << (bits - 1);
161 else
162 return 0;
163 }
164
getName(MCInstrInfo const & MCII,MCInst const & MCI)165 char const *HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
166 MCInst const &MCI) {
167 return MCII.getName(MCI.getOpcode());
168 }
169
getNewValueOp(MCInstrInfo const & MCII,MCInst const & MCI)170 unsigned short HexagonMCInstrInfo::getNewValueOp(MCInstrInfo const &MCII,
171 MCInst const &MCI) {
172 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
173 return ((F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask);
174 }
175
getNewValueOperand(MCInstrInfo const & MCII,MCInst const & MCI)176 MCOperand const &HexagonMCInstrInfo::getNewValueOperand(MCInstrInfo const &MCII,
177 MCInst const &MCI) {
178 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
179 unsigned const O =
180 (F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
181 MCOperand const &MCO = MCI.getOperand(O);
182
183 assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
184 HexagonMCInstrInfo::hasNewValue(MCII, MCI)) &&
185 MCO.isReg());
186 return (MCO);
187 }
188
getSubTarget(MCInstrInfo const & MCII,MCInst const & MCI)189 int HexagonMCInstrInfo::getSubTarget(MCInstrInfo const &MCII,
190 MCInst const &MCI) {
191 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
192
193 HexagonII::SubTarget Target = static_cast<HexagonII::SubTarget>(
194 (F >> HexagonII::validSubTargetPos) & HexagonII::validSubTargetMask);
195
196 switch (Target) {
197 default:
198 return Hexagon::ArchV4;
199 case HexagonII::HasV5SubT:
200 return Hexagon::ArchV5;
201 }
202 }
203
204 // Return the Hexagon ISA class for the insn.
getType(MCInstrInfo const & MCII,MCInst const & MCI)205 unsigned HexagonMCInstrInfo::getType(MCInstrInfo const &MCII,
206 MCInst const &MCI) {
207 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
208
209 return ((F >> HexagonII::TypePos) & HexagonII::TypeMask);
210 }
211
getUnits(MCInstrInfo const & MCII,MCSubtargetInfo const & STI,MCInst const & MCI)212 unsigned HexagonMCInstrInfo::getUnits(MCInstrInfo const &MCII,
213 MCSubtargetInfo const &STI,
214 MCInst const &MCI) {
215
216 const InstrItinerary *II = STI.getSchedModel().InstrItineraries;
217 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
218 return ((II[SchedClass].FirstStage + HexagonStages)->getUnits());
219 }
220
hasImmExt(MCInst const & MCI)221 bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) {
222 if (!HexagonMCInstrInfo::isBundle(MCI))
223 return false;
224
225 for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
226 auto MI = I.getInst();
227 if (isImmext(*MI))
228 return true;
229 }
230
231 return false;
232 }
233
hasExtenderForIndex(MCInst const & MCB,size_t Index)234 bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) {
235 return extenderForIndex(MCB, Index) != nullptr;
236 }
237
238 // Return whether the instruction is a legal new-value producer.
hasNewValue(MCInstrInfo const & MCII,MCInst const & MCI)239 bool HexagonMCInstrInfo::hasNewValue(MCInstrInfo const &MCII,
240 MCInst const &MCI) {
241 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
242 return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask);
243 }
244
instruction(MCInst const & MCB,size_t Index)245 MCInst const &HexagonMCInstrInfo::instruction(MCInst const &MCB, size_t Index) {
246 assert(isBundle(MCB));
247 assert(Index < HEXAGON_PACKET_SIZE);
248 return *MCB.getOperand(bundleInstructionsOffset + Index).getInst();
249 }
250
isBundle(MCInst const & MCI)251 bool HexagonMCInstrInfo::isBundle(MCInst const &MCI) {
252 auto Result = Hexagon::BUNDLE == MCI.getOpcode();
253 assert(!Result || (MCI.size() > 0 && MCI.getOperand(0).isImm()));
254 return Result;
255 }
256
257 // Return whether the insn is an actual insn.
isCanon(MCInstrInfo const & MCII,MCInst const & MCI)258 bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) {
259 return (!HexagonMCInstrInfo::getDesc(MCII, MCI).isPseudo() &&
260 !HexagonMCInstrInfo::isPrefix(MCII, MCI) &&
261 HexagonMCInstrInfo::getType(MCII, MCI) != HexagonII::TypeENDLOOP);
262 }
263
isDblRegForSubInst(unsigned Reg)264 bool HexagonMCInstrInfo::isDblRegForSubInst(unsigned Reg) {
265 return ((Reg >= Hexagon::D0 && Reg <= Hexagon::D3) ||
266 (Reg >= Hexagon::D8 && Reg <= Hexagon::D11));
267 }
268
isDuplex(MCInstrInfo const & MCII,MCInst const & MCI)269 bool HexagonMCInstrInfo::isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) {
270 return HexagonII::TypeDUPLEX == HexagonMCInstrInfo::getType(MCII, MCI);
271 }
272
273 // Return whether the instruction needs to be constant extended.
274 // 1) Always return true if the instruction has 'isExtended' flag set.
275 //
276 // isExtendable:
277 // 2) For immediate extended operands, return true only if the value is
278 // out-of-range.
279 // 3) For global address, always return true.
280
isConstExtended(MCInstrInfo const & MCII,MCInst const & MCI)281 bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII,
282 MCInst const &MCI) {
283 if (HexagonMCInstrInfo::isExtended(MCII, MCI))
284 return true;
285
286 if (!HexagonMCInstrInfo::isExtendable(MCII, MCI))
287 return false;
288
289 short ExtOpNum = HexagonMCInstrInfo::getCExtOpNum(MCII, MCI);
290 int MinValue = HexagonMCInstrInfo::getMinValue(MCII, MCI);
291 int MaxValue = HexagonMCInstrInfo::getMaxValue(MCII, MCI);
292 MCOperand const &MO = MCI.getOperand(ExtOpNum);
293
294 // We could be using an instruction with an extendable immediate and shoehorn
295 // a global address into it. If it is a global address it will be constant
296 // extended. We do this for COMBINE.
297 // We currently only handle isGlobal() because it is the only kind of
298 // object we are going to end up with here for now.
299 // In the future we probably should add isSymbol(), etc.
300 if (MO.isExpr())
301 return true;
302
303 // If the extendable operand is not 'Immediate' type, the instruction should
304 // have 'isExtended' flag set.
305 assert(MO.isImm() && "Extendable operand must be Immediate type");
306
307 int ImmValue = MO.getImm();
308 return (ImmValue < MinValue || ImmValue > MaxValue);
309 }
310
isExtendable(MCInstrInfo const & MCII,MCInst const & MCI)311 bool HexagonMCInstrInfo::isExtendable(MCInstrInfo const &MCII,
312 MCInst const &MCI) {
313 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
314 return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
315 }
316
isExtended(MCInstrInfo const & MCII,MCInst const & MCI)317 bool HexagonMCInstrInfo::isExtended(MCInstrInfo const &MCII,
318 MCInst const &MCI) {
319 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
320 return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
321 }
322
isFloat(MCInstrInfo const & MCII,MCInst const & MCI)323 bool HexagonMCInstrInfo::isFloat(MCInstrInfo const &MCII, MCInst const &MCI) {
324 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
325 return ((F >> HexagonII::FPPos) & HexagonII::FPMask);
326 }
327
isImmext(MCInst const & MCI)328 bool HexagonMCInstrInfo::isImmext(MCInst const &MCI) {
329 auto Op = MCI.getOpcode();
330 return (Op == Hexagon::A4_ext_b || Op == Hexagon::A4_ext_c ||
331 Op == Hexagon::A4_ext_g || Op == Hexagon::A4_ext);
332 }
333
isInnerLoop(MCInst const & MCI)334 bool HexagonMCInstrInfo::isInnerLoop(MCInst const &MCI) {
335 assert(isBundle(MCI));
336 int64_t Flags = MCI.getOperand(0).getImm();
337 return (Flags & innerLoopMask) != 0;
338 }
339
isIntReg(unsigned Reg)340 bool HexagonMCInstrInfo::isIntReg(unsigned Reg) {
341 return (Reg >= Hexagon::R0 && Reg <= Hexagon::R31);
342 }
343
isIntRegForSubInst(unsigned Reg)344 bool HexagonMCInstrInfo::isIntRegForSubInst(unsigned Reg) {
345 return ((Reg >= Hexagon::R0 && Reg <= Hexagon::R7) ||
346 (Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
347 }
348
349 // Return whether the insn is a new-value consumer.
isNewValue(MCInstrInfo const & MCII,MCInst const & MCI)350 bool HexagonMCInstrInfo::isNewValue(MCInstrInfo const &MCII,
351 MCInst const &MCI) {
352 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
353 return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask);
354 }
355
356 // Return whether the operand can be constant extended.
isOperandExtended(MCInstrInfo const & MCII,MCInst const & MCI,unsigned short OperandNum)357 bool HexagonMCInstrInfo::isOperandExtended(MCInstrInfo const &MCII,
358 MCInst const &MCI,
359 unsigned short OperandNum) {
360 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
361 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
362 OperandNum;
363 }
364
isOuterLoop(MCInst const & MCI)365 bool HexagonMCInstrInfo::isOuterLoop(MCInst const &MCI) {
366 assert(isBundle(MCI));
367 int64_t Flags = MCI.getOperand(0).getImm();
368 return (Flags & outerLoopMask) != 0;
369 }
370
isPredicated(MCInstrInfo const & MCII,MCInst const & MCI)371 bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII,
372 MCInst const &MCI) {
373 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
374 return ((F >> HexagonII::PredicatedPos) & HexagonII::PredicatedMask);
375 }
376
isPredicatedTrue(MCInstrInfo const & MCII,MCInst const & MCI)377 bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII,
378 MCInst const &MCI) {
379 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
380 return (
381 !((F >> HexagonII::PredicatedFalsePos) & HexagonII::PredicatedFalseMask));
382 }
383
isPredReg(unsigned Reg)384 bool HexagonMCInstrInfo::isPredReg(unsigned Reg) {
385 return (Reg >= Hexagon::P0 && Reg <= Hexagon::P3_0);
386 }
387
isPrefix(MCInstrInfo const & MCII,MCInst const & MCI)388 bool HexagonMCInstrInfo::isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) {
389 return (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypePREFIX);
390 }
391
isSolo(MCInstrInfo const & MCII,MCInst const & MCI)392 bool HexagonMCInstrInfo::isSolo(MCInstrInfo const &MCII, MCInst const &MCI) {
393 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
394 return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask);
395 }
396
isSoloAX(MCInstrInfo const & MCII,MCInst const & MCI)397 bool HexagonMCInstrInfo::isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) {
398 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
399 return ((F >> HexagonII::SoloAXPos) & HexagonII::SoloAXMask);
400 }
401
isSoloAin1(MCInstrInfo const & MCII,MCInst const & MCI)402 bool HexagonMCInstrInfo::isSoloAin1(MCInstrInfo const &MCII,
403 MCInst const &MCI) {
404 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
405 return ((F >> HexagonII::SoloAin1Pos) & HexagonII::SoloAin1Mask);
406 }
407
padEndloop(MCInst & MCB)408 void HexagonMCInstrInfo::padEndloop(MCInst &MCB) {
409 MCInst Nop;
410 Nop.setOpcode(Hexagon::A2_nop);
411 assert(isBundle(MCB));
412 while ((HexagonMCInstrInfo::isInnerLoop(MCB) &&
413 (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
414 ((HexagonMCInstrInfo::isOuterLoop(MCB) &&
415 (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))))
416 MCB.addOperand(MCOperand::createInst(new MCInst(Nop)));
417 }
418
prefersSlot3(MCInstrInfo const & MCII,MCInst const & MCI)419 bool HexagonMCInstrInfo::prefersSlot3(MCInstrInfo const &MCII,
420 MCInst const &MCI) {
421 if (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR)
422 return false;
423
424 unsigned SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
425 switch (SchedClass) {
426 case Hexagon::Sched::ALU32_3op_tc_2_SLOT0123:
427 case Hexagon::Sched::ALU64_tc_2_SLOT23:
428 case Hexagon::Sched::ALU64_tc_3x_SLOT23:
429 case Hexagon::Sched::M_tc_2_SLOT23:
430 case Hexagon::Sched::M_tc_3x_SLOT23:
431 case Hexagon::Sched::S_2op_tc_2_SLOT23:
432 case Hexagon::Sched::S_3op_tc_2_SLOT23:
433 case Hexagon::Sched::S_3op_tc_3x_SLOT23:
434 return true;
435 }
436 return false;
437 }
438
replaceDuplex(MCContext & Context,MCInst & MCB,DuplexCandidate Candidate)439 void HexagonMCInstrInfo::replaceDuplex(MCContext &Context, MCInst &MCB,
440 DuplexCandidate Candidate) {
441 assert(Candidate.packetIndexI < MCB.size());
442 assert(Candidate.packetIndexJ < MCB.size());
443 assert(isBundle(MCB));
444 MCInst *Duplex =
445 deriveDuplex(Context, Candidate.iClass,
446 *MCB.getOperand(Candidate.packetIndexJ).getInst(),
447 *MCB.getOperand(Candidate.packetIndexI).getInst());
448 assert(Duplex != nullptr);
449 MCB.getOperand(Candidate.packetIndexI).setInst(Duplex);
450 MCB.erase(MCB.begin() + Candidate.packetIndexJ);
451 }
452
setInnerLoop(MCInst & MCI)453 void HexagonMCInstrInfo::setInnerLoop(MCInst &MCI) {
454 assert(isBundle(MCI));
455 MCOperand &Operand = MCI.getOperand(0);
456 Operand.setImm(Operand.getImm() | innerLoopMask);
457 }
458
setOuterLoop(MCInst & MCI)459 void HexagonMCInstrInfo::setOuterLoop(MCInst &MCI) {
460 assert(isBundle(MCI));
461 MCOperand &Operand = MCI.getOperand(0);
462 Operand.setImm(Operand.getImm() | outerLoopMask);
463 }
464 }
465