1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
2
3 /*-
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
7 * All rights reserved.
8 *
9 * This code is derived from software written for Brini by Mark Brinicombe
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * Machine dependant functions for kernel setup
40 *
41 * Created : 17/09/94
42 * Updated : 18/04/01 updated for new wscons
43 */
44
45 #include "opt_compat.h"
46 #include "opt_ddb.h"
47 #include "opt_platform.h"
48 #include "opt_sched.h"
49 #include "opt_timer.h"
50
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
53
54 #include <sys/param.h>
55 #include <sys/proc.h>
56 #include <sys/systm.h>
57 #include <sys/bio.h>
58 #include <sys/buf.h>
59 #include <sys/bus.h>
60 #include <sys/cons.h>
61 #include <sys/cpu.h>
62 #include <sys/exec.h>
63 #include <sys/imgact.h>
64 #include <sys/kdb.h>
65 #include <sys/kernel.h>
66 #include <sys/ktr.h>
67 #include <sys/linker.h>
68 #include <sys/lock.h>
69 #include <sys/malloc.h>
70 #include <sys/msgbuf.h>
71 #include <sys/mutex.h>
72 #include <sys/pcpu.h>
73 #include <sys/ptrace.h>
74 #include <sys/rwlock.h>
75 #include <sys/sched.h>
76 #include <sys/signalvar.h>
77 #include <sys/syscallsubr.h>
78 #include <sys/sysctl.h>
79 #include <sys/sysent.h>
80 #include <sys/sysproto.h>
81 #include <sys/uio.h>
82
83 #include <vm/vm.h>
84 #include <vm/pmap.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_object.h>
87 #include <vm/vm_page.h>
88 #include <vm/vm_pager.h>
89
90 #include <machine/armreg.h>
91 #include <machine/atags.h>
92 #include <machine/cpu.h>
93 #include <machine/cpuinfo.h>
94 #include <machine/devmap.h>
95 #include <machine/frame.h>
96 #include <machine/intr.h>
97 #include <machine/machdep.h>
98 #include <machine/md_var.h>
99 #include <machine/metadata.h>
100 #include <machine/pcb.h>
101 #include <machine/physmem.h>
102 #include <machine/reg.h>
103 #include <machine/trap.h>
104 #include <machine/undefined.h>
105 #include <machine/vfp.h>
106 #include <machine/vmparam.h>
107 #include <machine/sysarch.h>
108
109 #ifdef FDT
110 #include <dev/fdt/fdt_common.h>
111 #include <dev/ofw/openfirm.h>
112 #endif
113
114 #ifdef DEBUG
115 #define debugf(fmt, args...) printf(fmt, ##args)
116 #else
117 #define debugf(fmt, args...)
118 #endif
119
120 struct pcpu __pcpu[MAXCPU];
121 struct pcpu *pcpup = &__pcpu[0];
122
123 static struct trapframe proc0_tf;
124 uint32_t cpu_reset_address = 0;
125 int cold = 1;
126 vm_offset_t vector_page;
127
128 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
129 int (*_arm_bzero)(void *, int, int) = NULL;
130 int _min_memcpy_size = 0;
131 int _min_bzero_size = 0;
132
133 extern int *end;
134 #ifdef DDB
135 extern vm_offset_t ksym_start, ksym_end;
136 #endif
137
138 #ifdef FDT
139 /*
140 * This is the number of L2 page tables required for covering max
141 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
142 * stacks etc.), uprounded to be divisible by 4.
143 */
144 #define KERNEL_PT_MAX 78
145
146 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
147
148 vm_paddr_t pmap_pa;
149
150 struct pv_addr systempage;
151 static struct pv_addr msgbufpv;
152 struct pv_addr irqstack;
153 struct pv_addr undstack;
154 struct pv_addr abtstack;
155 static struct pv_addr kernelstack;
156
157 #endif
158
159 #if defined(LINUX_BOOT_ABI)
160 #define LBABI_MAX_BANKS 10
161
162 uint32_t board_id;
163 struct arm_lbabi_tag *atag_list;
164 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
165 char atags[LBABI_MAX_COMMAND_LINE * 2];
166 uint32_t memstart[LBABI_MAX_BANKS];
167 uint32_t memsize[LBABI_MAX_BANKS];
168 uint32_t membanks;
169 #endif
170
171 static uint32_t board_revision;
172 /* hex representation of uint64_t */
173 static char board_serial[32];
174
175 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
176 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
177 &board_revision, 0, "Board revision");
178 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
179 board_serial, 0, "Board serial");
180
181 int vfp_exists;
182 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
183 &vfp_exists, 0, "Floating point support enabled");
184
185 void
board_set_serial(uint64_t serial)186 board_set_serial(uint64_t serial)
187 {
188
189 snprintf(board_serial, sizeof(board_serial)-1,
190 "%016jx", serial);
191 }
192
193 void
board_set_revision(uint32_t revision)194 board_set_revision(uint32_t revision)
195 {
196
197 board_revision = revision;
198 }
199
200 void
sendsig(catcher,ksi,mask)201 sendsig(catcher, ksi, mask)
202 sig_t catcher;
203 ksiginfo_t *ksi;
204 sigset_t *mask;
205 {
206 struct thread *td;
207 struct proc *p;
208 struct trapframe *tf;
209 struct sigframe *fp, frame;
210 struct sigacts *psp;
211 int onstack;
212 int sig;
213 int code;
214
215 td = curthread;
216 p = td->td_proc;
217 PROC_LOCK_ASSERT(p, MA_OWNED);
218 sig = ksi->ksi_signo;
219 code = ksi->ksi_code;
220 psp = p->p_sigacts;
221 mtx_assert(&psp->ps_mtx, MA_OWNED);
222 tf = td->td_frame;
223 onstack = sigonstack(tf->tf_usr_sp);
224
225 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
226 catcher, sig);
227
228 /* Allocate and validate space for the signal handler context. */
229 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
230 SIGISMEMBER(psp->ps_sigonstack, sig)) {
231 fp = (struct sigframe *)(td->td_sigstk.ss_sp +
232 td->td_sigstk.ss_size);
233 #if defined(COMPAT_43)
234 td->td_sigstk.ss_flags |= SS_ONSTACK;
235 #endif
236 } else
237 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
238
239 /* make room on the stack */
240 fp--;
241
242 /* make the stack aligned */
243 fp = (struct sigframe *)STACKALIGN(fp);
244 /* Populate the siginfo frame. */
245 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
246 frame.sf_si = ksi->ksi_info;
247 frame.sf_uc.uc_sigmask = *mask;
248 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
249 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
250 frame.sf_uc.uc_stack = td->td_sigstk;
251 mtx_unlock(&psp->ps_mtx);
252 PROC_UNLOCK(td->td_proc);
253
254 /* Copy the sigframe out to the user's stack. */
255 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
256 /* Process has trashed its stack. Kill it. */
257 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
258 PROC_LOCK(p);
259 sigexit(td, SIGILL);
260 }
261
262 /* Translate the signal if appropriate. */
263 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
264 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
265
266 /*
267 * Build context to run handler in. We invoke the handler
268 * directly, only returning via the trampoline. Note the
269 * trampoline version numbers are coordinated with machine-
270 * dependent code in libc.
271 */
272
273 tf->tf_r0 = sig;
274 tf->tf_r1 = (register_t)&fp->sf_si;
275 tf->tf_r2 = (register_t)&fp->sf_uc;
276
277 /* the trampoline uses r5 as the uc address */
278 tf->tf_r5 = (register_t)&fp->sf_uc;
279 tf->tf_pc = (register_t)catcher;
280 tf->tf_usr_sp = (register_t)fp;
281 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
282
283 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
284 tf->tf_usr_sp);
285
286 PROC_LOCK(p);
287 mtx_lock(&psp->ps_mtx);
288 }
289
290 struct kva_md_info kmi;
291
292 /*
293 * arm32_vector_init:
294 *
295 * Initialize the vector page, and select whether or not to
296 * relocate the vectors.
297 *
298 * NOTE: We expect the vector page to be mapped at its expected
299 * destination.
300 */
301
302 extern unsigned int page0[], page0_data[];
303 void
arm_vector_init(vm_offset_t va,int which)304 arm_vector_init(vm_offset_t va, int which)
305 {
306 unsigned int *vectors = (int *) va;
307 unsigned int *vectors_data = vectors + (page0_data - page0);
308 int vec;
309
310 /*
311 * Loop through the vectors we're taking over, and copy the
312 * vector's insn and data word.
313 */
314 for (vec = 0; vec < ARM_NVEC; vec++) {
315 if ((which & (1 << vec)) == 0) {
316 /* Don't want to take over this vector. */
317 continue;
318 }
319 vectors[vec] = page0[vec];
320 vectors_data[vec] = page0_data[vec];
321 }
322
323 /* Now sync the vectors. */
324 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
325
326 vector_page = va;
327
328 if (va == ARM_VECTORS_HIGH) {
329 /*
330 * Assume the MD caller knows what it's doing here, and
331 * really does want the vector page relocated.
332 *
333 * Note: This has to be done here (and not just in
334 * cpu_setup()) because the vector page needs to be
335 * accessible *before* cpu_startup() is called.
336 * Think ddb(9) ...
337 *
338 * NOTE: If the CPU control register is not readable,
339 * this will totally fail! We'll just assume that
340 * any system that has high vector support has a
341 * readable CPU control register, for now. If we
342 * ever encounter one that does not, we'll have to
343 * rethink this.
344 */
345 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
346 }
347 }
348
349 static void
cpu_startup(void * dummy)350 cpu_startup(void *dummy)
351 {
352 struct pcb *pcb = thread0.td_pcb;
353 const unsigned int mbyte = 1024 * 1024;
354 #ifdef ARM_TP_ADDRESS
355 #ifndef ARM_CACHE_LOCK_ENABLE
356 vm_page_t m;
357 #endif
358 #endif
359
360 identify_arm_cpu();
361
362 vm_ksubmap_init(&kmi);
363
364 /*
365 * Display the RAM layout.
366 */
367 printf("real memory = %ju (%ju MB)\n",
368 (uintmax_t)arm32_ptob(realmem),
369 (uintmax_t)arm32_ptob(realmem) / mbyte);
370 printf("avail memory = %ju (%ju MB)\n",
371 (uintmax_t)arm32_ptob(cnt.v_free_count),
372 (uintmax_t)arm32_ptob(cnt.v_free_count) / mbyte);
373 if (bootverbose) {
374 arm_physmem_print_tables();
375 arm_devmap_print_table();
376 }
377
378 bufinit();
379 vm_pager_bufferinit();
380 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
381 USPACE_SVC_STACK_TOP;
382 vector_page_setprot(VM_PROT_READ);
383 pmap_set_pcb_pagedir(pmap_kernel(), pcb);
384 pmap_postinit();
385 #ifdef ARM_TP_ADDRESS
386 #ifdef ARM_CACHE_LOCK_ENABLE
387 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
388 arm_lock_cache_line(ARM_TP_ADDRESS);
389 #else
390 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
391 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
392 #endif
393 *(uint32_t *)ARM_RAS_START = 0;
394 *(uint32_t *)ARM_RAS_END = 0xffffffff;
395 #endif
396 }
397
398 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
399
400 /*
401 * Flush the D-cache for non-DMA I/O so that the I-cache can
402 * be made coherent later.
403 */
404 void
cpu_flush_dcache(void * ptr,size_t len)405 cpu_flush_dcache(void *ptr, size_t len)
406 {
407
408 cpu_dcache_wb_range((uintptr_t)ptr, len);
409 #ifdef ARM_L2_PIPT
410 cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len);
411 #else
412 cpu_l2cache_wb_range((uintptr_t)ptr, len);
413 #endif
414 }
415
416 /* Get current clock frequency for the given cpu id. */
417 int
cpu_est_clockrate(int cpu_id,uint64_t * rate)418 cpu_est_clockrate(int cpu_id, uint64_t *rate)
419 {
420
421 return (ENXIO);
422 }
423
424 void
cpu_idle(int busy)425 cpu_idle(int busy)
426 {
427
428 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu);
429 spinlock_enter();
430 #ifndef NO_EVENTTIMERS
431 if (!busy)
432 cpu_idleclock();
433 #endif
434 if (!sched_runnable())
435 cpu_sleep(0);
436 #ifndef NO_EVENTTIMERS
437 if (!busy)
438 cpu_activeclock();
439 #endif
440 spinlock_exit();
441 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu);
442 }
443
444 int
cpu_idle_wakeup(int cpu)445 cpu_idle_wakeup(int cpu)
446 {
447
448 return (0);
449 }
450
451 /*
452 * Most ARM platforms don't need to do anything special to init their clocks
453 * (they get intialized during normal device attachment), and by not defining a
454 * cpu_initclocks() function they get this generic one. Any platform that needs
455 * to do something special can just provide their own implementation, which will
456 * override this one due to the weak linkage.
457 */
458 void
arm_generic_initclocks(void)459 arm_generic_initclocks(void)
460 {
461
462 #ifndef NO_EVENTTIMERS
463 #ifdef SMP
464 if (PCPU_GET(cpuid) == 0)
465 cpu_initclocks_bsp();
466 else
467 cpu_initclocks_ap();
468 #else
469 cpu_initclocks_bsp();
470 #endif
471 #endif
472 }
473 __weak_reference(arm_generic_initclocks, cpu_initclocks);
474
475 int
fill_regs(struct thread * td,struct reg * regs)476 fill_regs(struct thread *td, struct reg *regs)
477 {
478 struct trapframe *tf = td->td_frame;
479 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
480 regs->r_sp = tf->tf_usr_sp;
481 regs->r_lr = tf->tf_usr_lr;
482 regs->r_pc = tf->tf_pc;
483 regs->r_cpsr = tf->tf_spsr;
484 return (0);
485 }
486 int
fill_fpregs(struct thread * td,struct fpreg * regs)487 fill_fpregs(struct thread *td, struct fpreg *regs)
488 {
489 bzero(regs, sizeof(*regs));
490 return (0);
491 }
492
493 int
set_regs(struct thread * td,struct reg * regs)494 set_regs(struct thread *td, struct reg *regs)
495 {
496 struct trapframe *tf = td->td_frame;
497
498 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
499 tf->tf_usr_sp = regs->r_sp;
500 tf->tf_usr_lr = regs->r_lr;
501 tf->tf_pc = regs->r_pc;
502 tf->tf_spsr &= ~PSR_FLAGS;
503 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
504 return (0);
505 }
506
507 int
set_fpregs(struct thread * td,struct fpreg * regs)508 set_fpregs(struct thread *td, struct fpreg *regs)
509 {
510 return (0);
511 }
512
513 int
fill_dbregs(struct thread * td,struct dbreg * regs)514 fill_dbregs(struct thread *td, struct dbreg *regs)
515 {
516 return (0);
517 }
518 int
set_dbregs(struct thread * td,struct dbreg * regs)519 set_dbregs(struct thread *td, struct dbreg *regs)
520 {
521 return (0);
522 }
523
524
525 static int
ptrace_read_int(struct thread * td,vm_offset_t addr,u_int32_t * v)526 ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
527 {
528 struct iovec iov;
529 struct uio uio;
530
531 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
532 iov.iov_base = (caddr_t) v;
533 iov.iov_len = sizeof(u_int32_t);
534 uio.uio_iov = &iov;
535 uio.uio_iovcnt = 1;
536 uio.uio_offset = (off_t)addr;
537 uio.uio_resid = sizeof(u_int32_t);
538 uio.uio_segflg = UIO_SYSSPACE;
539 uio.uio_rw = UIO_READ;
540 uio.uio_td = td;
541 return proc_rwmem(td->td_proc, &uio);
542 }
543
544 static int
ptrace_write_int(struct thread * td,vm_offset_t addr,u_int32_t v)545 ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
546 {
547 struct iovec iov;
548 struct uio uio;
549
550 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
551 iov.iov_base = (caddr_t) &v;
552 iov.iov_len = sizeof(u_int32_t);
553 uio.uio_iov = &iov;
554 uio.uio_iovcnt = 1;
555 uio.uio_offset = (off_t)addr;
556 uio.uio_resid = sizeof(u_int32_t);
557 uio.uio_segflg = UIO_SYSSPACE;
558 uio.uio_rw = UIO_WRITE;
559 uio.uio_td = td;
560 return proc_rwmem(td->td_proc, &uio);
561 }
562
563 int
ptrace_single_step(struct thread * td)564 ptrace_single_step(struct thread *td)
565 {
566 struct proc *p;
567 int error;
568
569 KASSERT(td->td_md.md_ptrace_instr == 0,
570 ("Didn't clear single step"));
571 p = td->td_proc;
572 PROC_UNLOCK(p);
573 error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
574 &td->td_md.md_ptrace_instr);
575 if (error)
576 goto out;
577 error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
578 PTRACE_BREAKPOINT);
579 if (error)
580 td->td_md.md_ptrace_instr = 0;
581 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
582 out:
583 PROC_LOCK(p);
584 return (error);
585 }
586
587 int
ptrace_clear_single_step(struct thread * td)588 ptrace_clear_single_step(struct thread *td)
589 {
590 struct proc *p;
591
592 if (td->td_md.md_ptrace_instr) {
593 p = td->td_proc;
594 PROC_UNLOCK(p);
595 ptrace_write_int(td, td->td_md.md_ptrace_addr,
596 td->td_md.md_ptrace_instr);
597 PROC_LOCK(p);
598 td->td_md.md_ptrace_instr = 0;
599 }
600 return (0);
601 }
602
603 int
ptrace_set_pc(struct thread * td,unsigned long addr)604 ptrace_set_pc(struct thread *td, unsigned long addr)
605 {
606 td->td_frame->tf_pc = addr;
607 return (0);
608 }
609
610 void
cpu_pcpu_init(struct pcpu * pcpu,int cpuid,size_t size)611 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
612 {
613 }
614
615 void
spinlock_enter(void)616 spinlock_enter(void)
617 {
618 struct thread *td;
619 register_t cspr;
620
621 td = curthread;
622 if (td->td_md.md_spinlock_count == 0) {
623 cspr = disable_interrupts(PSR_I | PSR_F);
624 td->td_md.md_spinlock_count = 1;
625 td->td_md.md_saved_cspr = cspr;
626 } else
627 td->td_md.md_spinlock_count++;
628 critical_enter();
629 }
630
631 void
spinlock_exit(void)632 spinlock_exit(void)
633 {
634 struct thread *td;
635 register_t cspr;
636
637 td = curthread;
638 critical_exit();
639 cspr = td->td_md.md_saved_cspr;
640 td->td_md.md_spinlock_count--;
641 if (td->td_md.md_spinlock_count == 0)
642 restore_interrupts(cspr);
643 }
644
645 /*
646 * Clear registers on exec
647 */
648 void
exec_setregs(struct thread * td,struct image_params * imgp,u_long stack)649 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
650 {
651 struct trapframe *tf = td->td_frame;
652
653 memset(tf, 0, sizeof(*tf));
654 tf->tf_usr_sp = stack;
655 tf->tf_usr_lr = imgp->entry_addr;
656 tf->tf_svc_lr = 0x77777777;
657 tf->tf_pc = imgp->entry_addr;
658 tf->tf_spsr = PSR_USR32_MODE;
659 }
660
661 /*
662 * Get machine context.
663 */
664 int
get_mcontext(struct thread * td,mcontext_t * mcp,int clear_ret)665 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
666 {
667 struct trapframe *tf = td->td_frame;
668 __greg_t *gr = mcp->__gregs;
669
670 if (clear_ret & GET_MC_CLEAR_RET)
671 gr[_REG_R0] = 0;
672 else
673 gr[_REG_R0] = tf->tf_r0;
674 gr[_REG_R1] = tf->tf_r1;
675 gr[_REG_R2] = tf->tf_r2;
676 gr[_REG_R3] = tf->tf_r3;
677 gr[_REG_R4] = tf->tf_r4;
678 gr[_REG_R5] = tf->tf_r5;
679 gr[_REG_R6] = tf->tf_r6;
680 gr[_REG_R7] = tf->tf_r7;
681 gr[_REG_R8] = tf->tf_r8;
682 gr[_REG_R9] = tf->tf_r9;
683 gr[_REG_R10] = tf->tf_r10;
684 gr[_REG_R11] = tf->tf_r11;
685 gr[_REG_R12] = tf->tf_r12;
686 gr[_REG_SP] = tf->tf_usr_sp;
687 gr[_REG_LR] = tf->tf_usr_lr;
688 gr[_REG_PC] = tf->tf_pc;
689 gr[_REG_CPSR] = tf->tf_spsr;
690
691 return (0);
692 }
693
694 /*
695 * Set machine context.
696 *
697 * However, we don't set any but the user modifiable flags, and we won't
698 * touch the cs selector.
699 */
700 int
set_mcontext(struct thread * td,mcontext_t * mcp)701 set_mcontext(struct thread *td, mcontext_t *mcp)
702 {
703 struct trapframe *tf = td->td_frame;
704 const __greg_t *gr = mcp->__gregs;
705
706 tf->tf_r0 = gr[_REG_R0];
707 tf->tf_r1 = gr[_REG_R1];
708 tf->tf_r2 = gr[_REG_R2];
709 tf->tf_r3 = gr[_REG_R3];
710 tf->tf_r4 = gr[_REG_R4];
711 tf->tf_r5 = gr[_REG_R5];
712 tf->tf_r6 = gr[_REG_R6];
713 tf->tf_r7 = gr[_REG_R7];
714 tf->tf_r8 = gr[_REG_R8];
715 tf->tf_r9 = gr[_REG_R9];
716 tf->tf_r10 = gr[_REG_R10];
717 tf->tf_r11 = gr[_REG_R11];
718 tf->tf_r12 = gr[_REG_R12];
719 tf->tf_usr_sp = gr[_REG_SP];
720 tf->tf_usr_lr = gr[_REG_LR];
721 tf->tf_pc = gr[_REG_PC];
722 tf->tf_spsr = gr[_REG_CPSR];
723
724 return (0);
725 }
726
727 /*
728 * MPSAFE
729 */
730 int
sys_sigreturn(td,uap)731 sys_sigreturn(td, uap)
732 struct thread *td;
733 struct sigreturn_args /* {
734 const struct __ucontext *sigcntxp;
735 } */ *uap;
736 {
737 ucontext_t uc;
738 int spsr;
739
740 if (uap == NULL)
741 return (EFAULT);
742 if (copyin(uap->sigcntxp, &uc, sizeof(uc)))
743 return (EFAULT);
744 /*
745 * Make sure the processor mode has not been tampered with and
746 * interrupts have not been disabled.
747 */
748 spsr = uc.uc_mcontext.__gregs[_REG_CPSR];
749 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
750 (spsr & (PSR_I | PSR_F)) != 0)
751 return (EINVAL);
752 /* Restore register context. */
753 set_mcontext(td, &uc.uc_mcontext);
754
755 /* Restore signal mask. */
756 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
757
758 return (EJUSTRETURN);
759 }
760
761
762 /*
763 * Construct a PCB from a trapframe. This is called from kdb_trap() where
764 * we want to start a backtrace from the function that caused us to enter
765 * the debugger. We have the context in the trapframe, but base the trace
766 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
767 * enough for a backtrace.
768 */
769 void
makectx(struct trapframe * tf,struct pcb * pcb)770 makectx(struct trapframe *tf, struct pcb *pcb)
771 {
772 pcb->pcb_regs.sf_r4 = tf->tf_r4;
773 pcb->pcb_regs.sf_r5 = tf->tf_r5;
774 pcb->pcb_regs.sf_r6 = tf->tf_r6;
775 pcb->pcb_regs.sf_r7 = tf->tf_r7;
776 pcb->pcb_regs.sf_r8 = tf->tf_r8;
777 pcb->pcb_regs.sf_r9 = tf->tf_r9;
778 pcb->pcb_regs.sf_r10 = tf->tf_r10;
779 pcb->pcb_regs.sf_r11 = tf->tf_r11;
780 pcb->pcb_regs.sf_r12 = tf->tf_r12;
781 pcb->pcb_regs.sf_pc = tf->tf_pc;
782 pcb->pcb_regs.sf_lr = tf->tf_usr_lr;
783 pcb->pcb_regs.sf_sp = tf->tf_usr_sp;
784 }
785
786 /*
787 * Fake up a boot descriptor table
788 */
789 vm_offset_t
fake_preload_metadata(struct arm_boot_params * abp __unused)790 fake_preload_metadata(struct arm_boot_params *abp __unused)
791 {
792 #ifdef DDB
793 vm_offset_t zstart = 0, zend = 0;
794 #endif
795 vm_offset_t lastaddr;
796 int i = 0;
797 static uint32_t fake_preload[35];
798
799 fake_preload[i++] = MODINFO_NAME;
800 fake_preload[i++] = strlen("kernel") + 1;
801 strcpy((char*)&fake_preload[i++], "kernel");
802 i += 1;
803 fake_preload[i++] = MODINFO_TYPE;
804 fake_preload[i++] = strlen("elf kernel") + 1;
805 strcpy((char*)&fake_preload[i++], "elf kernel");
806 i += 2;
807 fake_preload[i++] = MODINFO_ADDR;
808 fake_preload[i++] = sizeof(vm_offset_t);
809 fake_preload[i++] = KERNVIRTADDR;
810 fake_preload[i++] = MODINFO_SIZE;
811 fake_preload[i++] = sizeof(uint32_t);
812 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
813 #ifdef DDB
814 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
815 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
816 fake_preload[i++] = sizeof(vm_offset_t);
817 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
818 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
819 fake_preload[i++] = sizeof(vm_offset_t);
820 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
821 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
822 zend = lastaddr;
823 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
824 ksym_start = zstart;
825 ksym_end = zend;
826 } else
827 #endif
828 lastaddr = (vm_offset_t)&end;
829 fake_preload[i++] = 0;
830 fake_preload[i] = 0;
831 preload_metadata = (void *)fake_preload;
832
833 return (lastaddr);
834 }
835
836 void
pcpu0_init(void)837 pcpu0_init(void)
838 {
839 #if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B)
840 set_curthread(&thread0);
841 #endif
842 pcpu_init(pcpup, 0, sizeof(struct pcpu));
843 PCPU_SET(curthread, &thread0);
844 #ifdef VFP
845 PCPU_SET(cpu, 0);
846 #endif
847 }
848
849 #if defined(LINUX_BOOT_ABI)
850 vm_offset_t
linux_parse_boot_param(struct arm_boot_params * abp)851 linux_parse_boot_param(struct arm_boot_params *abp)
852 {
853 struct arm_lbabi_tag *walker;
854 uint32_t revision;
855 uint64_t serial;
856
857 /*
858 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
859 * is atags or dtb pointer. If all of these aren't satisfied,
860 * then punt.
861 */
862 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
863 return 0;
864
865 board_id = abp->abp_r1;
866 walker = (struct arm_lbabi_tag *)
867 (abp->abp_r2 + KERNVIRTADDR - abp->abp_physaddr);
868
869 /* xxx - Need to also look for binary device tree */
870 if (ATAG_TAG(walker) != ATAG_CORE)
871 return 0;
872
873 atag_list = walker;
874 while (ATAG_TAG(walker) != ATAG_NONE) {
875 switch (ATAG_TAG(walker)) {
876 case ATAG_CORE:
877 break;
878 case ATAG_MEM:
879 arm_physmem_hardware_region(walker->u.tag_mem.start,
880 walker->u.tag_mem.size);
881 break;
882 case ATAG_INITRD2:
883 break;
884 case ATAG_SERIAL:
885 serial = walker->u.tag_sn.low |
886 ((uint64_t)walker->u.tag_sn.high << 32);
887 board_set_serial(serial);
888 break;
889 case ATAG_REVISION:
890 revision = walker->u.tag_rev.rev;
891 board_set_revision(revision);
892 break;
893 case ATAG_CMDLINE:
894 /* XXX open question: Parse this for boothowto? */
895 bcopy(walker->u.tag_cmd.command, linux_command_line,
896 ATAG_SIZE(walker));
897 break;
898 default:
899 break;
900 }
901 walker = ATAG_NEXT(walker);
902 }
903
904 /* Save a copy for later */
905 bcopy(atag_list, atags,
906 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
907
908 return fake_preload_metadata(abp);
909 }
910 #endif
911
912 #if defined(FREEBSD_BOOT_LOADER)
913 vm_offset_t
freebsd_parse_boot_param(struct arm_boot_params * abp)914 freebsd_parse_boot_param(struct arm_boot_params *abp)
915 {
916 vm_offset_t lastaddr = 0;
917 void *mdp;
918 void *kmdp;
919
920 /*
921 * Mask metadata pointer: it is supposed to be on page boundary. If
922 * the first argument (mdp) doesn't point to a valid address the
923 * bootloader must have passed us something else than the metadata
924 * ptr, so we give up. Also give up if we cannot find metadta section
925 * the loader creates that we get all this data out of.
926 */
927
928 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
929 return 0;
930 preload_metadata = mdp;
931 kmdp = preload_search_by_type("elf kernel");
932 if (kmdp == NULL)
933 return 0;
934
935 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
936 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
937 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
938 #ifdef DDB
939 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
940 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
941 #endif
942 return lastaddr;
943 }
944 #endif
945
946 vm_offset_t
default_parse_boot_param(struct arm_boot_params * abp)947 default_parse_boot_param(struct arm_boot_params *abp)
948 {
949 vm_offset_t lastaddr;
950
951 #if defined(LINUX_BOOT_ABI)
952 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
953 return lastaddr;
954 #endif
955 #if defined(FREEBSD_BOOT_LOADER)
956 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
957 return lastaddr;
958 #endif
959 /* Fall back to hardcoded metadata. */
960 lastaddr = fake_preload_metadata(abp);
961
962 return lastaddr;
963 }
964
965 /*
966 * Stub version of the boot parameter parsing routine. We are
967 * called early in initarm, before even VM has been initialized.
968 * This routine needs to preserve any data that the boot loader
969 * has passed in before the kernel starts to grow past the end
970 * of the BSS, traditionally the place boot-loaders put this data.
971 *
972 * Since this is called so early, things that depend on the vm system
973 * being setup (including access to some SoC's serial ports), about
974 * all that can be done in this routine is to copy the arguments.
975 *
976 * This is the default boot parameter parsing routine. Individual
977 * kernels/boards can override this weak function with one of their
978 * own. We just fake metadata...
979 */
980 __weak_reference(default_parse_boot_param, parse_boot_param);
981
982 /*
983 * Initialize proc0
984 */
985 void
init_proc0(vm_offset_t kstack)986 init_proc0(vm_offset_t kstack)
987 {
988 proc_linkup0(&proc0, &thread0);
989 thread0.td_kstack = kstack;
990 thread0.td_pcb = (struct pcb *)
991 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
992 thread0.td_pcb->pcb_flags = 0;
993 thread0.td_pcb->pcb_vfpcpu = -1;
994 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN | VFPSCR_FZ;
995 thread0.td_frame = &proc0_tf;
996 pcpup->pc_curpcb = thread0.td_pcb;
997 }
998
999 void
set_stackptrs(int cpu)1000 set_stackptrs(int cpu)
1001 {
1002
1003 set_stackptr(PSR_IRQ32_MODE,
1004 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1005 set_stackptr(PSR_ABT32_MODE,
1006 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1007 set_stackptr(PSR_UND32_MODE,
1008 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1009 }
1010
1011 #ifdef FDT
1012 static char *
kenv_next(char * cp)1013 kenv_next(char *cp)
1014 {
1015
1016 if (cp != NULL) {
1017 while (*cp != 0)
1018 cp++;
1019 cp++;
1020 if (*cp == 0)
1021 cp = NULL;
1022 }
1023 return (cp);
1024 }
1025
1026 static void
print_kenv(void)1027 print_kenv(void)
1028 {
1029 int len;
1030 char *cp;
1031
1032 debugf("loader passed (static) kenv:\n");
1033 if (kern_envp == NULL) {
1034 debugf(" no env, null ptr\n");
1035 return;
1036 }
1037 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
1038
1039 len = 0;
1040 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
1041 debugf(" %x %s\n", (uint32_t)cp, cp);
1042 }
1043
1044 void *
initarm(struct arm_boot_params * abp)1045 initarm(struct arm_boot_params *abp)
1046 {
1047 struct mem_region mem_regions[FDT_MEM_REGIONS];
1048 struct pv_addr kernel_l1pt;
1049 struct pv_addr dpcpu;
1050 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1051 uint32_t memsize, l2size;
1052 char *env;
1053 void *kmdp;
1054 u_int l1pagetable;
1055 int i, j, err_devmap, mem_regions_sz;
1056
1057 lastaddr = parse_boot_param(abp);
1058 arm_physmem_kernaddr = abp->abp_physaddr;
1059
1060 memsize = 0;
1061
1062 cpuinfo_init();
1063 set_cpufuncs();
1064
1065 /*
1066 * Find the dtb passed in by the boot loader.
1067 */
1068 kmdp = preload_search_by_type("elf kernel");
1069 if (kmdp != NULL)
1070 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1071 else
1072 dtbp = (vm_offset_t)NULL;
1073
1074 #if defined(FDT_DTB_STATIC)
1075 /*
1076 * In case the device tree blob was not retrieved (from metadata) try
1077 * to use the statically embedded one.
1078 */
1079 if (dtbp == (vm_offset_t)NULL)
1080 dtbp = (vm_offset_t)&fdt_static_dtb;
1081 #endif
1082
1083 if (OF_install(OFW_FDT, 0) == FALSE)
1084 panic("Cannot install FDT");
1085
1086 if (OF_init((void *)dtbp) != 0)
1087 panic("OF_init failed with the found device tree");
1088
1089 /* Grab physical memory regions information from device tree. */
1090 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
1091 panic("Cannot get physical memory regions");
1092 arm_physmem_hardware_regions(mem_regions, mem_regions_sz);
1093
1094 /* Grab reserved memory regions information from device tree. */
1095 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
1096 arm_physmem_exclude_regions(mem_regions, mem_regions_sz,
1097 EXFLAG_NODUMP | EXFLAG_NOALLOC);
1098
1099 /* Platform-specific initialisation */
1100 initarm_early_init();
1101
1102 pcpu0_init();
1103
1104 /* Do basic tuning, hz etc */
1105 init_param1();
1106
1107 /* Calculate number of L2 tables needed for mapping vm_page_array */
1108 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1109 l2size = (l2size >> L1_S_SHIFT) + 1;
1110
1111 /*
1112 * Add one table for end of kernel map, one for stacks, msgbuf and
1113 * L1 and L2 tables map and one for vectors map.
1114 */
1115 l2size += 3;
1116
1117 /* Make it divisible by 4 */
1118 l2size = (l2size + 3) & ~3;
1119
1120 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1121
1122 /* Define a macro to simplify memory allocation */
1123 #define valloc_pages(var, np) \
1124 alloc_pages((var).pv_va, (np)); \
1125 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
1126
1127 #define alloc_pages(var, np) \
1128 (var) = freemempos; \
1129 freemempos += (np * PAGE_SIZE); \
1130 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1131
1132 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1133 freemempos += PAGE_SIZE;
1134 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1135
1136 for (i = 0, j = 0; i < l2size; ++i) {
1137 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1138 valloc_pages(kernel_pt_table[i],
1139 L2_TABLE_SIZE / PAGE_SIZE);
1140 j = i;
1141 } else {
1142 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1143 L2_TABLE_SIZE_REAL * (i - j);
1144 kernel_pt_table[i].pv_pa =
1145 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1146 abp->abp_physaddr;
1147
1148 }
1149 }
1150 /*
1151 * Allocate a page for the system page mapped to 0x00000000
1152 * or 0xffff0000. This page will just contain the system vectors
1153 * and can be shared by all processes.
1154 */
1155 valloc_pages(systempage, 1);
1156
1157 /* Allocate dynamic per-cpu area. */
1158 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1159 dpcpu_init((void *)dpcpu.pv_va, 0);
1160
1161 /* Allocate stacks for all modes */
1162 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1163 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1164 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1165 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU);
1166 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1167
1168 /*
1169 * Now we start construction of the L1 page table
1170 * We start by mapping the L2 page tables into the L1.
1171 * This means that we can replace L1 mappings later on if necessary
1172 */
1173 l1pagetable = kernel_l1pt.pv_va;
1174
1175 /*
1176 * Try to map as much as possible of kernel text and data using
1177 * 1MB section mapping and for the rest of initial kernel address
1178 * space use L2 coarse tables.
1179 *
1180 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1181 * and kernel structures
1182 */
1183 l2_start = lastaddr & ~(L1_S_OFFSET);
1184 for (i = 0 ; i < l2size - 1; i++)
1185 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1186 &kernel_pt_table[i]);
1187
1188 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1189
1190 /* Map kernel code and data */
1191 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
1192 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1193 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1194
1195 /* Map L1 directory and allocated L2 page tables */
1196 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1197 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1198
1199 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1200 kernel_pt_table[0].pv_pa,
1201 L2_TABLE_SIZE_REAL * l2size,
1202 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1203
1204 /* Map allocated DPCPU, stacks and msgbuf */
1205 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1206 freemempos - dpcpu.pv_va,
1207 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1208
1209 /* Link and map the vector page */
1210 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1211 &kernel_pt_table[l2size - 1]);
1212 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1213 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1214
1215 /* Establish static device mappings. */
1216 err_devmap = initarm_devmap_init();
1217 arm_devmap_bootstrap(l1pagetable, NULL);
1218 vm_max_kernel_address = initarm_lastaddr();
1219
1220 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1221 pmap_pa = kernel_l1pt.pv_pa;
1222 setttb(kernel_l1pt.pv_pa);
1223 cpu_tlb_flushID();
1224 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1225
1226 /*
1227 * Now that proper page tables are installed, call cpu_setup() to enable
1228 * instruction and data caches and other chip-specific features.
1229 */
1230 cpu_setup("");
1231
1232 /*
1233 * Only after the SOC registers block is mapped we can perform device
1234 * tree fixups, as they may attempt to read parameters from hardware.
1235 */
1236 OF_interpret("perform-fixup", 0);
1237
1238 initarm_gpio_init();
1239
1240 cninit();
1241
1242 debugf("initarm: console initialized\n");
1243 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1244 debugf(" boothowto = 0x%08x\n", boothowto);
1245 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1246 print_kenv();
1247
1248 env = getenv("kernelname");
1249 if (env != NULL)
1250 strlcpy(kernelname, env, sizeof(kernelname));
1251
1252 if (err_devmap != 0)
1253 printf("WARNING: could not fully configure devmap, error=%d\n",
1254 err_devmap);
1255
1256 initarm_late_init();
1257
1258 /*
1259 * Pages were allocated during the secondary bootstrap for the
1260 * stacks for different CPU modes.
1261 * We must now set the r13 registers in the different CPU modes to
1262 * point to these stacks.
1263 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1264 * of the stack memory.
1265 */
1266 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1267
1268 set_stackptrs(0);
1269
1270 /*
1271 * We must now clean the cache again....
1272 * Cleaning may be done by reading new data to displace any
1273 * dirty data in the cache. This will have happened in setttb()
1274 * but since we are boot strapping the addresses used for the read
1275 * may have just been remapped and thus the cache could be out
1276 * of sync. A re-clean after the switch will cure this.
1277 * After booting there are no gross relocations of the kernel thus
1278 * this problem will not occur after initarm().
1279 */
1280 cpu_idcache_wbinv_all();
1281
1282 undefined_init();
1283
1284 init_proc0(kernelstack.pv_va);
1285
1286 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1287 pmap_bootstrap(freemempos, &kernel_l1pt);
1288 msgbufp = (void *)msgbufpv.pv_va;
1289 msgbufinit(msgbufp, msgbufsize);
1290 mutex_init();
1291
1292 /*
1293 * Exclude the kernel (and all the things we allocated which immediately
1294 * follow the kernel) from the VM allocation pool but not from crash
1295 * dumps. virtual_avail is a global variable which tracks the kva we've
1296 * "allocated" while setting up pmaps.
1297 *
1298 * Prepare the list of physical memory available to the vm subsystem.
1299 */
1300 arm_physmem_exclude_region(abp->abp_physaddr,
1301 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC);
1302 arm_physmem_init_kernel_globals();
1303
1304 init_param2(physmem);
1305 kdb_init();
1306
1307 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1308 sizeof(struct pcb)));
1309 }
1310 #endif
1311